Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.

Abstract: An antiferroelectric field effect transistor (Anti-FeFET) of a memory cell includes an antiferroelectric layer instead of a ferroelectric layer. The antiferroelectric layer may operate based on a programmed state and an erased state in which the antiferroelectric layer is in a fully polarized alignment and a non-polarized alignment (or a random state of polarization), respectively. This enables the antiferroelectric layer in the FeFET to provide a sharper/larger voltage drop for an erase operation of the FeFET (e.g., in which the FeFET switches or transitions from the programmed state to the erased state) relative to a ferroelectric material layer that operates based on switching between two opposing fully polarized states.

Abstract: The present disclosure describes a method for memory cell placement. The method can include placing a memory cell region in a layout area and placing a well pick-up region and a first power supply routing region along a first side of the memory cell region. The method also includes placing a second power supply routing region and a bitline jumper routing region along a second side of the memory cell region, where the second side is on an opposite side to that of the first side. The method further includes placing a device region along the second side of the memory cell region, where the bitline jumper routing region is between the second power supply routing region and the device region.

Abstract: A reticle enclosure includes a base including a first surface, a cover including a second surface and coupled to the base with the first surface facing the second surface. The base and the cover form an internal space that includes a reticle. The reticle enclosure includes restraining mechanisms arranged in the internal space and for securing the reticle, and structures disposed adjacent the reticle in the internal space. The structures enclose the reticle at least partially, and limit passage of contaminants between the internal space and an external environment of the reticle enclosure. The structures include barriers disposed on the first and second surfaces. In other examples, a padding is installed in gaps between the barriers and the first and second surfaces. In other examples, the structures include wall structures disposed on the first and second surfaces and between the restraining mechanisms.

Abstract: A contact stack of a semiconductor device includes a source/drain feature, a silicide layer wrapping around the source/drain feature, a seed metal layer in direct contact with the silicide layer, and a conductor in contact with the seed metal layer. The contact stack excludes a metal nitride layer in direct contact with the silicide layer.

Abstract: An enhancement mode high electron mobility transistor (HEMT) includes a group III-V semiconductor body, a group III-V barrier layer and a gate structure. The group III-V barrier layer is disposed on the group III-V semiconductor body, and the gate structure is a stacked structure disposed on the group III-V barrier layer. The gate structure includes a gate dielectric and a group III-V gate layer disposed on the gate dielectric, and the thickness of the gate dielectric is between 15 nm to 25 nm.

Abstract: A method of forming a semiconductor device includes providing a substrate including a circuit region and a well strap region, forming a mandrel extending from the circuit region to the well strap region, depositing mandrel spacers on sidewalls of the mandrel, removing the mandrel in the circuit region, while the mandrel in the well strap region remains intact, patterning the substrate with the mandrel spacers in the circuit region and the mandrel in the well strap region as an etch mask, thereby forming at least a first fin in the circuit region and a second fin in the well strap region, and epitaxially growing a first epitaxial feature over the first fin in the circuit region and a second epitaxial feature over the second fin in the well strap region. A width of the second fin is larger than a width of the first fin.

Abstract: A semiconductor device according to the present disclosure includes a first gate structure and a second gate structure aligned along a direction, a first metal layer disposed over the first gate structure, a second metal layer disposed over the second gate structure, and a gate isolation structure extending between the first gate structure and the second gate structure as well as between the first metal layer and the second metal layer.

Abstract: The present invention relates to the newly identified MIC-1 binding receptor, GFRAL. In vitro bioassays, for testing affinity and potency of GFRAL ligand, such as MIC- or MIC-1 variants, are provided.

Abstract: The present invention relates to the newly identified MIC-1 binding receptor, GFRAL. In vitro bioassays, for testing affinity and potency of GFRAL ligand, such as MIC- or MIC-1 variants, are provided.

Abstract: A displaying apparatus includes a displaying panel, aback light device disposed below the displaying panel, and a structural frame. The displaying panel has a first and a second side and includes a first substrate, a second substrate disposed on the first substrate and covering the whole first substrate, a light-masking structure located between the first and second substrates, a plurality of light modulation units located between the first and second substrates, and a connection circuit formed on the protruding portion of the second substrate. The structural frame supports the first and second sides of the displaying panel. An edge of the second substrate is near or aligned with a side surface of the structural frame. Therein, a projection of the light-masking structure can cover portions of the structural frame, supporting the first and second substrates, and the connection circuit.

Abstract: A displaying apparatus includes a displaying panel, a back light device, and a structural frame fixing the both. The displaying panel includes a first substrate, a second substrate joined onto the first substrate, a light-masking structure, and a plurality of light modulation units. The light-masking structure and the light modulation units are disposed between the substrates. An edge of the second substrate is aligned with a corresponding edge of the first substrate. The light modulation units are disposed corresponding to a plurality of light-penetrating portions of the light-masking structure, for controlling whether light passes through the displaying panel to generate plane images. The light-masking structure wholly covers an edge portion including the edge of the second substrate. The displaying panel can directly use the light-masking structure to perform as a border frame for shielding the interior structure and light emitted from the interior without external covers or frames.

Abstract: A backlight module includes a light guide board, at least one light emitting unit, a plurality of first glues, and a first reflection sheet. The light guide board has a light entrance surface, a light exit surface, and at least one reflection surface. The reflection surface is connected to the light entrance surface and the light exit surface respectively. The light emitting unit is disposed at the light entrance surface of the light guide board. The plurality of first glues is alternatively disposed on the reflection surface in a from-sparse-to-dense manner. The first reflection sheet is disposed on the plurality of first glues such that the first reflection sheet can be fixed onto the reflection surface.

Abstract: A displaying panel and a displaying apparatus therewith are disclosed. The displaying panel includes a first substrate, a second substrate joined onto the first substrate, a light-masking structure, and a plurality of light modulation units. The light-masking structure and the light modulation units are disposed between the substrates. An edge of the second substrate is aligned with or beyond a corresponding edge of the first substrate. The light modulation units are disposed corresponding to a plurality of light-penetrating portions of the light-masking structure, for controlling whether light passes through the displaying panel to generate plane images. The light-masking structure wholly covers an edge portion including the edge of the second substrate. Therefore, the displaying panel can directly use the light-masking structure to perform as a border frame for shielding the interior structure and light emitted from the interior without external covers or frames.

Abstract: A backlight module includes an LGP and a linear light source. The LGP includes a light-incident side surface and a top light-emitting surface that has a peripheral region and an effective illumination region. The linear light source includes a circuit board, solid-state light-emitting devices configured on and electrically connected to the circuit board, and a reflector covering a portion of the peripheral region. Light emitted from each solid-state light-emitting device enters the LGP from the light-incident side surface. The reflector includes first reflection parts that correspond to the solid-state light-emitting devices and second reflection parts. Each second reflection part is connected to two adjacent first reflection parts. Each first reflection part and each second reflection part extend towards the effective illumination region from an edge of the top light-emitting surface. An extension length of each first reflection part is shorter than that of each second reflection part.

Abstract: A backlight module includes a light guide board, at least one light emitting unit, a plurality of first glues, and a first reflection sheet. The light guide board has a light entrance surface, a light exit surface, and at least one reflection surface. The reflection surface is connected to the light entrance surface and the light exit surface respectively. The light emitting unit is disposed at the light entrance surface of the light guide board. The plurality of first glues is alternatively disposed on the reflection surface in a from-sparse-to-dense manner. The first reflection sheet is disposed on the plurality of first glues such that the first reflection sheet can be fixed onto the reflection surface.

Abstract: Use of nordihydroguaiaretic derivatives to suppress CDC-2 and survivin, stimulate apoptosis, and treat tumors.

Abstract: A backlight module includes an LGP and a linear light source. The LGP includes a light-incident side surface and a top light-emitting surface that has a peripheral region and an effective illumination region. The linear light source includes a circuit board, solid-state light-emitting devices configured on and electrically connected to the circuit board, and a reflector covering a portion of the peripheral region. Light emitted from each solid-state light-emitting device enters the LGP from the light-incident side surface. The reflector includes first reflection parts that correspond to the solid-state light-emitting devices and second reflection parts. Each second reflection part is connected to two adjacent first reflection parts. Each first reflection part and each second reflection part extend towards the effective illumination region from an edge of the top light-emitting surface. An extension length of each first reflection part is shorter than that of each second reflection part.

Abstract: The present invention provides kits, methods and compositions for the treatment of diseases such as cancers. The compositions herein contain a substantially pure preparation of at least one catecholic butane, including, for example, NDGA compounds in a pharmaceutically acceptable carrier or excipient. The catecholic butane such as NDGA or its derivatives are administered to one or more subjects in need of treatment by a route other than direct injection into the affected tissues or topical application on affected tissues.

Abstract: The present invention provides kits, methods and compositions for the treatment of tumor and other proliferative diseases such as tumors. The compositions herein contain a substantially pure preparation of at least one catecholic butane, including, for example, NDGA compounds in a pharmaceutically acceptable carrier or excipient. The catecholic butane such as NDGA or its derivatives are administered to one or more subjects in need of treatment by a route other than direct injection into the affected tissues or topical application on affected tissues.