Patents by Inventor Chih-Chun Chen

Chih-Chun Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11424154
    Abstract: A semiconductor device includes a buried metal line disposed in a semiconductor substrate, a first dielectric material on a first sidewall of the buried metal line and a second dielectric material on a second sidewall of the buried metal line, a first multiple fins disposed proximate the first sidewall of the buried metal line, a second multiple fins disposed proximate the second sidewall of the buried metal line, a first metal gate structure over the first multiple fins and over the buried metal line, wherein the first metal gate structure extends through the first dielectric material to contact the buried metal line, and a second metal gate structure over the second multiple fins and over the buried metal line.
    Type: Grant
    Filed: December 9, 2020
    Date of Patent: August 23, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Lei-Chun Chou, Chih-Liang Chen, Jiann-Tyng Tzeng, Chih-Ming Lai, Ru-Gun Liu, Charles Chew-Yuen Young
  • Patent number: 11417588
    Abstract: A semiconductor structure includes a plurality of vias and a metal layer. The vias disposed on a semiconductor substrate. The metal layer has a plurality of metal lines and at least one transmission gate line region. The metal lines are connected to the vias. The at least one transmission gate line region is connected to at least one transmission gate corresponding to at least one transmission gate circuit. The transmission gate line region includes at least one different-net via pair. The different-net via pair has two metal lines and each of the two metal lines is connected to a via respectively. The two metal lines extend along a first axis but toward opposite directions. A distance between the two vias of the different-net via pair is within about 1.5 poly pitch.
    Type: Grant
    Filed: July 30, 2020
    Date of Patent: August 16, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Wei-Ren Chen, Chih-Liang Chen, Wei-Ling Chang, Hui-Zhong Zhuang, Li-Chun Tien
  • Patent number: 11417601
    Abstract: A device includes a transistor, an insulating structure, a buried conductive line, and a buried via. The transistor is above a substrate and includes a source/drain region and a source/drain contact above the source/drain region. The insulating structure is above the substrate and laterally surrounds the transistor. The buried conductive line is in the insulating structure and spaced apart from the transistor. The buried via is in the insulating structure and interconnects the transistor and the buried conductive line. A height of the buried conductive line is greater than a height of the source/drain contact.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: August 16, 2022
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC NANJING COMPANY LIMITED, TSMC CHINA COMPANY LIMITED
    Inventors: Xin-Yong Wang, Liu Han, Li-Chun Tien, Chih-Liang Chen
  • Publication number: 20220249671
    Abstract: A carbohydrate composition includes fucose, glucuronic acid, galactose, and arabinose. Based on the total weight of the carbohydrate composition, the content of fucose is 45.5% to 76% by weight; the content of glucuronic acid is 11% to 19% by weight; the content of galactose is 4.5% to 14.5% by weight, and the content of arabinose is 5.5% to 18% by weight. A pharmaceutical ingredient including the above-mentioned carbohydrate composition is provided.
    Type: Application
    Filed: February 7, 2022
    Publication date: August 11, 2022
    Applicants: Medgaea Japan Co., Ltd., Medgaea Life Sciences Ltd.
    Inventors: Chang-Jer Wu, Bo-Rui Chen, Chih-Chun Hong, Yuh-Ting Huang, Masahiko Iha, Makoto Tomori
  • Publication number: 20220242976
    Abstract: Disclosed are support-activators and catalyst compositions comprising the support-activators for polymerizing olefins in which the support-activator includes clay heteroadduct, prepare from a colloidal phyllosilicate such as a colloidal smectite clay, which is chemically-modified with a heterocoagulation agent. By limiting the amount of heterocoagulation reagent relative to the colloidal smectite clay as described herein, the smectite heteroadduct support-activator is a porous and amorphous solid which can be readily isolated from the resulting slurry by a conventional filtration process, and which can activate metallocenes and related catalysts toward olefin polymerization. Related compositions and processes are disclosed.
    Type: Application
    Filed: April 19, 2022
    Publication date: August 4, 2022
    Applicant: Formosa Plastics Corporation, U.S.A.
    Inventors: Michael D Jensen, Kevin Chung, Daoyong Wang, Wei-Chun Shih, Guangxue Xu, Chih-Jian Chen, Charles R. Johnson, II, Mary Lou Cowen
  • Publication number: 20220238700
    Abstract: Semiconductor structures and methods of forming the same are provided. A semiconductor structure according to the present disclosure includes at least one first semiconductor element and at least one second semiconductor element over a substrate, a dielectric fin disposed between the at least one first semiconductor element and the at least one second semiconductor element, a first work function metal layer wrapping around each of the at least one first semiconductor element and extending continuously from the at least one first semiconductor element to a top surface of the dielectric fin, and a second work function metal layer disposed over the at least one second semiconductor element and the first work function metal layer.
    Type: Application
    Filed: April 9, 2021
    Publication date: July 28, 2022
    Inventors: Wang-Chun Huang, Hou-Yu Chen, Kuan-Lun Cheng, Chih-Hao Wang
  • Patent number: 11393959
    Abstract: A micro light-emitting diode device includes a substrate, a micro light-emitting diode, a first protection layer and a second protection layer. The micro light-emitting diode is disposed on the substrate. The first protection layer is disposed on a first portion of an outer side wall of the micro light-emitting diode and has a gap from the substrate. The second protection layer is at least disposed on a second portion of the outer side wall and is located in the gap between the first protection layer and the substrate. A height of the second protection layer on the substrate is less than or equal to a height of the micro light-emitting diode on the substrate.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: July 19, 2022
    Assignee: PlayNitride Display Co., Ltd.
    Inventors: Pei-Hsin Chen, Yi-Chun Shih, Chih-Ling Wu
  • Patent number: 11389644
    Abstract: A flexible thin film metal oxide electrode fabrication methods and devices are provided and illustrated with thin film polyimide electrode formation and IrOx chemical bath deposition. Growth factors of the deposited film such as film thickness, deposition rate and quality of crystallites can be controlled by varying the solution pH, temperature and component concentrations of the bath. The methods allow for selective deposition of IrOx on a flexible substrate (e.g. polyimide electrode) where the IrOx will only coat onto an exposed metal area but not the entire device surface. This feature enables the bath process to coat the IrOx onto every individual electrode in one batch, and to ensure electrical isolation between channels. The ability to perform selective deposition, pads for external connections will not have IrOx coverage that would otherwise interfere with a soldering/bumping process.
    Type: Grant
    Filed: May 6, 2019
    Date of Patent: July 19, 2022
    Assignees: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: Wentai Liu, Chih-Wei Chang, Pu-Wei Wu, Chung-Yu Wu, Po-Chun Chen, Tsai-Wei Chung
  • Publication number: 20220223996
    Abstract: An electronic device including a first body, a second body, and at least one cavity antenna module is provided. The second body has a pivot side and a plurality of non-pivot sides, and the pivot side is connected pivotally to the first body. The cavity antenna module includes a metal cavity body and a first antenna structure. The metal cavity body is disposed in the second body and has an opening. A distance between one of the non-pivot sides and the metal cavity body is smaller than a distance between the pivot side and the metal cavity body, and the opening faces the one of the non-pivot sides. The first antenna structure is disposed in the opening of the metal cavity body, and the first antenna structure includes a feeding portion, a radiating portion, and a ground portion connected with one another.
    Type: Application
    Filed: October 21, 2021
    Publication date: July 14, 2022
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Jhih-Ciang Chen, Shih-Chia Liu, Yen-Hao Yu, Li-Chun Lee, Chih-Heng Lin, Je-Wei Liao, Chun-Cheng Chan, Jui-Hung Lai
  • Publication number: 20220223536
    Abstract: Semiconductor structures and method of forming the same are provided. A semiconductor structure according to the present disclosure includes a contact feature in a dielectric layer, a passivation structure over the dielectric layer, a conductive feature over the passivation structure, a seed layer disposed between the conductive feature and the passivation structure, a protecting layer disposed along sidewalls of the conductive feature, and a passivation layer over the conductive feature and the protecting layer.
    Type: Application
    Filed: May 5, 2021
    Publication date: July 14, 2022
    Inventors: Wen-Chun Wang, Tzy-Kuang Lee, Chih-Hsien Lin, Ching-Hung Kao, Yen-Yu Chen
  • Patent number: 11387394
    Abstract: A micro light-emitting diode device includes a substrate, a micro light-emitting diode, a first protection layer and a second protection layer. The micro light-emitting diode is adapted to be disposed on the substrate. The first protection layer is disposed on a first portion of an outer side wall of the micro light-emitting diode and has a gap from the substrate. The second protection layer is disposed on a second portion of the outer side wall of the micro light-emitting diode. The second protection layer is located in the gap between the first protection layer and the substrate and covers a part of the first protection layer. A maximum thickness of the first protection layer on the outer side wall is less than a maximum thickness of the second protection layer on the outer side wall.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: July 12, 2022
    Assignee: PlayNitride Display Co., Ltd.
    Inventors: Pei-Hsin Chen, Yi-Chun Shih, Chih-Ling Wu
  • Patent number: 11387387
    Abstract: A micro light emitting device display apparatus including a circuit substrate, a plurality of micro light emitting devices, a first common electrode layer, and a second common electrode layer is provided. The micro light emitting devices are disposed on the circuit substrate and individually include an epitaxial structure and a first-type electrode and a second-type electrode respectively disposed on two side surfaces of the epitaxial structure opposite to each other. The first common electrode layer is disposed on the circuit substrate and directly covers the plurality of first-type electrodes of the micro light emitting devices. The second common electrode layer is disposed between the micro light emitting devices. The first common electrode layer is electrically connected to the second common electrode layer.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: July 12, 2022
    Assignee: PlayNitride Display Co., Ltd.
    Inventors: Chih-Ling Wu, Yen-Yeh Chen, Yi-Min Su, Yi-Chun Shih, Bo-Wei Wu, Yu-Yun Lo, Ying-Ting Lin, Tzu-Yang Lin
  • Patent number: 11387748
    Abstract: In some embodiments, the present disclosure relates to a microelectromechanical system (MEMS) comb actuator including a comb structure. The comb structure includes a support layer having a first material and a plurality of protrusions extending away from a first surface of the support layer in a first direction. The plurality of protrusions are also made of the first material. The plurality of protrusions are separated along a second direction parallel to the first surface of the support layer. The MEMS comb actuator may further include a dielectric liner structure that continuously and completely covers the first surface of the support layer and outer surfaces of the plurality of protrusions. The dielectric liner structure includes a connective portion that continuously connects topmost surfaces of at least two of the plurality of protrusions.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: July 12, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chiao-Chun Hsu, Chih-Ming Chen, Chung-Yi Yu, Lung Yuan Pan
  • Publication number: 20220216112
    Abstract: A method of manufacturing a semiconductor device includes forming a plurality of fin structures extending in a first direction over a semiconductor substrate. Each fin structure includes a first region proximate to the semiconductor substrate and a second region distal to the semiconductor substrate. An electrically conductive layer is formed between the first regions of a first adjacent pair of fin structures. A gate electrode structure is formed extending in a second direction substantially perpendicular to the first direction over the fin structure second region, and a metallization layer including at least one conductive line is formed over the gate electrode structure.
    Type: Application
    Filed: March 28, 2022
    Publication date: July 7, 2022
    Inventors: Hung-Li CHIANG, Chih-Liang CHEN, Tzu-Chiang CHEN, I-Sheng CHEN, Lei-Chun CHOU
  • Patent number: 11381595
    Abstract: Preventing Transport Layer Security session man-in-the-middle attacks is provided. A first security digest generated by an endpoint device is compared with a second security digest received from a peer device. It is determined whether a match exists between the first security digest and the second security digest based on the comparison. In response to determining that a match does not exist between the first security digest and the second security digest, a man-in-the-middle attack is detected and a network connection for a Transport Layer Security session is terminated with the peer device.
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: July 5, 2022
    Assignee: International Business Machines Corporation
    Inventors: Wei-Hsiang Hsiung, Sheng-Tung Hsu, Kuo-Chun Chen, Chih-Hung Chou
  • Patent number: 11374003
    Abstract: An integrated circuit includes a first transistor, a second transistor, and a first insulating layer. The first transistor is disposed in a first layer and comprises a first gate. The second transistor is disposed in a second layer above the first layer and comprises a second gate. The first gate and second gate are separated from each other in a first direction. The first insulating layer is disposed between the first gate of the first transistor and the second gate of the second transistor. The first insulating layer is configured to electrically insulate the first gate of the first transistor from the second gate of the second transistor.
    Type: Grant
    Filed: March 2, 2020
    Date of Patent: June 28, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Guo-Huei Wu, Po-Chun Wang, Hui-Zhong Zhuang, Chih-Liang Chen, Li-Chun Tien
  • Publication number: 20220131326
    Abstract: A laser inspection system is provided. A laser source emits a laser with a first spectrum and the laser is transmitted by a first optical fiber. A gain optical fiber doped with special ions is connected to the first optical fiber, and a light detector is provided around the gain optical fiber. When the laser with the first spectrum passes through the gain optical fiber, the gain optical fiber absorbs part of the energy level of the laser with the first spectrum, so that the laser with the first spectrum is converted to generate light with a second spectrum based on the frequency conversion phenomenon. The light detector detects the intensity of the light with the second spectrum, so that the power of the laser source can be obtained.
    Type: Application
    Filed: November 23, 2020
    Publication date: April 28, 2022
    Inventors: Yi-Chi Lee, Hsin-Chia Su, Shih-Ting Lin, Yu-Cheng Song, Fu-Shun Ho, Chih-Chun Chen
  • Patent number: 11283232
    Abstract: A laser protection system includes a high-power laser source, an optical diffuser, a photo detector, a signal-processing device, and a control module. The high-power laser source generates a first laser light beam, and the optical diffuser attenuates a laser power of the first laser light beam to form a second laser light beam. The photo detector obtains an optical detection signal from the second laser light beam. The signal-processing device includes a signal conversion module, a processor, and an encoder. The signal conversion module transforms the optical detection signal into a measurement data eigenvalue. The encoder encodes the measurement data eigenvalue into a measured encoded data, and the setting data eigenvalue into a set encoded data. The control module evaluates the set encoded data and the measured encoded data to determine whether or not the high-power laser source needs to be stopped.
    Type: Grant
    Filed: December 26, 2019
    Date of Patent: March 22, 2022
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chih-Chun Chen, Fu-Shun Ho, Chun-Chieh Yang, Yu-Cheng Song
  • Patent number: 11269234
    Abstract: A reflective display device includes a thin-film transistor (TFT) array substrate, a front panel laminate (FPL), a front protection sheet, a back protection sheet, a light blocking layer, and a light source. The front panel laminate is located on the TFT array substrate, and has a transparent conductive layer and a display medium layer. The display medium layer is located between the transparent conductive layer and the TFT array substrate. The front protection sheet is located on the front panel laminate. The back protection sheet is located below the TFT array substrate. The light blocking layer at least covers a lateral surface of the back protection sheet. The light source faces toward a lateral surface of the front panel laminate, a lateral surface of the TFT array substrate, and the lateral surface of the back protection sheet.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: March 8, 2022
    Assignee: E Ink Holdings Inc.
    Inventors: Chia-Chi Chang, Chih-Chun Chen, Chi-Ming Wu, Yi-Ching Wang, Jia-Hung Chen, Cheng-Hsien Lin
  • Patent number: 11227557
    Abstract: The present disclosure provides a display device. The display device includes a substrate, a pixel array, a circuit bridge structure, a first trace region, a second trace region, and a display film layer. The pixel array is located on the substrate. The circuit bridge structure is located at one side of the pixel array. The first trace region is located between the pixel array and a first side of the circuit bridge structure. The second trace region is located at a second side opposite to the first side. The display film layer is located on the pixel array, and an orthogonal projection of the display film layer on the substrate is spaced apart from an orthogonal projection of the circuit bridge structure on the substrate.
    Type: Grant
    Filed: November 19, 2020
    Date of Patent: January 18, 2022
    Assignee: E Ink Holdings Inc.
    Inventors: Chia-Chi Chang, Chih-Chun Chen, Chi-Ming Wu, Yi-Ching Wang, Jia-Hung Chen