Patents by Inventor Chih-Li Chang

Chih-Li Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230036669
    Abstract: A method for assembling a shoe upper and a bottom unit includes digitally determining a bite line on the shoe upper. The method further includes storing a set of data representing the bite line in a computing device. The method also includes utilizing the set of data to automatically indicate the location of an actual physical bite line on the shoe upper.
    Type: Application
    Filed: October 6, 2022
    Publication date: February 2, 2023
    Inventors: Chiung Li Chang, Yu-Sung Chen, Chih-Hung Chiang
  • Patent number: 11556654
    Abstract: A system is provided to perform secure operations. The system includes an I/O subsystem, a memory subsystem and processors. The processors are operative to execute processes in trusted execution environments (TEEs) and rich execution environments (REEs). Each of the TEEs and the REEs is identified by a corresponding access identifier (AID) and protected by a corresponding system resource protection unit (SRPU). The corresponding SRPU of a TEE includes instructions, when executed by a corresponding processor, cause the corresponding processor to control access to the TEE using a data structure including allowed AIDs and pointers to memory locations accessible by the allowed AIDs.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: January 17, 2023
    Assignee: MediaTek Inc.
    Inventors: Yu-Tien Chang, Chih-Pin Su, Hungwen Li
  • Patent number: 11521929
    Abstract: The present disclosure describes a method for forming capping layers configured to prevent the migration of out-diffused cobalt atoms into upper metallization layers In some embodiments, the method includes depositing a cobalt diffusion barrier layer on a liner-free conductive structure that includes ruthenium, where depositing the cobalt diffusion barrier layer includes forming the cobalt diffusion barrier layer self-aligned to the liner-free conductive structure. The method also includes depositing, on the cobalt diffusion barrier layer, a stack with an etch stop layer and dielectric layer, and forming an opening in the stack to expose the cobalt diffusion barrier layer. Finally, the method includes forming a conductive structure on the cobalt diffusion barrier layer.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: December 6, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shuen-Shin Liang, Chun-I Tsai, Chih-Wei Chang, Chun-Hsien Huang, Hung-Yi Huang, Keng-Chu Lin, Ken-Yu Chang, Sung-Li Wang, Chia-Hung Chu, Hsu-Kai Chang
  • Publication number: 20220367660
    Abstract: The present disclosure describes a method for forming metallization layers that include a ruthenium metal liner and a cobalt metal fill. The method includes depositing a first dielectric on a substrate having a gate structure and source/drain (S/D) structures, forming an opening in the first dielectric to expose the S/D structures, and depositing a ruthenium metal on bottom and sidewall surfaces of the opening. The method further includes depositing a cobalt metal on the ruthenium metal to fill the opening, reflowing the cobalt metal, and planarizing the cobalt and ruthenium metals to form S/D conductive structures with a top surface coplanar with a top surface of the first dielectric.
    Type: Application
    Filed: May 14, 2021
    Publication date: November 17, 2022
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shuen-Shin Liang, Chih-Chien Chi, Chien-Shun Liao, Keng-Chu Lin, Kai-Ting Huang, Sung-Li Wang, Yi-Ying Liu, Chia-Hung Chu, Hsu-Kai Chang, Cheng-Wei Chang
  • Publication number: 20220367662
    Abstract: The present disclosure describes a method for forming liner-free or barrier-free conductive structures. The method includes forming a liner-free conductive structure on a cobalt conductive structure disposed on a substrate, depositing a cobalt layer on the liner-free conductive structure and exposing the liner-free conductive structure to a heat treatment. The method further includes removing the cobalt layer from the liner-free conductive structure.
    Type: Application
    Filed: July 28, 2022
    Publication date: November 17, 2022
    Applicant: Taiwan Semiconductor Manufacturing, Co., Ltd.
    Inventors: Shuen-Shin Liang, Chun-I Tsai, Chih-Wei Chang, Chun-Hsien Huang, Hung-Yi Huang, Keng-Chu Lin, Ken-Yu Chang, Sung-Li Wang, Chia-Hung Chu, Hsu-Kai Chang
  • Patent number: 11490693
    Abstract: A method for assembling a shoe upper and a bottom unit includes digitally determining a bite line on the shoe upper. The method further includes storing a set of data representing the bite line in a computing device. The method also includes utilizing the set of data to automatically indicate the location of an actual physical bite line on the shoe upper.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: November 8, 2022
    Assignee: NIKE, Inc.
    Inventors: Chiung Li Chang, Yu-Sung Chen, Chih-Hung Chiang
  • Publication number: 20220352020
    Abstract: A method includes forming a first metallic feature, forming a dielectric layer over the first metallic feature, etching the dielectric layer to form an opening, with a top surface of the first metallic feature being exposed through the opening, and performing a first treatment on the top surface of the first metallic feature. The first treatment is performed through the opening, and the first treatment is performed using a first process gas. After the first treatment, a second treatment is performed through the opening, and the second treatment is performed using a second process gas different from the first process gas.
    Type: Application
    Filed: June 30, 2022
    Publication date: November 3, 2022
    Inventors: Chun-Hsien Huang, I-Li Chen, Pin-Wen Chen, Yuan-Chen Hsu, Wei-Jung Lin, Chih-Wei Chang, Ming-Hsing Tsai
  • Patent number: 11476572
    Abstract: An electronic package structure is provided, including a substrate with an electronic component, an antenna element and a shielding element disposed on the substrate. The shielding element is positioned between the antenna element and the electronic component to prevent electromagnetic interference (EMI) from occurring between the antenna element and the electronic component. A method for fabricating the electronic package structure is also provided.
    Type: Grant
    Filed: January 23, 2020
    Date of Patent: October 18, 2022
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chih-Yuan Shih, Chih-Hsien Chiu, Yueh-Chiung Chang, Tsung-Li Lin, Chi-Pin Tsai, Chien-Cheng Lin, Tsung-Hsien Tsai, Heng-Cheng Chu, Ming-Fan Tsai
  • Publication number: 20220328660
    Abstract: A method includes forming a first semiconductor fin and a second semiconductor fin in an n-type Fin Field-Effect (FinFET) region and a p-type FinFET region, respectively, forming a first dielectric fin and a second dielectric fin in the n-type FinFET region and the p-type FinFET region, respectively, forming a first epitaxy mask to cover the second semiconductor fin and the second dielectric fin, performing a first epitaxy process to form an n-type epitaxy region based on the first semiconductor fin, removing the first epitaxy mask, forming a second epitaxy mask to cover the n-type epitaxy region and the first dielectric fin, performing a second epitaxy process to form a p-type epitaxy region based on the second semiconductor fin, and removing the second epitaxy mask. After the second epitaxy mask is removed, a portion of the second epitaxy mask is left on the first dielectric fin.
    Type: Application
    Filed: June 30, 2022
    Publication date: October 13, 2022
    Inventors: Chih-Chiang Chang, Ming-Hua Yu, Li-Li Su
  • Publication number: 20220302393
    Abstract: A halide material having general formula ArMAX is disclosed. The halide material can be processed to an optoelectronic film with a halogenated formamidine and a lead halide, and the optoelectronic film can be applied in the manufacture of an optoelectronic device like a perovskite laser or a PeLED. Experimental data have proved that, the fabricated optoelectronic film shows a property of photoluminescence (PL) peak wavelength adjustable. Moreover, the PL peak wavelength moves from 482 nm to 534 nm with the increase of the content of lead (Pb), halogen (X) and formamidine (FA) in the optoelectronic film Furthermore, experimental data have also indicated that, the fabricated optoelectronic film can be used as a blue emissive layer, a red emissive layer or a green emissive layer, thereby having a significant potential for application in optoelectronics industry.
    Type: Application
    Filed: July 26, 2021
    Publication date: September 22, 2022
    Applicant: National Tsing Hua University
    Inventors: Hao-Wu Lin, Ho-Hsiu Chou, Chih-Li Chang, Chien-Yu Chen, Lin Yang
  • Patent number: 11444181
    Abstract: A method includes forming a first semiconductor fin and a second semiconductor fin in an n-type Fin Field-Effect (FinFET) region and a p-type FinFET region, respectively, forming a first dielectric fin and a second dielectric fin in the n-type FinFET region and the p-type FinFET region, respectively, forming a first epitaxy mask to cover the second semiconductor fin and the second dielectric fin, performing a first epitaxy process to form an n-type epitaxy region based on the first semiconductor fin, removing the first epitaxy mask, forming a second epitaxy mask to cover the n-type epitaxy region and the first dielectric fin, performing a second epitaxy process to form a p-type epitaxy region based on the second semiconductor fin, and removing the second epitaxy mask. After the second epitaxy mask is removed, a portion of the second epitaxy mask is left on the first dielectric fin.
    Type: Grant
    Filed: January 25, 2021
    Date of Patent: September 13, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Chiang Chang, Ming-Hua Yu, Li-Li Su
  • Publication number: 20220285566
    Abstract: A semiconductor package is provided. The semiconductor package includes a heat dissipation substrate including a first conductive through-via embedded therein; a sensor die disposed on the heat dissipation substrate; an insulating encapsulant laterally encapsulating the sensor die; a second conductive through-via penetrating through the insulating encapsulant; and a first redistribution structure and a second redistribution structure disposed on opposite sides of the heat dissipation substrate. The second conductive through-via is in contact with the first conductive through-via. The sensor die is located between the second redistribution structure and the heat dissipation substrate. The second redistribution structure has a window allowing a sensing region of the sensor die receiving light. The first redistribution structure is electrically connected to the sensor die through the first conductive through-via, the second conductive through-via and the second redistribution structure.
    Type: Application
    Filed: May 23, 2022
    Publication date: September 8, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Yu-Chih Huang, Chih-Hao Chang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Publication number: 20220267382
    Abstract: Provided is a chimeric hemagglutinin (HA) protein including an HA1 subunit and an HA2 subunit, in which the HA1 subunit is composed of a first domain derived from a parental HA1 subunit of a first subtype influenza virus and a second domain derived from a parental HA1 subunit of a second subtype influenza virus. The chimeric HA protein has improved thermal stability and can be used in a vaccine composition for preventing influenza virus infection. Also provided is a method of inducing an immune response against an influenza virus in a subject in need thereof that includes administering the chimeric HA protein to the subject, thereby conferring protection against the influenza virus infection on the subject.
    Type: Application
    Filed: September 18, 2020
    Publication date: August 25, 2022
    Applicant: ACADEMIA SINICA
    Inventors: Yu-Chan CHAO, Chih-Hsuan TSAI, Chia-Jung CHANG, Sung-Chan WEI, Lin-Li LIAO, Huei-Ru LO
  • Patent number: 11410880
    Abstract: A method includes forming a first metallic feature, forming a dielectric layer over the first metallic feature, etching the dielectric layer to form an opening, with a top surface of the first metallic feature being exposed through the opening, and performing a first treatment on the top surface of the first metallic feature. The first treatment is performed through the opening, and the first treatment is performed using a first process gas. After the first treatment, a second treatment is performed through the opening, and the second treatment is performed using a second process gas different from the first process gas. A second metallic feature is deposited in the opening.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: August 9, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Hsien Huang, I-Li Chen, Pin-Wen Chen, Yuan-Chen Hsu, Wei-Jung Lin, Chih-Wei Chang, Ming-Hsing Tsai
  • Publication number: 20220245861
    Abstract: An image processing method includes: performing content analysis upon an input frame to generate at least one content analysis result of the input frame; determining, by a processing circuit, an anti-blue light strength level for the input frame according to content analysis result(s) of the input frame; and in response to the anti-blue light strength level determined for the input frame, performing color correction upon the input frame to generate an output frame.
    Type: Application
    Filed: August 3, 2021
    Publication date: August 4, 2022
    Applicant: MEDIATEK INC.
    Inventors: Chih-Kai Chang, Shuo-Li Shih, Tsu-Ming Liu, Yung-Chang Chang
  • Patent number: 11374136
    Abstract: A semiconductor package is provided. The semiconductor package includes a heat dissipation substrate including a first conductive through-via embedded therein; a sensor die disposed on the heat dissipation substrate; an insulating encapsulant laterally encapsulating the sensor die; a second conductive through-via penetrating through the insulating encapsulant; and a first redistribution structure and a second redistribution structure disposed on opposite sides of the heat dissipation substrate. The second conductive through-via is in contact with the first conductive through-via. The sensor die is located between the second redistribution structure and the heat dissipation substrate. The second redistribution structure has a window allowing a sensing region of the sensor die receiving light. The first redistribution structure is electrically connected to the sensor die through the first conductive through-via, the second conductive through-via and the second redistribution structure.
    Type: Grant
    Filed: January 20, 2020
    Date of Patent: June 28, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hsuan Tai, Hao-Yi Tsai, Yu-Chih Huang, Chih-Hao Chang, Chia-Hung Liu, Ban-Li Wu, Ying-Cheng Tseng, Po-Chun Lin
  • Publication number: 20200407491
    Abstract: The present disclosure provides a semiconductor compound, which includes a metal complex unit and a conjugate unit. The metal complex unit includes a coordination center and a plurality of ligands. The coordination center is a metal ion or a metal atom, and the ligands are linked with the coordination center. The conjugate unit is linked with the metal complex unit by covalent bond.
    Type: Application
    Filed: July 12, 2019
    Publication date: December 31, 2020
    Inventors: Ho-Hsiu Chou, Chih-Li Chang, Wei-Cheng Lin
  • Patent number: 8482692
    Abstract: The invention provides an LCD apparatus including a backlight assembly, an LCD panel assembly and an edge-engaging assembly. In particular, the edge-engaging assembly comprises N edge-engaging members, wherein N is an integer ranging from 1 to 4. Each of the N edge-engaging members has a respective inner wall adapted to engage the corresponding edge portions of the backlight assembly and the LCD assembly.
    Type: Grant
    Filed: January 14, 2010
    Date of Patent: July 9, 2013
    Assignee: Hannstar Display Corporation
    Inventors: Chih-Li Chang, Po-Chun Chen, Ke-Chin Chang
  • Patent number: 8235573
    Abstract: A backlight module includes a light guide, a mixing light guide plate, and a plurality of light sources. The first light guide comprises a first side surface. The mixing light guide plate comprises an incident surface with anomalous surface and an emergent surface with fog surface. The mixing light guide plate is set on the first side surface. A plurality of light sources disposed corresponding to the incident surface, with light emitted there from and entering the mixing light guide plate through the incident surface then exits the mixing light guide plate through the emergent surface, finally, entering the light guide through the first side surface.
    Type: Grant
    Filed: March 3, 2010
    Date of Patent: August 7, 2012
    Assignee: Hannstar Display Corp.
    Inventor: Chih-Li Chang
  • Publication number: 20100259948
    Abstract: A backlight module includes a light guide, a mixing light guide plate, and a plurality of light sources. The first light guide comprises a first side surface. The mixing light guide plate comprises an incident surface with anomalous surface and an emergent surface with fog surface. The mixing light guide plate is set on the first side surface. A plurality of light sources disposed corresponding to the incident surface, with light emitted there from and entering the mixing light guide plate through the incident surface then exits the mixing light guide plate through the emergent surface, finally, entering the light guide through the first side surface.
    Type: Application
    Filed: March 3, 2010
    Publication date: October 14, 2010
    Applicant: HANNSTAR DISPLAY CORP.
    Inventor: Chih-Li Chang