Abstract: A high voltage device includes: a semiconductor layer, a well, a bulk region, a gate, a source, and a drain. The bulk region is formed in the semiconductor layer and contacts the well region along a channel direction. A portion of the bulk region is vertically below and in contact with the gate, to provide an inversion region of the high voltage device when the high voltage device is in conductive operation. A portion of the well lies between the bulk region and the drain, to separate the bulk region from the drain. A first concentration peak region of an impurities doping profile of the bulk region is vertically below and in contact with the source. A concentration of a second conductivity type impurities of the first concentration peak region is higher than that of other regions in the bulk region.

Abstract: A biocompatible magnetic material containing an iron oxide nanoparticle and one or more biocompatible polymers, each having formula (I) below, covalently bonded to the iron oxide nanoparticle: in which each of variables R, L, x, and y is defined herein, the biocompatible magnetic material contains 4-15% Fe(II) ions relative to the total iron ions. Also disclosed in a method of preparing the biocompatible magnetic material.

Abstract: A display device includes an emission circuit, a first control circuit and a second control circuit. The emission circuit is coupled to a first node and is configured to emit light based on an emission signal and a voltage level of the first node. The first control circuit is configured to charge the first node based on a sweep signal and the emission signal. The second control circuit is configured to discharge the first node based on the sweep signal and the emission signal.

Abstract: A driving circuit includes a driving transistor, first to second capacitors and first to third switching transistors. The driving transistor is configured to control a driving current provided to a light emitting element to emit light. The first capacitor includes a first terminal coupled to a gate terminal of the driving transistor. The first switching transistor coupled between a second terminal of the first capacitor and a driving voltage terminal. The second switching transistor includes a first terminal coupled to a gate terminal of the first switching transistor and a second terminal coupled to a first reference voltage terminal. The third switching transistor coupled between a gate terminal of the second switching transistor and a second reference voltage terminal. The second capacitor includes a first terminal coupled to a gate terminal of the third switching transistor and a second configured to receive a sweep signal.

Abstract: A multiple die container load port may include a housing with an opening, and an elevator to accommodate a plurality of different sized die containers. The multiple die container load port may include a stage supported by the housing and moveable within the opening of the housing by the elevator. The stage may include one or more positioning mechanisms to facilitate positioning of the plurality of different sized die containers on the stage, and may include different portions movable by the elevator to accommodate the plurality of different sized die containers. The multiple die container load port may include a position sensor to identify one of the plurality of different sized die containers positioned on the stage.

Abstract: A method of forming an electronic device including: providing an assembly, wherein the assembly includes a substrate, an optical film, a plurality of color filters and a defect, wherein the plurality of color filters and the defect are disposed between the substrate and the optical film; and using a laser pulse to form a first processed area that corresponds to the defect in the optical film, wherein the first processed area at least partially overlaps at least two of the plurality of color filters.

Abstract: A magnetic memory including a substrate, a spin-orbit torque (SOT) layer, a magnetic tunnel junction (MTJ) stack, a first protection layer, and a second protection layer is provided. The SOT layer is located over the substrate. The MTJ stack is located on the SOT layer. The first protection layer and the second protection layer are located on the sidewall of the MTJ stack. The first protection layer is located between the second protection layer and the MTJ stack. There is a notch between the second protection layer and the SOT layer.

Abstract: A semiconductor device includes a first conductive layer, a second conductive layer, a third conductive layer, a first organic layer, a first inorganic layer and a first silicon-containing layer. The third conductive layer is disposed between and electrically isolated from the first conductive layer and the second conductive layer. The first organic layer continuously covers the first conductive layer and the third conductive layer. The first inorganic layer is disposed over the first organic layer. The first silicon-containing layer is inserted between the first organic layer and the first inorganic layer, wherein the second conductive layer is disposed on and disposed in the first organic layer, the first silicon-containing layer and the first inorganic layer, to electrically connect to the first conductive layer.

Abstract: A signal adjusting circuit and a receiving end circuit using the same are provided. The signal adjusting circuit is adapted to a peak detector, and includes a first amplifier and a first feedback circuit. The first amplifier receives a first input signal, and amplifies the first input signal to output a first output signal. The first feedback circuit is connected between a first input terminal and a first output terminal of the first amplifier, and is configured to determine a first gain of the first output signal. The peak detector is connected to a first output node of the first feedback circuit, so as to receive a first detection signal and detect a peak value of the first detection signal. The peak detector has a predetermined power input range, and the first feedback circuit keeps the first detection signal within the predetermined power input range.

Abstract: Disclosed is an image display device including a display device, an optical modulation element, and a modulation device. When the modulation device is in a first state, the display device projects a first image at a first imaging position through the optical modulation element. When the modulation device is in a second state, the display device projects a second image at a second imaging position through the optical modulation element. A minimum distance from the first imaging position to the optical modulation element is different from a minimum distance from the second imaging position to the optical modulation element.

Abstract: A modified polyurethane material and a method for manufacturing the same are provided. A dianhydride is added into an aliphatic diisocyanate to form a liquid reactant. A solvent is absent from the liquid reactant. An oligomerization is implemented onto the liquid reactant so as to form an oligomer having a terminal isocyanate group. A polyol and a curative are added into the oligomer having the terminal isocyanate group for a polymerization so as to form the modified polyurethane. Based on a total weight of the modified polyurethane being 100 wt %, a content of a hard segment of the modified polyurethane ranges from 15 wt % to 45 wt %.

Abstract: An electronic device is configured to execute instructions: compiling a first AI model and second AI model(s) to a first compiled file and second compiled file(s), respectively, wherein the first compiled file comprises a first data set and a first command set, and the second compiled file(s) comprises second data set(s) and second command set(s); generating light version file(s) for the AI model(s), wherein the light version file(s) comprises the second command set(s) and data patch(es); storing the first compiled file and the light version file(s) to a storage device; loading the first compiled file from the storage device to a memory; loading the light version file(s) from the storage device to the memory; generating the second data set(s) according to the first data set and the data patch(es); and executing the second AI model(s) according to the generated second data set(s) and the second command set(s) in the memory.

Abstract: A display panel and a pixel circuit thereof are provided. A pulse width signal generator turns on a charge sharing switch during a light-emitting period, and performs charge sharing with a control end of a positive feedback switch of a positive feedback circuit, so as to control the positive feedback switch to provide a positive feedback voltage to the pulse width signal generator to increase a voltage at an output end of the pulse width signal generator and thus to accelerate a rising speed of a voltage for controlling a driving current generator to provide a driving current.

Abstract: Disclosed is a pixel circuit. A pulse width signal generator provides a pulse width signal to a control terminal of a light-emitting control switch on a drive current path of a drive current generator. A multiple lighting controller adjusts the pulse width signal provided by the pulse width signal generator according to a multiple emission control signal to allow a light-emitting element to perform multi-emission.

Abstract: A striking training device is provided, including: a main body, being a hollow post and including a plurality of through holes disposed therethrough radially; at least one striking member, each of the at least one striking member including an insertion portion disposed through one of the plurality of through holes, and a striking portion connected to the insertion portion, an end of the insertion portion remote from the striking portion including a first threaded portion; at least one fixation member, each of the at least one fixation member including a second threaded portion, the second threaded portion being screwed to the first threaded portion so that the main body is located between the striking portion and the fixation member and the insertion portion is restricted and not disengageable from the through hole.

Abstract: The present disclosure discloses a low dropout regulator apparatus having noise-suppression mechanism. An operational amplifier circuit includes a differential input circuit, an amplifying output circuit and a first and a second resistive components. The differential input circuit is coupled between first connection nodes and a ground terminal to receive a reference voltage and a feedback voltage. The amplifying output circuit includes a first and a second transistor pair circuits. The first transistor pair circuit is coupled between a power supply and second connection nodes. The second transistor pair is coupled between the second connection nodes and the ground terminal and has an amplifying output terminal generating an amplified voltage. The first and the second resistive components are coupled between the first and the second connection nodes.

Abstract: A multi-gain stage circuit is arranged to receive an input signal to generate an output signal, and includes a first gain stage, a second gain stage, a gain control circuit, and a calibration circuit. The second gain stage is connected in series with the first gain stage, and the second gain stage generates the output signal. The gain control circuit controls the first gain stage to have a first gain value such that the output signal is regarded as a product of a gain value of the second gain stage and an offset voltage of the second gain stage. The calibration circuit calculates the offset voltage of the second gain stage according to the output signal, and calibrates the second gain stage according to the offset voltage of the second gain stage calculated by the calibration circuit.

Abstract: A continuous-time delta-sigma modulator (CT-DSM) includes a loop filter, a pipelined successive-approximation register analog-to-digital converter (SAR ADC), a feedback circuit, an excess loop delay (ELD) compensation circuit, and a logic circuit. The loop filter generates a first intermediate signal according to an input signal, a feedback signal, and a compensation signal. The pipelined SAR ADC generates a first digital code, a second digital code, a first quantization error signal, and a second quantization error signal according to the first intermediate signal. The feedback circuit generates the feedback signal according to the first digital code, the first quantization error signal, and the second quantization error signal. The ELD compensation circuit generates the compensation signal according to at least one output signal of the feedback circuit. The logic circuit generates an output digital code according to the first digital code and the second digital code.

Abstract: A temperature sensing circuit that includes a bandgap voltage generation circuit, a current mirror branch, a variable resistor, a comparator circuit, a control circuit and a temperature determining circuit. The bandgap voltage generation circuit generates a bandgap voltage. The current mirror branch generates a mirrored current mirrored from the bandgap voltage generation circuit. The variable resistor is electrically coupled to the current mirror branch to receive the mirrored current to generate a variable voltage. The comparator circuit compares the bandgap voltage and the variable voltage to generate a comparison result. The control circuit generates a control signal according to the comparison result to adjust the resistance of the variable resistor and outputs a signal value when the signal value forces the variable voltage to be equal to the bandgap voltage. The temperature determining circuit generates a temperature value according to the signal value.

Abstract: A pharmaceutical composition containing a mixed polymeric micelle and a drug enclosed in the micelle, in which the mixed polymeric micelle, 1 to 1000 nm in size, includes an amphiphilic block copolymer and a lipopolymer. Also disclosed are preparation of the pharmaceutical composition and use thereof for treating cancer.