Patents by Inventor Chih-Ming Huang

Chih-Ming Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7772685
    Abstract: A stacked semiconductor structure and fabrication method thereof are provided. The method includes mounting and connecting electrically a semiconductor chip to a first substrate, mounting on the first substrate a plurality of supporting members corresponding in position to a periphery of the semiconductor chip, mounting a second substrate having a first surface partially covered with a tape and a second surface opposite to the first surface on the supporting members via the second surface, connecting electrically the first and second substrates by bonding wires, forming on the first substrate an encapsulant for encapsulating the semiconductor chip, the supporting members, the second substrate, the bonding wires, and the tape with an exposed top surface, and removing the tape to expose the first surface of the second substrate and allow an electronic component to be mounted thereon. The present invention prevents reflow-induced contamination, spares a special mold, and eliminates flash.
    Type: Grant
    Filed: November 1, 2006
    Date of Patent: August 10, 2010
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chien-Ping Huang, Chih-Ming Huang, Han-Ping Pu, Yu-Po Wang, Cheng-Hsu Hsiao
  • Publication number: 20100170709
    Abstract: An electronic carrier board and a package structure thereof are provided. The electronic carrier board includes a carrier, at least one pair of bond pads formed on the carrier, and a protective layer covering the carrier. The protective layer is formed with openings for exposing the bond pads. A groove is formed between the paired bond pads and has a length larger than a width of an electronic component mounted on the paired bond pads. The groove is adjacent to one of the paired bond pads and communicates with a corresponding one of the openings where this bond pad is exposed. Accordingly, a clearance between the electronic component and the electronic carrier board can be effectively filled with an insulating resin for encapsulating the electronic component, thereby preventing voids and undesirable electrical bridging between the paired bond pads from occurrence.
    Type: Application
    Filed: March 19, 2010
    Publication date: July 8, 2010
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Fang-Lin Tsai, Ho-Yi Tsai, Chih-Ming Huang, Chien-Ping Huang
  • Patent number: 7696623
    Abstract: An electronic carrier board and a package structure thereof are provided. The electronic carrier board includes a carrier, at least one pair of bond pads formed on the carrier, and a protective layer covering the carrier. The protective layer is formed with openings for exposing the bond pads. A groove is formed between the paired bond pads and has a length larger than a width of an electronic component mounted on the paired bond pads. The groove is adjacent to one of the paired bond pads and communicates with a corresponding one of the openings where this bond pad is exposed. Accordingly, a clearance between the electronic component and the electronic carrier board can be effectively filled with an insulating resin for encapsulating the electronic component, thereby preventing voids and undesirable electrical bridging between the paired bond pads from occurrence.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: April 13, 2010
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Fang-Lin Tsai, Ho-Yi Tsai, Chih-Ming Huang, Chien-Ping Huang
  • Patent number: 7679178
    Abstract: A semiconductor package on which a semiconductor device can be stacked and fabrication method thereof are provided. The fabrication method includes the steps of mounting and electrically connecting at least one semiconductor chip on the substrate, mounting an electrical connecting structure consisting of an upper layer circuit board and a lower layer circuit board on the substrate and electrically connecting the electrical connecting structure to the substrate, where the semiconductor chip is received in a receiving space formed in the electrical connecting structure; forming an encapsulant on the substrate encapsulating the semiconductor chip and the electrical connecting structure, and after the encapsulant is formed, exposing top surface of the upper layer circuit board with a plurality of solder pads from the encapsulant to allow at least one semiconductor device to electrically connect the upper layer circuit board so as to form a stack structure.
    Type: Grant
    Filed: October 12, 2007
    Date of Patent: March 16, 2010
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Han-Ping Pu, Chien-Ping Huang, Chih-Ming Huang, Yu-Po Wang, Cheng-Hsu Hsiao
  • Patent number: 7667421
    Abstract: A torque compensation method and system for a DC brushless motor. When the DC brushless motor coupled with an asymmetric load is rotating, the difference between an instant current and an average current of a shunt resister is an index of adjusting control signals within an absolute rotor position for the purpose of approaching the corresponding instant current to the average current.
    Type: Grant
    Filed: September 26, 2007
    Date of Patent: February 23, 2010
    Assignee: Sunplus Technology Co., Ltd.
    Inventor: Chih-Ming Huang
  • Publication number: 20090294959
    Abstract: A semiconductor package device, a semiconductor package structure, and fabrication methods thereof are provided, which mainly includes disposing a plurality of semiconductor chips on a wafer formed with TSVs (Through Silicon Vias) and electrically connecting the semiconductor chips to the TSVs; encapsulating the semiconductor chips with an encapsulant; and disposing a hard component on the encapsulant. The hard component ensures flatness of the wafer during a solder bump process and provides support to the wafer during a singulation process such that the wafer can firmly lie on a singulation carrier, thereby overcoming the drawbacks of the prior art, namely difficulty in mounting of solder bumps, and difficulty in cutting of the wafer.
    Type: Application
    Filed: December 4, 2008
    Publication date: December 3, 2009
    Applicant: Siliconware Precision Industries Co., Ltd.
    Inventors: Cheng-Chia Chiang, Chin-Huang Chang, Chien-Ping Huang, Chih-Ming Huang, Jung-Pin Huang
  • Publication number: 20090288866
    Abstract: An electronic carrier board is provided, including a carrier, at least two paired bond pads formed on the carrier, and a protective layer covering the carrier. The protective layer is formed with openings corresponding in position to the two bond pads. The openings are aligned in the same direction and expose at least a first sidewall and a second sidewall of each of the two bond pads. The first sidewall is perpendicular to an alignment direction of the bond pads and the second sidewall is parallel to the alignment direction of the bond pads. A distance between the first sidewall of at least one of the bond pads and a corresponding side of a corresponding one of the openings is at least about 50 ?m greater than a distance between the second sidewall of the at least one bond pad and a corresponding side of the corresponding opening.
    Type: Application
    Filed: August 4, 2009
    Publication date: November 26, 2009
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Fang-Lin Tsai, Ho-Yi Tsai, Wen-Tsung Tseng, Chih-Ming Huang
  • Publication number: 20090284851
    Abstract: A device for locking lens and a method for the same are provided. The device is used in a voice-coil motor of a photographing module of a cell phone. The voice-coil motor has a lens-stand for a lens being turned to a locking depth inside. The device includes a circumgyration-stop instrument having a first sustaining surface, and a focusing ring having a turning end. A turn-locking length of the turning end is equal to the locking depth inside. The device includes a circumgyration-stop preventing a pressure being persisted to apply on the lens as the focusing ring finishes the turn of the lens. The first turn-stop surface props the first sustaining surface as the focusing ring is turned to an extremity of the turn-locking length. The focusing ring accordingly escapes the circumgyration-stop instrument for finishing the focusing of the lens in the lens-stand.
    Type: Application
    Filed: January 14, 2009
    Publication date: November 19, 2009
    Applicant: Mustek Technology Co., LTD
    Inventors: Chih-Ming Huang, Chih-Lun Chen
  • Publication number: 20090284850
    Abstract: A device and a method for locking lens in a lens holder are provided, wherein the lens is configured in a voice-coil motor (VCM) of a camera module of a cell phone and the VCM has a lens holder for a lens being fixed inside. The device includes a circumgyration stop instrument having a bottom surface for urging against the top surface of the lens holder for preventing a lateral stress and a lateral movement from occurring on the lens holder while the circumgyration stopping unit is coupled with the lens holder.
    Type: Application
    Filed: January 14, 2009
    Publication date: November 19, 2009
    Applicant: MUSTEK TECHNOLOGY CO.,LTD
    Inventors: Chih-Ming Huang, Chih-Lun Chen
  • Publication number: 20090282673
    Abstract: A lens-fastening apparatus for assembling a voice coil motor of a camera module is provided. The voice coil motor has a lens holder. The lens-fastening apparatus includes a guiding plate; a rotation stopping jig having a central and a lateral portions, disposed on the guiding plate, and fit with the lens holder for stopping a rotation of the lens holder; a focusing ring for rotating the lens; a first pressing device pressing the central portion of the rotation stopping jig to fasten the rotation stopping jig on the guiding plate; and a second pressing device pressing the lateral portion of the rotation stopping jig.
    Type: Application
    Filed: December 15, 2008
    Publication date: November 19, 2009
    Inventors: Chih-Ming Huang, Chih-Lun Chen
  • Publication number: 20090261476
    Abstract: A semiconductor device and a manufacturing method thereof are disclosed. The method includes the steps of providing a carrier board having conductive circuits disposed thereon and a plurality of chips with active surfaces having solder pads disposed thereon, wherein conductive bumps are disposed on the solder pads; mounting chips on the carrier board; filling the spacing between the chips with a dielectric layer and forming openings in the dielectric layer at periphery of each chip to expose the conductive circuits; forming a metal layer in the openings of the dielectric layer and at periphery of the active surface of the chips for electrically connecting the conductive bumps and the conductive circuits; and cutting along the dielectric layer between the chips and removing the carrier board to separate each chip and exposing the conductive circuits from the non-active surface.
    Type: Application
    Filed: April 18, 2008
    Publication date: October 22, 2009
    Applicant: Siliconware Precision Industries Co., Ltd.
    Inventors: Chien-Ping Huang, Chin-Huang Chang, Chih-Ming Huang, Cheng-Hsu Hsiao, Chun-Chi Ke
  • Patent number: 7573722
    Abstract: An electronic carrier board is provided, including a carrier, at least two paired bond pads formed on the carrier, and a protective layer covering the carrier. The protective layer is formed with openings corresponding in position to the two bond pads. The openings are aligned in the same direction and expose at least a first sidewall and a fourth sidewall of each of the two bond pads. The first sidewall and the fourth sidewall are both perpendicular to an alignment direction of the bond pads. A distance between the first sidewall of at least one of the bond pads and a corresponding side of a corresponding one of the openings is at least about 50 ?m greater than a distance between the fourth sidewall of the at least one bond pad and a corresponding side of the corresponding opening.
    Type: Grant
    Filed: January 16, 2007
    Date of Patent: August 11, 2009
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Fang-Lin Tsai, Ho-Yi Tsai, Wen-Tsung Tseng, Chih-Ming Huang
  • Publication number: 20090166831
    Abstract: This invention provides a sensor semiconductor package and a method for fabricating the same. The method includes: mounting on a substrate a sensor chip having a sensor area; electrically connecting the sensor chip and the substrate by means of bonding wires; forming on a transparent member an adhesive layer with an opening corresponding in position to the sensor area; and mounting the transparent member on the substrate via the adhesive layer while heating the substrate, such that the adhesive layer melts, to thereby encapsulate the periphery of the sensor chip and the bonding wires while exposing the sensor area from the adhesive layer. Thus, the sensor area is sealed by the transparent member cooperative with the adhesive layer, making the sensor semiconductor package thus-obtained dam-free, light, thin, and compact, and incurs low process costs. Also, the product reliability is enhanced since the bonding wires are encapsulated by the adhesive layer without severing concern.
    Type: Application
    Filed: December 29, 2008
    Publication date: July 2, 2009
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Tse-Wen Chang, Chang-Yueh Chan, Chin-Huang Chang, Chih-Ming Huang
  • Publication number: 20090103913
    Abstract: A multifunctional supporting frame for a web camera, comprises a movable supporting clamping seat having a hollow rectangular receiving chamber; the rectangular receiving chamber being formed by an upper L shape sheet, a middle U shape sheet, and a lower enclosed rectangular sheet; one lateral side of the L shape sheet being extended with a sheet plate; at least one guide post being extended from one surface of the sheet plate; the guide posts being combined with springs so as to be formed as a telescopic structure which is adjustable to have a desire width for clamping an object; and a bendable shaft seat formed by an upper U shape plate and a lower U shape plate which are pivotally engaged. A lens set is installed above the movable supporting clamping seat by using a lens set pin seat.
    Type: Application
    Filed: October 19, 2007
    Publication date: April 23, 2009
    Inventor: Chih-Ming Huang
  • Publication number: 20090093089
    Abstract: A heat dissipating semiconductor package and a fabrication method thereof are provided. A semiconductor chip is mounted on a chip carrier. A heat sink is mounted on the chip, and includes an insulating core layer, a thin metallic layer formed on each of an upper surface and a lower surface of the insulating core layer and a thermal via hole formed in the insulating core layer. A molding process is performed to encapsulate the chip and the heat sink with an encapsulant to form a package unit. A singulation process is performed to peripherally cut the package unit. A part of the encapsulant above the thin metallic layer on the upper surface of the heat sink is removed, such that the thin metallic layer on the upper surface of the heat sink is exposed, and heat generated by the chip can be dissipated through the heat sink.
    Type: Application
    Filed: September 30, 2008
    Publication date: April 9, 2009
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chien-Ping Huang, Chih-Ming Huang
  • Patent number: 7508066
    Abstract: A heat dissipating semiconductor package and a fabrication method thereof are provided. A semiconductor chip is mounted on a chip carrier. A heat sink is mounted on the chip, and includes an insulating core layer, a thin metallic layer formed on each of an upper surface and a lower surface of the insulating core layer and a thermal via hole formed in the insulating core layer. A molding process is performed to encapsulate the chip and the heat sink with an encapsulant to form a package unit. A singulation process is performed to peripherally cut the package unit. A part of the encapsulant above the thin metallic layer on the upper surface of the heat sink is removed, such that the thin metallic layer on the upper surface of the heat sink is exposed, and heat generated by the chip can be dissipated through the heat sink.
    Type: Grant
    Filed: November 3, 2005
    Date of Patent: March 24, 2009
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chien-Ping Huang, Chih-Ming Huang
  • Publication number: 20090057799
    Abstract: A sensor semiconductor device and a method for fabricating the same are provided. At least one sensor chip is mounted and electrically connected to a lead frame. A first and a second encapsulation molding processes are sequentially performed to form a transparent encapsulant for encapsulating the sensor chip and a part of the lead frame and to form a light-impervious encapsulant for encapsulating the transparent encapsulant. The transparent encapsulant has a light-pervious portion formed at a position corresponding to and above a sensor zone of the sensor chip. The light-pervious portion is exposed from the light-impervious encapsulant. Light may penetrate the light-pervious portion, without using an additional cover board, thereby reducing manufacturing steps and costs.
    Type: Application
    Filed: August 26, 2008
    Publication date: March 5, 2009
    Applicant: Siliconware Precision Industries Co., Ltd.
    Inventors: Chang-Yueh Chan, Chih-Ming Huang, Chien-Ping Huang, Chin-Huang Chang, Cheng-Hsu Hsiao
  • Publication number: 20090039527
    Abstract: A sensor-type package and a method for fabricating the same are provided. A wafer having a plurality of semiconductor chips is provided, wherein a plurality of holes are formed on a first surface of each of the semiconductor chips, and a plurality of metallic pillars formed in the holes and a plurality of bond pads connected to the metallic pillars form through silicon vias (TSVs). A groove is formed on a second surface of each of the semiconductor chips to expose the metallic pillars. A plurality of sensor chips having TSVs are stacked in the grooves of the semiconductor chips and electrically connected to the exposed metallic pillars. A transparent cover is mounted onto the second surfaces of the semiconductor chips to cover the grooves. A plurality of conductive components are implanted on the bond pads of the semiconductor chips. The wafer is cut along borders among the semiconductor chips.
    Type: Application
    Filed: August 6, 2008
    Publication date: February 12, 2009
    Applicant: Siliconware Precision Industries Co., Ltd.
    Inventors: Chang-Yueh Chan, Chien-Ping Huang, Tse-Wen Chang, Chin-Huang Chang, Chih-Ming Huang
  • Publication number: 20090039488
    Abstract: A semiconductor package and a method for fabricating the same are provided. A leadframe including a die pad and a plurality of peripheral leads is provided. A carrier, having a plurality of connecting pads formed thereon, is attached to the die pad, wherein a planar size of the carrier is greater than that of the die pad, allowing the connecting pads on the carrier to be exposed from the die pad. At least a semiconductor chip is attached to a side of an assembly including the die pad and the carrier, and is electrically connected to the connecting pads of the carrier and the leads via bonding wires. A package encapsulant encapsulates the semiconductor chip, the bonding wires, a part of the carrier and a part of the leadframe, allowing a bottom surface of the carrier and a part of the leads to be exposed from the package encapsulant.
    Type: Application
    Filed: August 11, 2008
    Publication date: February 12, 2009
    Applicant: Siliconware Precision Industries Co., Ltd.
    Inventors: Chang-Yueh Chan, Chih-Ming Huang, Chun-Yuan Li, Chih-Hsin Lai
  • Publication number: 20090014860
    Abstract: A multi-chip stack structure and a manufacturing method thereof are provided. The fabrication method includes the steps of: providing a chip carrier having a first surface and a second surface opposing thereto and at least a first chip and a second chip mounted on the first surface; electrically connecting the chips to the chip carrier by a plurality of bonding wires; and stacking at least a third chip on the first and second chips by a film deposed therebetween, wherein the third chip is stepwise stacked on the first chip and at least a part of the bonding wire connected to the second chip is covered by the film, and electrically connecting the third chip and the chip carrier by a bonding wire, thereby enabling a plurality of chips to be stacked on the chip carrier to enhance the electrical performance of electronic products.
    Type: Application
    Filed: January 29, 2008
    Publication date: January 15, 2009
    Applicant: Siliconware Precision Industries Co., Ltd.
    Inventors: Chung-Lun Liu, Jung-Pin Huang, Chin-Huang Chang, Chih-Ming Huang, Cheng-Hsu Hsiao