Patents by Inventor Chih-Pin TSAO

Chih-Pin TSAO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9520502
    Abstract: A FinFET and methods for forming a FinFET are disclosed. A method includes forming a semiconductor fin on a substrate, implanting the semiconductor fin with dopants, and forming a capping layer on a top surface and sidewalls of the semiconductor fin. The method further includes forming a dielectric on the capping layer, and forming a gate electrode on the dielectric.
    Type: Grant
    Filed: October 15, 2013
    Date of Patent: December 13, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Hua Yu, Chih-Pin Tsao, Hou-Yu Chen
  • Patent number: 9502253
    Abstract: A method of forming an integrated circuit comprises forming a first doped region in a substrate using a first angle ion implantation performed on a first side of a gate structure. The gate structure has a length in a first direction and a width in a second direction. The method also comprises forming a second doped region in the substrate using a second angle ion implantation performed on a second side of the gate structure. The first angle ion implantation has a first implantation angle with respect to the second direction and the second angle ion implantation has a second implantation angle with respect to the second direction. Each of the first implantation angle and the second implantation angle is substantially larger than 0° and less than 90°.
    Type: Grant
    Filed: September 18, 2014
    Date of Patent: November 22, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Zhiqiang Wu, Yi-Ming Sheu, Tsung-Hsing Yu, Kuan-Lun Cheng, Chih-Pin Tsao, Wen-Yuan Chen, Chun-Fu Cheng, Chih-Ching Wang
  • Publication number: 20150102392
    Abstract: A FinFET and methods for forming a FinFET are disclosed. A method includes forming a semiconductor fin on a substrate, implanting the semiconductor fin with dopants, and forming a capping layer on a top surface and sidewalls of the semiconductor fin. The method further includes forming a dielectric on the capping layer, and forming a gate electrode on the dielectric.
    Type: Application
    Filed: October 15, 2013
    Publication date: April 16, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Hua Yu, Chih-Pin Tsao, Hou-Yu Chen
  • Publication number: 20150044847
    Abstract: A method of forming an integrated circuit comprises forming a first doped region in a substrate using a first angle ion implantation performed on a first side of a gate structure. The gate structure has a length in a first direction and a width in a second direction. The method also comprises forming a second doped region in the substrate using a second angle ion implantation performed on a second side of the gate structure. The first angle ion implantation has a first implantation angle with respect to the second direction and the second angle ion implantation has a second implantation angle with respect to the second direction. Each of the first implantation angle and the second implantation angle is substantially larger than 0° and less than 90°.
    Type: Application
    Filed: September 18, 2014
    Publication date: February 12, 2015
    Inventors: Zhiqiang WU, Yi-Ming SHEU, Tsung-Hsing YU, Kuan-Lun CHENG, Chih-Pin TSAO, Wen-Yuan CHEN, Chun-Fu CHENG, Chih-Ching WANG
  • Patent number: 8859380
    Abstract: A method of forming an integrated circuit includes forming a plurality of gate structures longitudinally arranged along a first direction over a substrate. A plurality of angle ion implantations are performed to the substrate. Each of the angle ion implantations has a respective implantation angle with respect to a second direction. The second direction is substantially parallel with a surface of the substrate and substantially orthogonal to the first direction. Each of the implantation angles is substantially larger than 0°.
    Type: Grant
    Filed: November 11, 2010
    Date of Patent: October 14, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Zhiqiang Wu, Yi-Ming Sheu, Tsung-Hsing Yu, Kuan-Lun Cheng, Chih-Pin Tsao, Wen-Yuan Chen, Chun-Fu Cheng, Chih-Ching Wang
  • Publication number: 20140252489
    Abstract: A method of forming a FinFET with a rounded source/drain profile comprises forming a fin in a substrate, etching a source/drain recess in the fin, forming a plurality of source/drain layers in the source/drain recess; and etching at least one of the plurality of source/drain layers. The source/drain layers may be a silicon germanium compound. Etching at the source/drain layers may comprises partially etching each of the plurality of source/drain layers prior to forming subsequent layers of the plurality of source/drain layers. The source/drain layers may be formed with a thickness at a top corner of about 15 nm, and the source/drain layers may each be etched back by about 3 nm prior to forming subsequent layers of the plurality of source/drain layers. Forming the plurality of source/drain layers optionally comprises forming at least five source/drain layers.
    Type: Application
    Filed: March 11, 2013
    Publication date: September 11, 2014
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Hua Yu, Chih-Pin Tsao, Pei-Ren Jeng, Tze-Liang Lee
  • Publication number: 20120119298
    Abstract: A method of forming an integrated circuit includes forming a plurality of gate structures longitudinally arranged along a first direction over a substrate. A plurality of angle ion implantations are performed to the substrate. Each of the angle ion implantations has a respective implantation angle with respect to a second direction. The second direction is substantially parallel with a surface of the substrate and substantially orthogonal to the first direction. Each of the implantation angles is substantially larger than 0°.
    Type: Application
    Filed: November 11, 2010
    Publication date: May 17, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Zhiqiang WU, Yi-Ming SHEU, Tsung-Hsing YU, Kuan-Lun CHENG, Chih-Pin TSAO, Wen-Yuan CHEN, Chun-Fu CHENG, Chih-Ching WANG