Patents by Inventor Chih-Tsung Lee
Chih-Tsung Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210066096Abstract: An apparatus for fabricating a semiconductor device has a housing defining a buffer chamber, a plurality of reactor ports formed in the housing for establishing interfaces with a plurality of process chambers that are to receive a wafer during a fabrication process to fabricate the semiconductor device, a wafer positioning robot positioned within the buffer chamber to transport the wafer between the plurality of process chambers through the plurality of reactor ports, a purge port formed in the housing for introducing a purge gas into the buffer chamber, a pump port formed in the housing for exhausting a portion of the purge gas from the buffer chamber, and a first flow enhancer that directs the purge gas flowing in an axial direction along a longitudinal axis of the purge port into the buffer chamber in a plurality of radial directions relative to the longitudinal axis.Type: ApplicationFiled: August 26, 2020Publication date: March 4, 2021Inventors: Chih-Tsung LEE, Sheng-Chun YANG, Yun-Tzu CHIU, Chao-Hung WAN, Yi-Ming LIN, Chyi-Tsong NI
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Publication number: 20210026412Abstract: A display, including a supporting layer and a flexible display panel, is provided. The supporting layer has at least two extending sections and at least one bending section, connected therebetween and adapted to be bent along an axis as a rotation axis. The supporting layer has at least one groove at the bending section and at least one indentation at a bottom surface of the groove. An extending direction of the groove is parallel to the axis. An extending direction of the indentation is not parallel to the axis. The supporting layer has a first thickness at each extending section, a second thickness at the groove, and a third thickness at the indentation. The first, second, and third thicknesses are different from one another. The flexible display is disposed on the supporting layer. The groove and the flexible display are respectively located on two opposite sides of the supporting layer.Type: ApplicationFiled: July 9, 2020Publication date: January 28, 2021Applicant: Au Optronics CorporationInventors: Chih-Tsung Lee, Zih-Shuo Huang, Kun-Lung Hsieh, Kai-Yu Yu
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Publication number: 20210027669Abstract: A flexible device array substrate includes: a substrate, a metal-containing layer, and an electronic component layer. The metal-containing layer is disposed on the substrate. The metal-containing layer includes: a first layer and a second layer. The first layer is located on a side close to the substrate, and the first layer contains a first metal oxide to form a peeling interface in the first layer. The second layer is located on a side away from the substrate, and the second layer contains a second metal oxide. The oxidation number of the metal in the second metal oxide is smaller than the oxidation number of the metal in the first metal oxide. The electronic component layer is disposed above the metal-containing layer. A method of manufacturing the flexible device array substrate is also provided.Type: ApplicationFiled: July 2, 2020Publication date: January 28, 2021Applicant: Au Optronics CorporationInventors: Tsung-Ying Ke, Chih-Tsung Lee, Ting Kang
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Publication number: 20210029838Abstract: A display, including a carrying main body, a flexible carrier film, a double-sided tape, and an adhesive layer, is provided. The flexible carrier film includes a first bonding section and a second bonding section respectively disposed on two opposite sides of the carrying main body, and a bending section connected between the first bonding section and the second bonding section. The flexible carrier film has an inner surface and an outer surface opposite to each other. The inner surface has at least one first groove at the bending section. The flexible carrier film has a display layer thereon. At least a part of the display layer is connected to the outer surface at the second bonding section. The double-sided tape is disposed between the first bonding section and the carrying main body. The adhesive layer is disposed between the inner surface and the carrying main body at the bending section.Type: ApplicationFiled: July 1, 2020Publication date: January 28, 2021Applicant: Au Optronics CorporationInventors: Chih-Tsung Lee, Chih-Chieh Lin, Yi-Wei Tsai, Ko-Chin Chung
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Patent number: 10811263Abstract: A method for forming a semiconductor device structure is provided. The method includes disposing a semiconductor substrate in a physical vapor deposition (PVD) chamber and introducing a plasma-forming gas into the PVD chamber. The plasma-forming gas is an oxygen-containing gas. The method also includes applying a radio frequency (RF) power by a power source to a metal target in the PVD chamber to excite the plasma-forming gas to generate plasma. The metal target is directly electrically coupled to the power source. The method further includes directing the plasma towards the metal target positioned in the PVD chamber such that an etch stop layer is formed over the semiconductor substrate.Type: GrantFiled: December 30, 2019Date of Patent: October 20, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Ya-Ling Lee, Shing-Chyang Pan, Keng-Chu Lin, Wen-Cheng Yang, Chih-Tsung Lee, Victor Y. Lu
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Publication number: 20200235334Abstract: A display apparatus includes a substrate, an element layer, a protective film, a mechanical member, a first adhesive layer and a second adhesive layer. An opening of the protective film is located between a first portion of the protective film and a second portion of the protective film. The first portion of the protective film, the second portion of the protective film and the opening of the protective film are respectively overlapped with a first portion of the substrate, a second portion of the substrate and a third portion of the substrate. The first adhesive layer and the second adhesive layer are respectively disposed on a first surface and a second surface of the mechanical member. The third portion of the substrate is connected between the first portion of the substrate and the second portion of the substrate, and the third portion of the substrate is bent.Type: ApplicationFiled: October 4, 2019Publication date: July 23, 2020Applicant: Au Optronics CorporationInventors: Chih-Tsung Lee, Zih-Shuo Huang, Yi-Wei Tsai, Ko-Chin Chung, Ming-Chang Hsu, Heng-Chia Hsu
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Publication number: 20200144063Abstract: A method for forming a semiconductor device structure is provided. The method includes disposing a semiconductor substrate in a physical vapor deposition (PVD) chamber and introducing a plasma-forming gas into the PVD chamber. The plasma-forming gas is an oxygen-containing gas. The method also includes applying a radio frequency (RF) power by a power source to a metal target in the PVD chamber to excite the plasma-forming gas to generate plasma. The metal target is directly electrically coupled to the power source. The method further includes directing the plasma towards the metal target positioned in the PVD chamber such that an etch stop layer is formed over the semiconductor substrate.Type: ApplicationFiled: December 30, 2019Publication date: May 7, 2020Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Ya-Ling LEE, Shing-Chyang PAN, Keng-Chu LIN, Wen-Cheng YANG, Chih-Tsung LEE, Victor Y. LU
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Patent number: 10522360Abstract: A method for forming a semiconductor device structure is provided. The method includes disposing a semiconductor substrate in a physical vapor deposition (PVD) chamber. The method also includes introducing a plasma-forming gas into the PVD chamber, and the plasma-forming gas contains an oxygen-containing gas. The method further includes applying a radio frequency (RF) power to a metal target in the PVD chamber to excite the plasma-forming gas to generate plasma. In addition, the method includes directing the plasma towards the metal target positioned in the PVD chamber such that an etch stop layer is formed over the semiconductor substrate.Type: GrantFiled: October 12, 2017Date of Patent: December 31, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Ya-Ling Lee, Shing-Chyang Pan, Keng-Chu Lin, Wen-Cheng Yang, Chih-Tsung Lee, Victor Y. Lu
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Publication number: 20190337116Abstract: A method of using a polishing system includes securing a wafer to a support, wherein the wafer has a first diameter. The method further includes polishing the wafer using a first polishing pad rotating about a first axis, wherein the first polishing pad has a second diameter greater than the first diameter. The method further includes rotating the support about a second axis perpendicular to the first axis after polishing the wafer using the first polishing pad. The method further includes polishing the wafer using a second polishing pad after rotating the support, wherein the second polishing pad has a third diameter less than the first diameter. The method further includes releasing the wafer from the support following polishing the wafer using the second polishing pad.Type: ApplicationFiled: July 18, 2019Publication date: November 7, 2019Inventors: Shih-Chi LIN, Kun-Tai WU, You-Hua CHOU, Chih-Tsung LEE, Min Hao HONG, Chih-Jen WU, Chen-Ming HUANG, Soon-Kang HUANG, Chin-Hsiang CHANG, Chih-Yuan YANG
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Patent number: 10357867Abstract: A polishing system includes a wafer support that holds a wafer, the wafer having a first diameter. The polishing system further includes a first polishing pad that polishes a first region of the wafer, the first polishing pad having a second diameter greater than the first diameter. The polishing system further includes an auxiliary polishing system comprising at least one second polishing pad that polishes a second region of the wafer, wherein the second polishing pad has a third diameter less than the first diameter, and the wafer support is configured to support the wafer during use of the first polishing pad and the auxiliary polishing system.Type: GrantFiled: July 18, 2017Date of Patent: July 23, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shih-Chi Lin, Kun-Tai Wu, You-Hua Chou, Chih-Tsung Lee, Min Hao Hong, Chih-Jen Wu, Chen-Ming Huang, Soon-Kang Huang, Chin-Hsiang Chang, Chih-Yuan Yang
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Patent number: 10269573Abstract: A device includes a pedestal. The pedestal includes a ground electrode, a central portion, and a peripheral portion. The ground electrode includes a top surface from which the peripheral portion is projected, thereby having a height difference between the central portion and the peripheral portion.Type: GrantFiled: March 31, 2014Date of Patent: April 23, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Kun-Mo Lin, Keith Kuang-Kuo Koai, Chih-Tsung Lee, Victor Y. Lu, Yi-Hung Lin
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Patent number: 10269560Abstract: A method for manufacturing semiconductor structure is disclosed. The method includes: providing a semiconductor substrate; hydrogenizing a surface of the semiconductor substrate; supplying a precursor to the surface of the semiconductor substrate; and supplying a reactant to the surface of the semiconductor substrate. An associated method for performing an atomic layer deposition (ALD) upon a semiconductor substrate and an associated atomic layer deposition (ALD) method are also disclosed.Type: GrantFiled: June 15, 2016Date of Patent: April 23, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Yun-Tzu Chiu, Hsueh-Hui Kuo, Lin-Jung Wu, Chih-Tsung Lee
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Patent number: 10190209Abstract: A thin film deposition system and method provide for multiple target assemblies that may be separately powered. Each target assembly includes a target and associated magnet or set of magnets. The disclosure provides a tunable film profile produced by multiple power sources that separately power the target arrangements. The relative amounts of power supplied to the target arrangements may be customized to provide a desired film and may be varied in time to produce a film with varied characteristics.Type: GrantFiled: July 17, 2017Date of Patent: January 29, 2019Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chung-En Kao, Ming-Chin Tsai, You-Hua Chou, Chen-Chia Chiang, Chih-Tsung Lee, Ming-Shiou Kuo
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Publication number: 20180166285Abstract: A method for forming a semiconductor device structure is provided. The method includes disposing a semiconductor substrate in a physical vapor deposition (PVD) chamber. The method also includes introducing a plasma-forming gas into the PVD chamber, and the plasma-forming gas contains an oxygen-containing gas. The method further includes applying a radio frequency (RF) power to a metal target in the PVD chamber to excite the plasma-forming gas to generate plasma. In addition, the method includes directing the plasma towards the metal target positioned in the PVD chamber such that an etch stop layer is formed over the semiconductor substrate.Type: ApplicationFiled: October 12, 2017Publication date: June 14, 2018Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ya-Ling LEE, Shing-Chyang PAN, Keng-Chu LIN, Wen-Cheng YANG, Chih-Tsung LEE, Victor Y. LU
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Patent number: 9982340Abstract: An apparatus comprises: a shower head having a supply plenum for supplying the gas to the chamber and a vacuum manifold fluidly coupled to the supply plenum; and at least one vacuum system fluidly coupled to the vacuum manifold of the shower head.Type: GrantFiled: April 4, 2012Date of Patent: May 29, 2018Assignee: Taiwan Semiconductor Manufacturing Co. Ltd.Inventors: Chih-Tsung Lee, Hung Jui Chang, You-Hua Chou, Shiu-Ko Jangjian, Chung-En Kao, Ming-Chin Tsai, Huan-Wen Lai
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Patent number: 9976215Abstract: An apparatus and method are disclosed for forming thin films on a semiconductor substrate. The apparatus in one embodiment includes a process chamber configured for supporting the substrate, a gas excitation power source, and first and second gas distribution showerheads fluidly coupled to a reactive process gas supply containing film precursors. The showerheads dispense the gas into two different zones above the substrate, which is excited to generate an inner plasma field and an outer plasma field over the wafer. The apparatus deposits a material on the substrate in a manner that promotes the formation of a film having a substantially uniform thickness across the substrate. In one embodiment, the substrate is a wafer. Various embodiments include first and second independently controllable power sources connected to the first and second showerheads to vary the power level and plasma intensity in each zone.Type: GrantFiled: May 1, 2012Date of Patent: May 22, 2018Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: You-Hua Chou, Chih-Tsung Lee, Shu-Fen Wu, Chin-Hsiang Lin
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Publication number: 20170365483Abstract: A method for manufacturing semiconductor structure is disclosed. The method includes: providing a semiconductor substrate; hydrogenizing a surface of the semiconductor substrate; supplying a precursor to the surface of the semiconductor substrate; and supplying a reactant to the surface of the semiconductor substrate. An associated method for performing an atomic layer deposition (ALD) upon a semiconductor substrate and an associated atomic layer deposition (ALD) method are also disclosed.Type: ApplicationFiled: June 15, 2016Publication date: December 21, 2017Inventors: YUN-TZU CHIU, HSUEH-HUI KUO, LIN-JUNG WU, CHIH-TSUNG LEE
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Publication number: 20170314121Abstract: A thin film deposition system and method provide for multiple target assemblies that may be separately powered. Each target assembly includes a target and associated magnet or set of magnets. The disclosure provides a tunable film profile produced by multiple power sources that separately power the target arrangements. The relative amounts of power supplied to the target arrangements may be customized to provide a desired film and may be varied in time to produce a film with varied characteristics.Type: ApplicationFiled: July 17, 2017Publication date: November 2, 2017Inventors: Chung-En Kao, Ming-Chin Tsai, You-Hua Chou, Chen-Chia Chiang, Chih-Tsung Lee, Ming-Shiou Kuo
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Publication number: 20170312881Abstract: A polishing system includes a wafer support that holds a wafer, the wafer having a first diameter. The polishing system further includes a first polishing pad that polishes a first region of the wafer, the first polishing pad having a second diameter greater than the first diameter. The polishing system further includes an auxiliary polishing system comprising at least one second polishing pad that polishes a second region of the wafer, wherein the second polishing pad has a third diameter less than the first diameter, and the wafer support is configured to support the wafer during use of the first polishing pad and the auxiliary polishing system.Type: ApplicationFiled: July 18, 2017Publication date: November 2, 2017Inventors: Shih-Chi LIN, Kun-Tai WU, You-Hua CHOU, Chih-Tsung LEE, Min Hao HONG, Chih-Jen WU, Chen-Ming HUANG, Soon-Kang HUANG, Chin-Hsiang CHANG, Chih-Yuan YANG
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Patent number: 9718164Abstract: A polishing system for polishing a semiconductor wafer includes a wafer support for holding the semiconductor wafer, and a first polishing pad for polishing a region of the semiconductor wafer. The semiconductor wafer has a first diameter, and the first polishing pad has a second diameter shorter than the first diameter.Type: GrantFiled: December 6, 2012Date of Patent: August 1, 2017Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Shih-Chi Lin, Kun-Tai Wu, You-Hua Chou, Chih-Tsung Lee, Min Hao Hong, Chih-Jen Wu, Chen-Ming Huang, Soon-Kang Huang, Chin-Hsiang Chang, Chih-Yuan Yang