Patents by Inventor Chih-Yang Huang
Chih-Yang Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11967272Abstract: A sweep voltage generator and a display panel are provided. The sweep voltage generator includes an output node, a current generating block and a voltage regulating block. The output node is used to provide a sweep signal. The current generating block is coupled to the output node, includes a detection path for detecting an output load variation on the output node, and adjusts the sweep signal provided by the output node based on the output load variation. The voltage regulating block is coupled to the output node for regulating a voltage of the output node.Type: GrantFiled: December 9, 2022Date of Patent: April 23, 2024Assignees: AUO Corporation, National Cheng-Kung UniversityInventors: Chih-Lung Lin, Yi-Chen Huang, Chih-I Liu, Po-Cheng Lai, Ming-Yang Deng, Chia-En Wu, Ming-Hung Chuang, Chia-Tien Peng
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Publication number: 20240114688Abstract: A memory structure including a substrate, a first doped region, a second doped region, a first gate, a second gate, a first charge storage structure, and a second charge storage structure is provided. The first gate is located on the first doped region. The second gate is located on the second doped region. The first charge storage structure is located between the first gate and the first doped region. The first charge storage structure includes a first tunneling dielectric layer, a first dielectric layer, and a first charge storage layer. The second charge storage structure is located between the second gate and the second doped region. The second charge storage structure includes a second tunneling dielectric layer, a second dielectric layer, and a second charge storage layer. The thickness of the second tunneling dielectric layer is greater than the thickness of the first tunneling dielectric layer.Type: ApplicationFiled: November 21, 2022Publication date: April 4, 2024Applicant: United Microelectronics Corp.Inventors: Chia-Wen Wang, Chien-Hung Chen, Chia-Hui Huang, Ling Hsiu Chou, Jen Yang Hsueh, Chih-Yang Hsu
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Patent number: 11923405Abstract: The present disclosure is directed to a semiconductor device. The semiconductor device includes a substrate, an insulating layer disposed on the substrate, a first conductive feature disposed in the insulating layer, and a capacitor structure disposed on the insulating layer. The capacitor structure includes a first electrode, a first dielectric layer, a second electrode, a second dielectric layer, and a third electrode sequentially stacked. The semiconductor device also includes a first via connected to the first electrode and the third electrode, a second via connected to the second electrode, and a third via connected to the first conductive feature. A part of the first via is disposed in the insulating layer. A portion of the first conductive feature is directly under the capacitor structure.Type: GrantFiled: May 23, 2022Date of Patent: March 5, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTDInventors: Chih-Fan Huang, Hung-Chao Kao, Yuan-Yang Hsiao, Tsung-Chieh Hsiao, Hsiang-Ku Shen, Hui-Chi Chen, Dian-Hau Chen, Yen-Ming Chen
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Publication number: 20240016873Abstract: Provided is an herbal composition including an extract from an herbal raw material including at least one of Artemisia argyi, Ohwia caudata, Anisomeles indica (L.) O. Ktze, Ophiopogon japonicus, Houttuynia cordata, Platycodon grandiflorus, Glycyrrhiza uralensis, Perilla frutescens, and chrysanthemum. Also provided is a method for preparing the herbal composition and a method for preventing or treating a viral infection by administering an effective amount of the herbal composition to a subject in need thereof.Type: ApplicationFiled: December 10, 2021Publication date: January 18, 2024Inventors: Cheng-Yen SHIH, Pi-Yu LIN, Shinn-Zong LIN, Chih-Yang HUANG, Tsung-Jung HO, Chien-Yi CHIANG, Yu-Jung LIN, Marthandam Asokan SHIBU, Wai-Ling LIM
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Patent number: 11690221Abstract: A charge pump circuit includes a power switch, a first pull-low circuit, an output pull-low circuit, a first charge pump stage and an output charge pump stage. The power switch receives an enabling signal. The first pull-low circuit and the output pull-low circuit receive a pull-low signal. The first charge pump stage includes a first boost capacitor used to receive a first phase signal, a first transfer transistor, a first gate-control transistor and a first storage capacitor used to receive a second phase signal. The output charge pump stage includes an output boost capacitor used to receive a third phase signal, an output transfer transistor and an output gate-control transistor. The charge pump circuit generates voltages in an erasing operation, a program operation and a read operation according to the enabling signal, the pull-low signal, the first phase signal, the second phase signal and the third phase signal.Type: GrantFiled: August 2, 2021Date of Patent: June 27, 2023Assignee: eMemory Technology Inc.Inventors: Wei-Chiang Ong, Tsung-Ta Hsieh, Chih-Yang Huang
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Publication number: 20230145213Abstract: Provided is a pre-conditioned mesenchymal stem cell (MSC), an exosome derived therefrom, and a cell-protective composition including the pre-conditioned MSC or the exosome. Also provided is a method for preparing the pre-conditioned MSC by contacting an MSC with an effective amount of ginkgolide A. Still provided is a method for promoting recovery or reducing death of damaged nerve cells, including administering to the damaged nerve cells a composition including the pre-conditioned MSC or the exosome.Type: ApplicationFiled: November 1, 2022Publication date: May 11, 2023Inventors: CHIH-YANG HUANG, YU-JUNG LIN, SHAO-TSU CHEN, TZU-YING LIN
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Publication number: 20230008796Abstract: A method of treating pancreas damage is provided, the method comprises administrating a pharmaceutical composition to a subject in need thereof. The pharmaceutical composition comprises a plurality of pretreated adipose-derived stem cells and an ester type catechin, wherein the plurality of pretreated adipose-derived stem cells are cultured with the ester type catechin.Type: ApplicationFiled: September 7, 2022Publication date: January 12, 2023Inventors: SHAW-YIH LIOU, CHIH-YANG HUANG, TSAI-JUI LIOU, TUNG-SHENG CHEN, I-TE LIOU
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Publication number: 20220370581Abstract: A vaccine including a vector and a transgene is provided. The transgene encodes a plurality of peptides and is packaged in the vector, in which the peptides in order include a secretion signal peptide, at least one tumor antigen, at least one co-inhibitory peptide and a toll-like receptor 9 (TLR9) antagonist.Type: ApplicationFiled: May 17, 2022Publication date: November 24, 2022Applicant: China Medical UniversityInventors: Kun-San Chao, Kevin Chih-Yang Huang, Shu-Fen Chiang
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Publication number: 20220052605Abstract: A charge pump circuit includes a power switch, a first pull-low circuit, an output pull-low circuit, a first charge pump stage and an output charge pump stage. The power switch receives an enabling signal. The first pull-low circuit and the output pull-low circuit receive a pull-low signal. The first charge pump stage includes a first boost capacitor used to receive a first phase signal, a first transfer transistor, a first gate-control transistor and a first storage capacitor used to receive a second phase signal. The output charge pump stage includes an output boost capacitor used to receive a third phase signal, an output transfer transistor and an output gate-control transistor. The charge pump circuit generates voltages in an erasing operation, a program operation and a read operation according to the enabling signal, the pull-low signal, the first phase signal, the second phase signal and the third phase signal.Type: ApplicationFiled: August 2, 2021Publication date: February 17, 2022Applicant: eMemory Technology Inc.Inventors: Wei-Chiang Ong, Tsung-Ta Hsieh, Chih-Yang Huang
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Publication number: 20210069252Abstract: A use of a pharmaceutical composition in preparing a drug for treating pancreas damage. The pharmaceutical composition comprises pretreated adipose-derived stem cells and ester-type catechin, wherein the pretreated adipose-derived stem cells are obtained by co-culturing ester-type catechin with adipose-derived stem cells.Type: ApplicationFiled: November 3, 2017Publication date: March 11, 2021Inventors: SHAW-YIH LIOU, CHIH-YANG HUANG, TSAI-JUI LIOU, TUNG-SHENG CHEN, I-TE LIOU
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Publication number: 20200328742Abstract: A voltage selection circuit includes a main selection unit, a first re-comparison unit, and a second re-comparison unit. The main selection unit has a first voltage terminal for receiving a first variable voltage, a second voltage terminal for receiving a second variable voltage, and an output terminal for outputting a greater one of the first variable voltage and the second variable voltage as an operation voltage. The first re-comparison unit adjusts the operation voltage according to a greater one of the operation voltage and the first variable voltage, and the second re-comparison unit adjusts the operation voltage according to a greater one of the operation voltage and the second variable voltage.Type: ApplicationFiled: February 27, 2020Publication date: October 15, 2020Inventors: Chia-Fu Chang, Chih-Yang Huang
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Patent number: 10790821Abstract: A voltage selection circuit includes a main selection unit, a first re-comparison unit, and a second re-comparison unit. The main selection unit has a first voltage terminal for receiving a first variable voltage, a second voltage terminal for receiving a second variable voltage, and an output terminal for outputting a greater one of the first variable voltage and the second variable voltage as an operation voltage. The first re-comparison unit adjusts the operation voltage according to a greater one of the operation voltage and the first variable voltage, and the second re-comparison unit adjusts the operation voltage according to a greater one of the operation voltage and the second variable voltage.Type: GrantFiled: February 27, 2020Date of Patent: September 29, 2020Assignee: eMemory Technology Inc.Inventors: Chia-Fu Chang, Chih-Yang Huang
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Patent number: 10734083Abstract: A voltage driver includes a voltage divider, a first transistor and a second transistor. The voltage divider is connected with a first voltage source and a second voltage source, and generates a first bias voltage. A drain terminal of the first transistor is connected with a third voltage source. A gate terminal of the first transistor is connected with the voltage divider to receive the first bias voltage. A drain terminal of the second transistor is connected with a source terminal of the first transistor. A gate terminal of the second transistor receives a second bias voltage. A source terminal of the second transistor is connected with a fourth voltage source. The first transistor and the second transistor are of the same conductivity type and match each other. The source terminal of the first transistor generates an output voltage.Type: GrantFiled: August 27, 2018Date of Patent: August 4, 2020Assignee: EMEMORY TECHNOLOGY INC.Inventors: Yu Wu, Wei-Chiang Ong, Chih-Yang Huang
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Patent number: 10646522Abstract: The present invention is related to a Lactobacillus strain, composition and use thereof for treating autoimmune disease and related complications. The composition comprises at least one isolate of Lactobacillus paracasei strain GMNL-32, L. reuteri strain GMNL-89 or L. reuteri strain GMNL-263, and a pharmaceutical carrier, for treating syndromes and related complications of the autoimmune diseases.Type: GrantFiled: April 16, 2018Date of Patent: May 12, 2020Assignee: GenMont Biotech IncorporationInventors: Chih-Yang Huang, Wei-Wen Kuo, Bor-Show Tzang, Yi-Hsing Chen
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Publication number: 20190115086Abstract: A voltage driver includes a voltage divider, a first transistor and a second transistor. The voltage divider is connected with a first voltage source and a second voltage source, and generates a first bias voltage. A drain terminal of the first transistor is connected with a third voltage source. A gate terminal of the first transistor is connected with the voltage divider to receive the first bias voltage. A drain terminal of the second transistor is connected with a source terminal of the first transistor. A gate terminal of the second transistor receives a second bias voltage. A source terminal of the second transistor is connected with a fourth voltage source. The first transistor and the second transistor are of the same conductivity type and match each other. The source terminal of the first transistor generates an output voltage.Type: ApplicationFiled: August 27, 2018Publication date: April 18, 2019Inventors: Yu WU, Wei-Chiang ONG, Chih-Yang HUANG
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Patent number: 10121550Abstract: A power switch circuit includes a first transistor, a second transistor and a current source. A first source/drain terminal and a gate terminal of the first transistor receive a first supply voltage and a second supply voltage, respectively. A second source/drain terminal and a body terminal of the first transistor are connected with a node z. An output signal is outputted from the node z. A first source/drain terminal and a gate terminal of the second transistor receive the second supply voltage and the first supply voltage, respectively. A second source/drain terminal and a body terminal of the second transistor are connected with the node z. The current source is connected between a bias voltage and the node z. The first supply voltage, the second supply voltage or the bias voltage is selected as the output signal.Type: GrantFiled: January 3, 2017Date of Patent: November 6, 2018Assignee: EMEMORY TECHNOLOGY INC.Inventors: Chih-Yang Huang, Wei-Ming Ku
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Patent number: 10096368Abstract: A non-volatile memory includes a power switch circuit and a non-volatile cell array. The power switch circuit includes a first transistor, a second transistor and a current source. A first source/drain terminal and a gate terminal of the first transistor receive a first supply voltage and a second supply voltage, respectively. A second source/drain terminal and a body terminal of the first transistor are connected with a node z. A first source/drain terminal and a gate terminal of the second transistor receive the second supply voltage and the first supply voltage, respectively. A second source/drain terminal and a body terminal of the second transistor are connected with the node z. The current source is connected between a bias voltage and the node z. A power terminal of the non-volatile cell is connected with the node z for receiving an output signal.Type: GrantFiled: May 14, 2018Date of Patent: October 9, 2018Assignee: EMEMORY TECHNOLOGY INC.Inventors: Chih-Yang Huang, Wei-Ming Ku
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Publication number: 20180261294Abstract: A non-volatile memory includes a power switch circuit and a non-volatile cell array. The power switch circuit includes a first transistor, a second transistor and a current source. A first source/drain terminal and a gate terminal of the first transistor receive a first supply voltage and a second supply voltage, respectively. A second source/drain terminal and a body terminal of the first transistor are connected with a node z. A first source/drain terminal and a gate terminal of the second transistor receive the second supply voltage and the first supply voltage, respectively. A second source/drain terminal and a body terminal of the second transistor are connected with the node z. The current source is connected between a bias voltage and the node z. A power terminal of the non-volatile cell is connected with the node z for receiving an output signal.Type: ApplicationFiled: May 14, 2018Publication date: September 13, 2018Inventors: Chih-Yang Huang, Wei-Ming Ku
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Publication number: 20180228851Abstract: The present invention is related to a Lactobacillus strain, composition and use thereof for treating autoimmune disease and related complications. The composition comprises at least one isolate of Lactobacillus paracasei strain GMNL-32, L. reuteri strain GMNL-89 or L. reuteri strain GMNL-263, and a pharmaceutical carrier, for treating syndromes and related complications of the autoimmune diseases.Type: ApplicationFiled: April 16, 2018Publication date: August 16, 2018Inventors: Chih-Yang HUANG, Wei-Wen KUO, Bor-Show TZANG, Yi-Hsing CHEN
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Publication number: 20180161375Abstract: The invention is a therapeutic method for repairing damaged pancreas. The method comprises administrating Epigallocatechin gallate (EGCG) of green tea and a plurality of adipose-derived stem cells (ADSC). And Epigallocatechin gallate (EGCG) of green tea enhances the ability of the adipose-derived stem cells to repair damaged tissue.Type: ApplicationFiled: February 6, 2018Publication date: June 14, 2018Inventors: Shaw-Yih Liou, Chih-Yang Huang, Tsai-Jui Liou, Tung-Sheng CHEN, I-Te Liou