Abstract: An electronic device for accessing data has a first memory, a second memory and a security module. The first memory has a first region and a second region. The second memory has a third region and a fourth region. The security module maintains firmware stored in the first region, the second region, the third region and the fourth region, and generates routing decision logic depending on the firmware stored in the first region, the second region, the third region and the fourth region.

Abstract: A method of updating firmware to a peripheral device of a computer system in a computer network. The computer system includes a host, a system on chip (SoC), and a basic input/output system (BIOS). The host is coupled to the SoC, the SoC is coupled to the BIOS, and the BIOS is coupled to a peripheral device. The method includes an operating system (OS) running on the host controlling the SoC to initiate a firmware update to the peripheral device, in response to the firmware update, the SoC enabling the BIOS to enter a unified extensible firmware interface (UEFI), the UEFI executing an update script to update a peripheral firmware to the peripheral device, and performing a reboot to the complete firmware update to the peripheral device.

Abstract: A communication method for a fan includes transmitting an initial signal with a specific duty cycle pattern to the fan; entering a communication mode after the fan receives the initial signal; reading information of the fan by a firmware of the fan; and transforming the information of the fan into a fake tachometer (TACH) signal and transmitting the fake TACH signal to a controller via a TACH signal line under the communication mode.

Abstract: A communication method for a fan includes transmitting an initial signal with a specific duty cycle pattern to the fan; entering a communication mode after the fan receives the initial signal; reading information of the fan by a firmware of the fan; and transforming the information of the fan into a fake tachometer (TACH) signal and transmitting the fake TACH signal to a controller via a TACH signal line under the communication mode.

Abstract: A Successive Approximation Register Analog-to-Digital Converter (SAR ADC) is disclosed. The SAR ADC includes a switched capacitor array, a buffer, a comparator and a control logic circuit. The switched capacitor array is arranged to sample an input signal according to a switch control signal to generate a sampling signal. The buffer is arranged to generate a common mode voltage. The comparator is arranged to receive the sampling signal and the common mode voltage in order to generate a comparison result. The control logic circuit is arranged to generate an output signal according to the comparison result, and generate the switch control signal to control the switched capacitor array. The control logic circuit further generates an operation control signal to adjust a Miller compensation capacitor inside the buffer. An associated control method is also disclosed.

Abstract: A Successive Approximation Register Analog-to-Digital Converter (SAR ADC) is disclosed. The SAR ADC includes a switched capacitor array, a buffer, a comparator and a control logic circuit. The switched capacitor array is arranged to sample an input signal according to a switch control signal to generate a sampling signal. The buffer is arranged to generate a common mode voltage. The comparator is arranged to receive the sampling signal and the common mode voltage in order to generate a comparison result. The control logic circuit is arranged to generate an output signal according to the comparison result, and generate the switch control signal to control the switched capacitor array. The control logic circuit further generates an operation control signal to adjust a Miller compensation capacitor inside the buffer. An associated control method is also disclosed.

Abstract: A capacitor includes a solid conductive plate, a first electrode, and a second electrode. The solid conductive plate is disposed above a substrate of a wafer. The solid conductive plate serves as a bottom plate of the capacitor. The first electrode is disposed above the solid conductive plate so that the solid conductive plate is located between the substrate and the first electrode. This first electrode serves as a top plate of the capacitor. The second electrode is disposed above the solid conductive plate, and is disposed beside the first electrode. The second electrode is electrically connected to the solid conductive plate.

Abstract: A chassis monitoring system and a chassis monitoring method are provided. The chassis monitoring system includes an electronic device and a chassis including a SAS (serial attached SCSI) expander. The electronic device transmits a SES (SCSI Enclosure Service) command to the SAS expander through a TCP/IP (Transmission Control Protocol/Internet Protocol) protocol. The SAS expander executes the SES command to monitor the chassis. The SAS expander transmits an execution result of the SES command to the electronic device.

Abstract: A method for using a shared device and a resource sharing system are provided. An arbitrator node sets an initial weight of each of processors based on identification information. The arbitrator node calculates a priority score for each processor based on an initial weight of each of the processors and state diagnostic codes recorded by each processor to establish a priority sequence. When the arbitrator node simultaneously receives a request for requesting an access right of the shared device transmitted by each of two or more processors, the arbitrator node determines one of the processors having the access right of the shared device based on the priority sequence.

Abstract: An impedance sensor and an electronic apparatus using the same are provided. The impedance sensor includes an impedance-bridge circuit, a compensation circuit, and a signal processing circuit. The impedance-bridge circuit has an input side and an output side, and configured to generate a first impedance variation in response to a physical pressure. The compensation circuit is coupled to the input side of the impedance-bridge circuit in parallel, and configured to generate a second impedance variation in response to an environment temperature. The signal processing circuit respectively detects the first and the second impedance variations, and accordingly generates a first sensing signal indicating the first impedance variation and a second sensing signal indicating the second impedance variation, so as to compensate a temperature shift part of the first sensing signal by the second sensing signal and accordingly generate a pressure detection signal.

Abstract: A method for using a shared device and a resource sharing system are provided. An arbitrator node sets an initial weight of each of processors based on identification information. The arbitrator node calculates a priority score for each processor based on an initial weight of each of the processors and state diagnostic codes recorded by each processor to establish a priority sequence. When the arbitrator node simultaneously receives a request for requesting an access right of the shared device transmitted by each of two or more processors, the arbitrator node determines one of the processors having the access right of the shared device based on the priority sequence.

Abstract: An impedance sensor and an electronic apparatus using the same are provided. The impedance sensor includes an impedance-bridge circuit, a compensation circuit, and a signal processing circuit. The impedance-bridge circuit has an input side and an output side, and configured to generate a first impedance variation in response to a physical pressure. The compensation circuit is coupled to the input side of the impedance-bridge circuit in parallel, and configured to generate a second impedance variation in response to an environment temperature. The signal processing circuit respectively detects the first and the second impedance variations, and accordingly generates a first sensing signal indicating the first impedance variation and a second sensing signal indicating the second impedance variation, so as to compensate a temperature shift part of the first sensing signal by the second sensing signal and accordingly generate a pressure detection signal.