Patents by Inventor Chin-Chun Chen

Chin-Chun Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200357347
    Abstract: A light-emitting device and display equipment are disclosed. The light-emitting device includes a light-emitting unit. The light-emitting unit includes a driving transistor and a light-emitting diode. The driving transistor includes a first terminal, a second terminal and a gate terminal. The first terminal is used to receive an operation voltage. The light-emitting diode is coupled to the second terminal and used to receive a driving current. The operation voltage is variable.
    Type: Application
    Filed: April 13, 2020
    Publication date: November 12, 2020
    Inventors: Liang-Lu Chen, Chin-Lung Ting, Ker-Yih Kao, Li-Wei Mao, Ming-Chun Tseng
  • Publication number: 20200335694
    Abstract: The present disclosure, in some embodiments, relates to a memory device. The memory device includes a dielectric protection layer having sidewalls defining an opening over a conductive interconnect within an inter-level dielectric (ILD) layer. A bottom electrode structure extends from within the opening to directly over the dielectric protection layer. A variable resistance layer is over the bottom electrode structure and a top electrode is over the variable resistance layer. A top electrode via is disposed on the top electrode and directly over the dielectric protection layer.
    Type: Application
    Filed: June 24, 2020
    Publication date: October 22, 2020
    Inventors: Chih-Yang Chang, Wen-Ting Chu, Kuo-Chi Tu, Yu-Wen Liao, Hsia-Wei Chen, Chin-Chieh Yang, Sheng-Hung Shih, Wen-Chun You
  • Patent number: 10795200
    Abstract: A display device includes a display panel, a light shielding unit and a back plate. The display panel includes a first substrate, a second substrate and an upper polarizer. The first substrate is disposed corresponding to the second substrate. The upper polarizer is disposed on the second substrate. The light shielding unit is connected to the upper polarizer. The first substrate is disposed on the back plate.
    Type: Grant
    Filed: January 22, 2019
    Date of Patent: October 6, 2020
    Assignee: INNOLUX CORPORATION
    Inventors: Chien-Chih Chen, Chia-Chun Yang, Chin-Cheng Kuo, Hsin-Tien Wu, Chih-Jen Chang
  • Patent number: 10723893
    Abstract: A composite structure is provided, which includes a support, an active layer wrapping the support, a dendrimer grafted to the active layer through covalent bondings, and a plurality of anti-fouling groups, wherein each of the anti-fouling groups is grafted to terminals of the dendrimer through covalent bondings. The terminals of the dendrimer include amino group, hydroxyl group, or thiol group.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: July 28, 2020
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Jen-You Chu, Chia-Le Wu, Feng-Sheng Kao, Chin-Ping Huang, Yi-Chun Chen
  • Publication number: 20200233138
    Abstract: A display device is provided. The display device includes a display panel that has a polarizer, a light source assembly, a first spacer, and a second spacer. The first spacer is disposed on the first side of the display panel near the light source assembly. The first spacer is located between the display panel and the light source assembly. The second spacer is disposed on the second side of the display panel, away from the light source assembly. The thickness of the first spacer is different than that of the second spacer.
    Type: Application
    Filed: January 8, 2020
    Publication date: July 23, 2020
    Inventors: Chien-Chih CHEN, Chia-Chun YANG, Chin-Cheng KUO
  • Patent number: 10700275
    Abstract: The present disclosure, in some embodiments, relates to a memory device. The memory device includes a bottom electrode via and a bottom electrode over a top of the bottom electrode via. A data storage layer is over the bottom electrode and a top electrode is over the data storage layer. A top electrode via is on an upper surface of the top electrode and is centered along a first line that is laterally offset from a second line centered upon a bottommost surface of the bottom electrode via. The first line is perpendicular to the upper surface of the top electrode and parallel to the second line.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: June 30, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Yang Chang, Wen-Ting Chu, Kuo-Chi Tu, Yu-Wen Liao, Hsia-Wei Chen, Chin-Chieh Yang, Sheng-Hung Shih, Wen-Chun You
  • Publication number: 20200201121
    Abstract: An electronic device is provided, including a frame, a working panel and a cover plate. The frame includes a sidewall, and the sidewall includes an outer surface. At least a part of the working panel is disposed in the frame. The cover plate is disposed on the working panel and includes a surface, wherein a surface of the cover plate and an outer surface of the sidewall of the frame are fixed by using an adhesive, and the extension direction of the surface of the cover plate is different than the extension direction of the outer surface of the sidewall of the frame.
    Type: Application
    Filed: December 2, 2019
    Publication date: June 25, 2020
    Inventors: Wen-Cheng HUANG, Ting-Sheng CHEN, Chia-Chun YANG, Chin-Cheng KUO
  • Publication number: 20200192021
    Abstract: A light guide assembly includes a light guide plate and a light source. The light guide plate has a through hole, an inner sidewall that surrounds the through hole, and an outer sidewall that surrounds the inner sidewall. The inner sidewall has a halo elimination structure that faces the through hole. The outer sidewall has a light incident surface. The light source faces the light incident surface of the outer sidewall of the light guide plate.
    Type: Application
    Filed: November 6, 2019
    Publication date: June 18, 2020
    Inventors: Hsin-Hao JEN, Tsai-Wei SHEI, Chin-Chi YU, Chih-Chun CHEN
  • Patent number: 10670257
    Abstract: A waterproof light emitting module includes a circuit board, a light emitting diode, a light guide plate, first, second, and third waterproof layers. The light emitting diode is over the circuit board and has a light emitting surface, and first and second non-light emitting surfaces. The light emitting surface is opposite to the first non-light emitting surface. The second non-light emitting surface is between the light emitting surface and the first non-light emitting surface. A center of the light guide plate is substantially aligned with a center of the light emitting diode along a direction perpendicular to the light emitting surface. The light emitting diode is between the first waterproof layer and the light guide plate. The second waterproof layer covers the second non-light emitting surface. The third waterproof layer is between the second waterproof layer and the light guide plate.
    Type: Grant
    Filed: September 17, 2019
    Date of Patent: June 2, 2020
    Assignee: E Ink Holdings Inc.
    Inventors: Tsai-Wei Shei, Chih-Ching Yen, Hsin-Hao Jen, Chin-Chi Yu, Chih-Chun Chen
  • Publication number: 20200169033
    Abstract: A connector structure includes a first connector and a second connector configured to rotatably connect the first connector. The first connector includes an insulating support, a first conductor and a second conductor. The first and second conductors respectively include first and second convex curved surfaces. The second connector includes first and second insulating housings and first and second conductive layers. The first and second insulating housings are configured to cover at least a portion of the first conductor and at least a portion of the second conductor, respectively. The first conductive layer includes a first concave curved surface matching the first convex curved surface, and is configured to be in contact with the first conductor. The second conductive layer includes a second concave curved surface matching the second convex curved surface, and is configured to be in contact with the second conductor.
    Type: Application
    Filed: November 21, 2019
    Publication date: May 28, 2020
    Inventors: Huei-Chuan LEE, Yen-Ze HUANG, Chih-Chun CHEN, Chin-Chi YU
  • Publication number: 20200132436
    Abstract: A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a wafer. The light source is configured to provide a light directed to the wafer. The light detection device is configured to detect reflected light intensity from the wafer to locate at least one wafer alignment mark of wafer alignment marks separated by a plurality of angles. At least two of those angles are equal.
    Type: Application
    Filed: December 23, 2019
    Publication date: April 30, 2020
    Inventors: Wei-Hsiang Tseng, Chin-Hsiang Lin, Heng-Hsin Liu, Jui-Chun Peng, Ho-Ping Chen
  • Publication number: 20200134124
    Abstract: A method (of generating a layout diagram) includes generating a cell, representing at least part of a circuit in a semiconductor device, which is arranged at least in part according to second tracks of the M_2nd level (M_2nd tracks), and first tracks of the M_1st level (M_1st tracks). The generating the cell includes: selecting, based on a chosen site for the cell in the layout diagram, one of the M_2nd tracks; generating a first M_2nd pin pattern representing an output pin of the circuit; arranging a long axis of the first pin pattern substantially along the selected M_2nd track; generating second, third, fourth and fifth M_1st pin patterns representing corresponding input pins of the circuit; and arranging long axes of the second to fifth pin patterns substantially along corresponding ones of the M_1st tracks.
    Type: Application
    Filed: October 21, 2019
    Publication date: April 30, 2020
    Inventors: Pin-Dai SUE, Chin-Chou LIU, Sheng-Hsiung CHEN, Fong-Yuan CHANG, Lee-Chung LU, Yen-Hung LIN, Li-Chun TIEN, Po-Hsiang HUANG, Yi-Kan CHENG, Chi-Yu LU
  • Publication number: 20200098983
    Abstract: Some embodiments relate to a device. The device includes a top electrode and a via disposed over the top electrode. A peripheral upper surface of the top electrode is above a central upper surface of the top electrode, and a tapered inner sidewall of the top electrode connects the peripheral upper surface to the central upper surface. The via establishes electrical contact with the tapered inner sidewall but is spaced apart from the central upper surface.
    Type: Application
    Filed: November 25, 2019
    Publication date: March 26, 2020
    Inventors: Hsia-Wei Chen, Wen-Ting Chu, Kuo-Chi Tu, Chih-Yang Chang, Chin-Chieh Yang, Yu-Wen Liao, Wen-Chun You, Sheng-Hung Shih
  • Publication number: 20200043741
    Abstract: A method of manufacturing a semiconductor device includes depositing a first material on a substrate, depositing on the substrate a second material that has an etch selectivity different from an etch selectively of the first material, depositing a spacer material on the first and second material, and etching the substrate using the spacer material as an etch mask to form a fin under the first material and a fin under the second material.
    Type: Application
    Filed: October 14, 2019
    Publication date: February 6, 2020
    Inventors: Lei-Chun Chou, Chih-Liang Chen, Chih-Ming Lai, Charles Chew-Yuen Young, Chin-Yuan Tseng, Hsin-Chih Chen, Shi Ning Ju, Jiann-Tyng Tzeng, Kam-Tou Sio, Ru-Gun Liu, Wei-Cheng Lin, Wei-Liang Lin
  • Publication number: 20200011522
    Abstract: A waterproof light emitting module includes a circuit board, a light emitting diode, a light guide plate, first, second, and third waterproof layers. The light emitting diode is over the circuit board and has a light emitting surface, and first and second non-light emitting surfaces. The light emitting surface is opposite to the first non-light emitting surface. The second non-light emitting surface is between the light emitting surface and the first non-light emitting surface. A center of the light guide plate is substantially aligned with a center of the light emitting diode along a direction perpendicular to the light emitting surface. The light emitting diode is between the first waterproof layer and the light guide plate. The second waterproof layer covers the second non-light emitting surface. The third waterproof layer is between the second waterproof layer and the light guide plate.
    Type: Application
    Filed: September 17, 2019
    Publication date: January 9, 2020
    Inventors: Tsai-Wei SHEI, Chih-Ching YEN, Hsin-Hao JEN, Chin-Chi YU, Chih-Chun CHEN
  • Patent number: 10514247
    Abstract: A wafer alignment apparatus includes a light source, a light detection device, and a rotation device configured to rotate a wafer. The light source is configured to provide a light directed to the wafer. The light detection device is configured to detect reflected light intensity from the wafer to locate at least one wafer alignment mark of wafer alignment marks separated by a plurality of angles. At least two of those angles are equal.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: December 24, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Hsiang Tseng, Chin-Hsiang Lin, Heng-Hsin Liu, Jui-Chun Peng, Ho-Ping Chen
  • Patent number: 10510953
    Abstract: Some embodiments relate to a device. The device includes a top electrode and a via disposed over the top electrode. A peripheral upper surface of the top electrode is above a central upper surface of the top electrode, and a tapered inner sidewall of the top electrode connects the peripheral upper surface to the central upper surface. The via establishes electrical contact with the tapered inner sidewall but is spaced apart from the central upper surface.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: December 17, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hsia-Wei Chen, Wen-Ting Chu, Kuo-Chi Tu, Chih-Yang Chang, Chin-Chieh Yang, Yu-Wen Liao, Wen-Chun You, Sheng-Hung Shih
  • Patent number: 10468700
    Abstract: A membrane-electrode assembly for water electrolysis including a proton-exchange membrane, a first catalyst layer, a second catalyst layer, a first gas diffusion layer, a second gas diffusion layer and a first sensor chip. The proton-exchange membrane is disposed between an inner side of the first catalyst layer and an inner side of the second catalyst layer. The first gas diffusion layer is disposed on an outer side of the first catalyst layer. The second gas diffusion layer is disposed on an outer side of the second catalyst layer. The first sensor chip is sandwiched between the first catalyst layer and the first gas diffusion layer to sense an environmental change where water electrolysis takes place.
    Type: Grant
    Filed: May 15, 2018
    Date of Patent: November 5, 2019
    Assignees: YUAN ZE UNIVERSITY, HOMYTECH CO., LTD.
    Inventors: Chi-Yuan Lee, Chia-Hung Chen, Guo-Bin Jung, Yu-Chun Chiang, Chin-Lung Hsieh, Yun-Min Liu
  • Publication number: 20190325807
    Abstract: A display device includes a substrate, at least one light emitting element and at least two driving arrays. The at least one light emitting element is disposed on the substrate, and the at least one light emitting element has a first terminal and a second terminal. The at least two driving arrays are disposed on the substrate, and one of the at least two driving arrays is electrically connected to the first terminal of the at least one light emitting element.
    Type: Application
    Filed: March 25, 2019
    Publication date: October 24, 2019
    Inventors: Chin-Lung Ting, Ming-Chun Tseng, Liang-Lu Chen
  • Patent number: 10446406
    Abstract: A method of manufacturing a semiconductor device includes depositing a first material on a substrate, depositing on the substrate a second material that has an etch selectivity different from an etch selectively of the first material, depositing a spacer material on the first and second material, and etching the substrate using the spacer material as an etch mask to form a fin under the first material and a fin under the second material.
    Type: Grant
    Filed: May 3, 2017
    Date of Patent: October 15, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Lei-Chun Chou, Chih-Liang Chen, Chih-Ming Lai, Charles Chew-Yuen Young, Chin-Yuan Tseng, Hsin-Chih Chen, Shi Ning Ju, Jiann-Tyng Tzeng, Kam-Tou Sio, Ru-Gun Liu, Wei-Cheng Lin, Wei-Liang Lin