Patents by Inventor Ching-Yeh HSUAN

Ching-Yeh HSUAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210295894
    Abstract: A training method for a memory system is provided. The memory system includes a memory controller and a memory. The memory controller is connected with the memory. The training method includes the following steps. Firstly, the memory samples n command/address signals according to a first signal edge and a second signal edge of a clock signal to acquire a first sampled content and a second sampled content. The memory selectively outputting one of the first sampled content and the second sampled content through m data signals to the memory controller in response to a control signal. Moreover, m is larger than n and smaller than 2n.
    Type: Application
    Filed: April 22, 2021
    Publication date: September 23, 2021
    Applicant: MediaTek Inc.
    Inventors: Bo-Wei Hsieh, Ching-Yeh Hsuan, Shang-Pin Chen
  • Patent number: 11017839
    Abstract: A training method for a memory system is provided. The memory system includes a memory controller and a memory. The memory controller is connected with the memory. The training method includes the following steps. Firstly, the memory samples n command/address signals according to a first signal edge and a second signal edge of a clock signal to acquire a first sampled content and a second sampled content. The memory selectively outputting one of the first sampled content and the second sampled content through m data signals to the memory controller in response to a control signal. Moreover, m is larger than n and smaller than 2n.
    Type: Grant
    Filed: January 5, 2018
    Date of Patent: May 25, 2021
    Assignee: MediaTek Inc.
    Inventors: Bo-Wei Hsieh, Ching-Yeh Hsuan, Shang-Pin Chen
  • Patent number: 10810078
    Abstract: A method of parity training for a dynamic random access memory, DRAM, is disclosed. The method comprises enabling a link error checking and correcting, ECC, functionality in a write operation of the DRAM, and remapping a parity function of a write parity pin to an data inversion function, a data replacing function, or a logical function, whereby data transferred to the DRAM through the write parity pin is used for indicating an inversion operation, a logical operation, or a substitution operation for data of a data pin.
    Type: Grant
    Filed: July 2, 2019
    Date of Patent: October 20, 2020
    Assignee: MEDIATEK INC.
    Inventors: Bo-Wei Hsieh, Chia-Yu Chan, Ching-Yeh Hsuan, Jou-Ling Chen
  • Publication number: 20200012558
    Abstract: A method of parity training for a dynamic random access memory, DRAM, is disclosed. The method comprises enabling a link error checking and correcting, ECC, functionality in a write operation of the DRAM, and remapping a parity function of a write parity pin to an data inversion function, a data replacing function, or a logical function, whereby data transferred to the DRAM through the write parity pin is used for indicating an inversion operation, a logical operation, or a substitution operation for data of a data pin.
    Type: Application
    Filed: July 2, 2019
    Publication date: January 9, 2020
    Inventors: Bo-Wei Hsieh, Chia-Yu Chan, Ching-Yeh Hsuan, Jou-Ling Chen
  • Publication number: 20180204610
    Abstract: A training method for a memory system is provided. The memory system includes a memory controller and a memory. The memory controller is connected with the memory. The training method includes the following steps. Firstly, the memory samples n command/address signals according to a first signal edge and a second signal edge of a clock signal to acquire a first sampled content and a second sampled content. The memory selectively outputting one of the first sampled content and the second sampled content through m data signals to the memory controller in response to a control signal. Moreover, m is larger than n and smaller than 2n.
    Type: Application
    Filed: January 5, 2018
    Publication date: July 19, 2018
    Inventors: Bo-Wei HSIEH, Ching-Yeh HSUAN, Shang-Pin CHEN