Patents by Inventor Ching Yen Chang

Ching Yen Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240113071
    Abstract: An integrated circuit package including electrically floating metal lines and a method of forming are provided. The integrated circuit package may include integrated circuit dies, an encapsulant around the integrated circuit dies, a redistribution structure on the encapsulant, a first electrically floating metal line disposed on the redistribution structure, a first electrical component connected to the redistribution structure, and an underfill between the first electrical component and the redistribution structure. A first opening in the underfill may expose a top surface of the first electrically floating metal line.
    Type: Application
    Filed: January 5, 2023
    Publication date: April 4, 2024
    Inventors: Chung-Shi Liu, Mao-Yen Chang, Yu-Chia Lai, Kuo-Lung Pan, Hao-Yi Tsai, Ching-Hua Hsieh, Hsiu-Jen Lin, Po-Yuan Teng, Cheng-Chieh Wu, Jen-Chun Liao
  • Patent number: 11944412
    Abstract: A blood pressure detection device manufactured by a semiconductor process includes a substrate, a microelectromechanical element, a gas-pressure-sensing element, a driving-chip element, an encapsulation layer and a valve layer. The substrate includes inlet apertures. The microelectromechanical element and the gas-pressure-sensing element are stacked and integrally formed on the substrate. The encapsulation layer is encapsulated and positioned on the substrate. A flowing-channel space is formed above the microelectromechanical element and the gas-pressure-sensing element. The encapsulation layer includes an outlet aperture in communication with an airbag. The driving-chip element controls the microelectromechanical element, the gas-pressure-sensing element and valve units to transport gas.
    Type: Grant
    Filed: June 2, 2021
    Date of Patent: April 2, 2024
    Assignee: MICROJET TECHNOLOGY CO., LTD.
    Inventors: Hao-Jan Mou, Ying-Lun Chang, Ching-Sung Lin, Chi-Feng Huang, Yung-Lung Han, Chang-Yen Tsai, Wei-Ming Lee, Chun-Yi Kuo, Tsung-I Lin
  • Patent number: 11942451
    Abstract: A semiconductor structure includes a functional die, a dummy die, a redistribution structure, a seal ring and an alignment mark. The dummy die is electrically isolated from the functional die. The redistribution structure is disposed over and electrically connected to the functional die. The seal ring is disposed over the dummy die. The alignment mark is between the seal ring and the redistribution structure, wherein the alignment mark is electrically isolated from the dummy die, the redistribution structure and the seal ring. The insulating layer encapsulates the functional die and the dummy die.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Mao-Yen Chang, Yu-Chia Lai, Cheng-Shiuan Wong, Ting Hao Kuo, Ching-Hua Hsieh, Hao-Yi Tsai, Kuo-Lung Pan, Hsiu-Jen Lin
  • Publication number: 20200166550
    Abstract: A transmission interface module includes a receiving unit, a transmitting unit, a multiplexer, and a processing unit. An output terminal and a control terminal of the receiving unit are electrically connected to the processing unit. The input terminal and the control terminal of the transmitting unit are electrically connected to the processing unit, and the control terminal of the multiplexer is electrically connected to the processing unit. The transmission interface module respectively adjusts a turn-on state or a turn-off state of the analog power terminal, the digital power terminal, the processing unit, the receiving unit, the transmitting unit, and the multiplexer through a plurality of operation modes to transmit the detecting signals.
    Type: Application
    Filed: July 19, 2019
    Publication date: May 28, 2020
    Inventor: CHING-YEN CHANG
  • Patent number: 10649012
    Abstract: A transmission interface module includes a receiving unit, a transmitting unit, a multiplexer, and a processing unit. An output terminal and a control terminal of the receiving unit are electrically connected to the processing unit. The input terminal and the control terminal of the transmitting unit are electrically connected to the processing unit, and the control terminal of the multiplexer is electrically connected to the processing unit. The transmission interface module respectively adjusts a turn-on state or a turn-off state of the analog power terminal, the digital power terminal, the processing unit, the receiving unit, the transmitting unit, and the multiplexer through a plurality of operation modes to transmit the detecting signals.
    Type: Grant
    Filed: July 19, 2019
    Date of Patent: May 12, 2020
    Assignee: ALTEK SEMICONDUCTOR CORPORATION
    Inventor: Ching-yen Chang
  • Publication number: 20200095532
    Abstract: A fermentation monitoring device is provided for monitoring a fermentation process in a bottle, and includes a detecting unit disposed at a cap body for continuously monitoring at least one environment parameter in the bottle; a weight scale disposed for detecting a weight of contents in the bottle; and a processor that, in response to receipt of an activation signal, is configured to calculate an estimated time to completion of the fermentation process, generate an alert response when a value of the environment parameter is out of a corresponding predetermined range, and determine whether the fermentation process has completed and generate a completion signal when it has.
    Type: Application
    Filed: November 27, 2019
    Publication date: March 26, 2020
    Inventors: Tsan-Hao YANG, Ching-Yen CHANG, Yu-Jui CHEN, Yu-Wen HUANG
  • Publication number: 20160222334
    Abstract: A fermentation monitoring device includes a cap body for sealing an opening of a bottle in which a fermentation process is to occur, a detecting unit and a processor. The detecting unit is configured to continuously monitor an environment parameter in a fermentation space defined by the cap body and the bottle. The processor is operable to: estimate when the fermentation process is to be completed, based on a value of the environment parameter; determine whether the value of the environment parameter is within a predetermined range; and generate an alert response when the determination is affirmative.
    Type: Application
    Filed: December 2, 2015
    Publication date: August 4, 2016
    Inventors: Tsan-Hao YANG, Ching-Yen CHANG, Yu-Jui CHEN, Yu-Wen HUANG
  • Patent number: 8754955
    Abstract: An interface circuit for an image receiving apparatus is disclosed. The interface circuit includes a plurality of signal transporting units, and each of the signal transporting units has a first signal receiving terminal and a second signal receiving terminal for receiving a first input signal and a second input signal respectively. Each of the signal transporting units compares the first input signal and the second input signal to generate a compare result. Each of the signal transporting units outputs the first input signal and the second input signal and/or the compare result according to a setting mode.
    Type: Grant
    Filed: January 4, 2012
    Date of Patent: June 17, 2014
    Assignee: Altek Corporation
    Inventors: Ching-Yen Chang, Chin-Hao Tu
  • Publication number: 20130120663
    Abstract: An interface circuit for an image receiving apparatus is disclosed. The interface circuit includes a plurality of signal transporting units, and each of the signal transporting units has a first signal receiving terminal and a second signal receiving terminal for receiving a first input signal and a second input signal respectively. Each of the signal transporting units compares the first input signal and the second input signal to generate a compare result. Each of the signal transporting units outputs the first input signal and the second input signal and/or the compare result according to a setting mode.
    Type: Application
    Filed: January 4, 2012
    Publication date: May 16, 2013
    Applicant: ALTEK CORPORATION
    Inventors: Ching-Yen Chang, Chin-Hao Tu
  • Publication number: 20120106861
    Abstract: A compressing method is applicable to compress of an image at a fixed compression ratio, in which the image has a raw data. The compression method includes the steps of receiving the raw data with a predetermined length as a compression unit; compressing the compression unit into a compressed bit stream, wherein a total length of the compressed bit stream being not larger than a target bit stream length; when the total length of the compressed bit stream is smaller than the target bit stream length, appending a dummy code to the compressed bit stream, so that a bit stream length of the compressed bit stream with the dummy code is equal to the target bit stream length; and repeating steps until the raw data is compressed into an image bit stream.
    Type: Application
    Filed: July 5, 2011
    Publication date: May 3, 2012
    Applicant: ALTEK CORPORATION
    Inventors: Chia-Ho Pan, Ching-Yen Chang, Che-Wei Chang, Shuei-Lin Chen
  • Patent number: 7675439
    Abstract: A serial/parallel data conversion apparatus and a method thereof are used to convert serial data into parallel data by a delay pulse and three stage registers, wherein the device includes a first data register, a second data register, a third data register, a frequency divider and a delay controller. Moreover, the first data register converts the serial data into the parallel data according to a first working clock signal. The frequency divider performs a frequency division for the first working clock signal for producing a second working clock signal. The second data register acquires the parallel data from the first register according to the second working clock signal. The delay controller delays the second working clock signal to produce a third working clock signal. Finally, the third data register obtains the parallel data from the second register according to the third working clock signal.
    Type: Grant
    Filed: August 26, 2008
    Date of Patent: March 9, 2010
    Assignee: Altek Corporation
    Inventors: Ching Yen Chang, Wen-Bin Wang
  • Publication number: 20090167572
    Abstract: A serial/parallel data conversion apparatus and a method thereof are used to convert serial data into parallel data by a delay pulse and three stage registers, wherein the device includes a first data register, a second data register, a third data register, a frequency divider and a delay controller. Moreover, the first data register converts the serial data into the parallel data according to a first working clock signal. The frequency divider performs a frequency division for the first working clock signal for producing a second working clock signal. The second data register acquires the parallel data from the first register according to the second working clock signal. The delay controller delays the second working clock signal to produce a third working clock signal. Finally, the third data register obtains the parallel data from the second register according to the third working clock signal.
    Type: Application
    Filed: August 26, 2008
    Publication date: July 2, 2009
    Inventors: Ching Yen Chang, Wen-Bin Wang
  • Publication number: 20090167397
    Abstract: A delay device for adjusting phase under a SMIA (Standard Mobile Imaging Architecture) standard is provided. More particularly, the delay device is used to adjust a phase of a clock signal, which carries data, under the SMIA standard. The delay device includes plural delay cells, which are disposed on a circuit board by means of APR (Automated Placement and Routing) method, and one or more delay multiplexers (MUX) connected with the delay cells. Through selective pins controlling the route selection in the delay multiplexer, the delay device can produce plural delay times to adjust the phase relationship between data and clock, as supposed to using PLL.
    Type: Application
    Filed: September 26, 2008
    Publication date: July 2, 2009
    Inventors: Ching Yen Chang, Wen-Bin Wang
  • Publication number: 20070153301
    Abstract: An image magnification system and method thereof for selectively perform either a low-rating magnification process or a high-rating magnification process for an image captured by a digital camera is disclosed. The method of the invention comprises the steps of: reducing the image to reduced image data, performing a pre-magnification process for the reduced image data to generate pre-magnified image data, and selectively perform either the lowing-rating magnification process for the reduced image data or the high-rating magnification process for the pre-magnified image data.
    Type: Application
    Filed: June 14, 2006
    Publication date: July 5, 2007
    Applicant: ALTEK CORPORATION
    Inventors: Ching-Yen Chang, Shuei-Lin Chen, Chung-Ching Lin
  • Publication number: 20070153101
    Abstract: An image processing system and method thereof for a digital camera are disclosed. The image processing system comprises a sweep control unit, a line extend control unit and a WOI control unit. When the output time of a digital image needs to be prolonged, the line extend control unit will be triggered in order to extend the processing time of the digital image.
    Type: Application
    Filed: December 12, 2006
    Publication date: July 5, 2007
    Applicant: ALTEK CORPORATION
    Inventors: Ching-Yen Chang, Li Fung Cheung, Shuei-Lin Chen