Abstract: Embodiments of the present invention provide methods for patterning a metal layer, such as a copper layer, to form an interconnection structure in semiconductor devices. In one embodiment, a method of patterning a metal layer on a substrate includes (a) supplying an etching gas mixture comprising a hydro-carbon gas into a processing chamber having a substrate disposed therein, the substrate having a metal layer disposed thereon, (b) exposing the metal layer to an ashing gas mixture comprising a hydrogen containing gas to the substrate, and (c) repeatedly performing steps (a) and (b) until desired features are formed in the metal layer. During the patterning process, the substrate temperature may be controlled at greater than 50 degrees Celsius.

Abstract: Embodiments of the present disclosure provide methods for patterning a hardmask layer disposed on a metal layer, such as a copper layer, to form an interconnection structure in semiconductor devices. In one embodiment, a method of patterning a hardmask layer on a metal layer disposed on a substrate includes supplying a first etching gas mixture comprising a carbon-fluorine containing gas and a chlorine containing gas into a processing chamber to etch a portion of a hardmask layer disposed on a metal layer formed on a substrate, supplying a second etching gas mixture comprising a hydrocarbon gas into the processing chamber to clean the substrate, and supplying a third etching gas mixture comprising a carbon-fluorine containing gas to remove a remaining portion of the hardmask layer until a surface of the metal layer is exposed.

Abstract: Embodiments of the present disclosure provide methods for etching a barrier layer disposed under a metal layer, such as a copper layer, when the metal layer is etched open exposing the barrier layer, to form an interconnection structure in semiconductor devices. In one embodiment, a method of etching a barrier layer disposed under a metal layer formed on a substrate includes supplying a first etching gas mixture comprising a hydrogen containing gas and an inert gas into a processing chamber to clean a surface of a barrier layer disposed on a substrate for a first period of time, supplying a second etching gas mixture comprising fluorine containing gas into the processing chamber to etch the barrier layer, and switching to supply the first etching gas in the processing chamber to clean the etched barrier layer for a second period of time.

Abstract: Embodiments of the present disclosure provide methods for patterning a hardmask layer disposed on a metal layer, such as a copper layer, to form an interconnection structure in semiconductor devices. In one embodiment, a method of patterning a hardmask layer on a metal layer disposed on a substrate includes supplying a first etching gas mixture comprising a carbon-fluorine containing gas and a chlorine containing gas into a processing chamber to etch a portion of a hardmask layer disposed on a metal layer formed on a substrate, supplying a second etching gas mixture comprising a hydrocarbon gas into the processing chamber to clean the substrate, and supplying a third etching gas mixture comprising a carbon-fluorine containing gas to remove a remaining portion of the hardmask layer until a surface of the metal layer is exposed.

Abstract: Embodiments of the present disclosure provide methods for patterning a hardmask layer disposed on a metal layer, such as a copper layer, to form an interconnection structure in semiconductor devices. In one embodiment, a method of patterning a hardmask layer on a metal layer disposed on a substrate includes supplying a first etching gas mixture comprising a carbon-fluorine containing gas and a chlorine containing gas into a processing chamber to etch a portion of a hardmask layer disposed on a metal layer formed on a substrate, supplying a second etching gas mixture comprising a hydrocarbon gas into the processing chamber to clean the substrate, and supplying a third etching gas mixture comprising a carbon-fluorine containing gas to remove a remaining portion of the hardmask layer until a surface of the metal layer is exposed.

Abstract: Embodiments of the present invention provide methods for patterning a metal layer, such as a copper layer, to form an interconnection structure in semiconductor devices. In one embodiment, a method of patterning a metal layer on a substrate includes (a) supplying an etching gas mixture comprising a hydro-carbon gas into a processing chamber having a substrate disposed therein, the substrate having a metal layer disposed thereon, (b) exposing the metal layer to an ashing gas mixture comprising a hydrogen containing gas to the substrate, and (c) repeatedly performing steps (a) and (b) until desired features are formed in the metal layer. During the patterning process, the substrate temperature may be controlled at greater than 50 degrees Celsius.