Patents by Inventor Choon Heung Lee
Choon Heung Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9627368Abstract: Provided are a semiconductor device using, for example, an epoxy molding compound (EMC) wafer support system and a fabricating method thereof, which can, for example, adjust a thickness of the overall package in a final stage of completing the device while shortening a fabricating process and considerably reducing the fabrication cost. An example semiconductor device may comprise a first semiconductor die that comprises a bond pad and a through silicon via (TSV) connected to the bond pad; an interposer comprising a redistribution layer connected to the bond pad or the TSV and formed on the first semiconductor die, a second semiconductor die connected to the redistribution layer of the interposer and positioned on the interposer; an encapsulation unit encapsulating the second semiconductor die, and a solder ball connected to the bond pad or the TSV of the first semiconductor die.Type: GrantFiled: November 19, 2013Date of Patent: April 18, 2017Assignee: Amkor Technology, Inc.Inventors: Jin Young Kim, Doo Hyun Park, Ju Hoon Yoon, Seong Min Seo, Glenn Rinne, Choon Heung Lee
-
Publication number: 20160343688Abstract: In one embodiment, a method for fabricating a semiconductor package includes providing a multi-layer molded conductive structure. The multi-layer molded conductive structure includes a first conductive structure disposed on a surface of a carrier and a first encapsulant covering at least portions of the first conductive structure while other portions are exposed in the first encapsulant. A second conductive structure is disposed on the first encapsulant and electrically connected to the first conductive structure. A second encapsulant covers a first portion of the second conductive structure while a second portion of the second conductive structure is exposed to the outside, and a third portion of the second conductive structure is exposed in a receiving space disposed in the second encapsulant. The method includes electrically connecting a semiconductor die to the second conductive structure and in some embodiments removing the carrier.Type: ApplicationFiled: April 19, 2016Publication date: November 24, 2016Applicant: Amkor Technology, Inc.Inventors: Won Bae Bang, Ju Hoon Yoon, Ji Young Chung, Byong Jin Kim, Gi Jeong Kim, Choon Heung Lee
-
Publication number: 20160322334Abstract: A semiconductor package and manufacturing method thereof are disclosed and may include a first semiconductor device comprising a first bond pad on a first surface of the first semiconductor device, a first encapsulant material surrounding side edges of the first semiconductor device, and a redistribution layer (RDL) formed on the first surface of the first semiconductor device and on a first surface of the encapsulant material. The RDL may electrically couple the first bond pad to a second bond pad formed above the first surface of the encapsulant material. A second semiconductor device comprising a third bond pad on a first surface of the second semiconductor device may face the first surface of the first semiconductor device and be electrically coupled to the first bond pad on the first semiconductor device. The first surface of the first semiconductor device may be coplanar with the first surface of the encapsulant material.Type: ApplicationFiled: July 15, 2016Publication date: November 3, 2016Inventors: Jin Young Kim, No Sun Park, Yoon Joo Kim, Choon Heung Lee, Jin Han Kim, Seung Jae Lee, Se Woong Cha, Sung Kyu Kim, Glenn Rinne
-
Patent number: 9412729Abstract: A semiconductor package includes a first package comprising a circuit board and a first semiconductor die mounded on the circuit board, and a second package comprising a mounting board. At least one second semiconductor die may be mounted on the mounting board, and one or more leads may be electrically connected to the mounting board and/or the second semiconductor die. An adhesion member may bond the first package to the second package, and an encapsulant may encapsulate the first package and the second package. the circuit board, the mounting board, and the one or more leads may be arranged to surround the first semiconductor die and the second semiconductor die, and the plurality of leads may be electrically connected to the circuit board and to a constant potential or ground, to reduce the effects of external electromagnetic interference upon the semiconductor package.Type: GrantFiled: August 11, 2014Date of Patent: August 9, 2016Assignee: Amkor Technology, Inc.Inventors: Ji Young Chung, Choon Heung Lee, Glenn Rinne, Byong Jin Kim
-
Patent number: 9406639Abstract: A semiconductor package and manufacturing method thereof are disclosed and may include a first semiconductor device comprising a first bond pad on a first surface of the first semiconductor device, a first encapsulant material surrounding side edges of the first semiconductor device, and a redistribution layer (RDL) formed on the first surface of the first semiconductor device and on a first surface of the encapsulant material. The RDL may electrically couple the first bond pad to a second bond pad formed above the first surface of the encapsulant material. A second semiconductor device comprising a third bond pad on a first surface of the second semiconductor device may face the first surface of the first semiconductor device and be electrically coupled to the first bond pad on the first semiconductor device. The first surface of the first semiconductor device may be coplanar with the first surface of the encapsulant material.Type: GrantFiled: August 8, 2013Date of Patent: August 2, 2016Assignee: Amkor Technology, Inc.Inventors: Jin Young Kim, No Sun Park, Yoon Joo Kim, Choon Heung Lee, Jin Han Kim, Seung Jae Lee, Se Woong Cha, Sung Kyu Kim, Glenn Rinne
-
Publication number: 20160049381Abstract: Laser assisted bonding for semiconductor die interconnections is disclosed and may, for example, include forming flux on a circuit pattern on a circuit board, placing a semiconductor die on the circuit board where a bump on the semiconductor die contacts the flux, and reflowing the bump by directing a laser beam toward the semiconductor die. The laser beam may volatize the flux and make an electrical connection between the bump and the circuit pattern. A jig plate may be placed on the semiconductor die when the laser beam is directed toward the semiconductor die. Warpage may be reduced during heating or cooling of the semiconductor die by applying pressure to the jig plate. Jig bars may extend outward from the jig plate and may be in contact with the circuit board during the application of pressure to the jig plate. The jig plate may comprise one or more of: silicon, silicon carbide, and glass.Type: ApplicationFiled: January 8, 2015Publication date: February 18, 2016Inventors: Dong Su Ryu, Choon Heung Lee, Min Ho Kim, Choong Hoe Kim, Ju Hoon Yoon, Chan Ha Hwang, Yang Gyoo Jung
-
Publication number: 20150303170Abstract: A singulated substrate for a semiconductor device may include a singulated unit substrate comprising circuit patterns on a top surface and a bottom surface of the singulated unit substrate. A semiconductor die may be bonded to the top surface of the singulated unit substrate. An encapsulation layer may encapsulate the semiconductor die and cover the top surface of the singulated unit substrate. The side surfaces of the singulated unit substrate between the top surface and bottom surface of the singulated unit substrate may be coplanar with side surfaces of the encapsulation layer. The semiconductor die may be electrically coupled to the singulated unit substrate utilizing solder bumps. Solder balls may be formed on the circuit patterns on the bottom surface of the singulated unit substrate. An underfill material may be formed between the semiconductor die and the top surface of the singulated unit substrate.Type: ApplicationFiled: April 17, 2014Publication date: October 22, 2015Applicant: Amkor Technology, Inc.Inventors: Keun Soo Kim, Byoung Jun Ahn, Choon Heung Lee, Jin Young Kim, Dae Byoung Kang, Roger St. Amand
-
Publication number: 20150221601Abstract: A semiconductor device with redistribution layers formed utilizing dummy substrates is disclosed and may include forming a first redistribution layer on a first dummy substrate, forming a second redistribution layer on a second dummy substrate, electrically connecting a semiconductor die to the first redistribution layer, electrically connecting the first redistribution layer to the second redistribution layer, and removing the dummy substrates. The first redistribution layer may be electrically connected to the second redistribution layer utilizing a conductive pillar. An encapsulant material may be formed between the first and second redistribution layers. Side portions of one of the first and second redistribution layers may be covered with encapsulant. A surface of the semiconductor die may be in contact with the second redistribution layer. The dummy substrates may be in panel form. One of the dummy substrates may be in panel form and the other in unit form.Type: ApplicationFiled: August 1, 2014Publication date: August 6, 2015Inventors: Jin Young Kim, Ji Young Chung, Doo Hyun Park, Choon Heung Lee
-
Publication number: 20150041975Abstract: A semiconductor package includes a first package comprising a circuit board and a first semiconductor die mounded on the circuit board, and a second package comprising a mounting board. At least one second semiconductor die may be mounted on the mounting board, and one or more leads may be electrically connected to the mounting board and/or the second semiconductor die. An adhesion member may bond the first package to the second package, and an encapsulant may encapsulate the first package and the second package. the circuit board, the mounting board, and the one or more leads may be arranged to surround the first semiconductor die and the second semiconductor die, and the plurality of leads may be electrically connected to the circuit board and to a constant potential or ground, to reduce the effects of external electromagnetic interference upon the semiconductor package.Type: ApplicationFiled: August 11, 2014Publication date: February 12, 2015Inventors: Ji Young Chung, Choon Heung Lee, Glenn Rinne, Byong Jin Kim
-
Patent number: 8802494Abstract: The method of fabricating a semiconductor device may include forming a semiconductor die on a substrate, forming an interposer including at least one integrated circuit connected to the semiconductor die on the substrate or on the semiconductor die, and performing encapsulation to surround the semiconductor die and the interposer.Type: GrantFiled: April 24, 2012Date of Patent: August 12, 2014Assignee: Amkor Technology Korea, Inc.Inventors: Choon Heung Lee, Ki Cheol Bae, Do Hyun Na
-
Publication number: 20140147970Abstract: Provided are a semiconductor device using, for example, an epoxy molding compound (EMC) wafer support system and a fabricating method thereof, which can, for example, adjust a thickness of the overall package in a final stage of completing the device while shortening a fabricating process and considerably reducing the fabrication cost. An example semiconductor device may comprise a first semiconductor die that comprises a bond pad and a through silicon via (TSV) connected to the bond pad; an interposer comprising a redistribution layer connected to the bond pad or the TSV and formed on the first semiconductor die, a second semiconductor die connected to the redistribution layer of the interposer and positioned on the interposer; an encapsulation unit encapsulating the second semiconductor die, and a solder ball connected to the bond pad or the TSV of the first semiconductor die.Type: ApplicationFiled: November 19, 2013Publication date: May 29, 2014Applicant: Amkor Technology, Inc.Inventors: Jin Young Kim, Doo Hyun Park, Ju Hoon Yoon, Seong Min Seo, Glenn Rinne, Choon Heung Lee
-
Publication number: 20140042600Abstract: A semiconductor package and manufacturing method thereof are disclosed and may include a first semiconductor device comprising a first bond pad on a first surface of the first semiconductor device, a first encapsulant material surrounding side edges of the first semiconductor device, and a redistribution layer (RDL) formed on the first surface of the first semiconductor device and on a first surface of the encapsulant material. The RDL may electrically couple the first bond pad to a second bond pad formed above the first surface of the encapsulant material. A second semiconductor device comprising a third bond pad on a first surface of the second semiconductor device may face the first surface of the first semiconductor device and be electrically coupled to the first bond pad on the first semiconductor device. The first surface of the first semiconductor device may be coplanar with the first surface of the encapsulant material.Type: ApplicationFiled: August 8, 2013Publication date: February 13, 2014Inventors: Jin Young Kim, No Sun Park, Yoon Joo Kim, Choon Heung Lee, Jin Han Kim, Seung Jae Lee, Se Woong Cha, Sung Kyu Kim, Glenn Rinne
-
Publication number: 20130109135Abstract: The method of fabricating a semiconductor device may include forming a semiconductor die on a substrate, forming an interposer including at least one integrated circuit connected to the semiconductor die on the substrate or on the semiconductor die, and performing encapsulation to surround the semiconductor die and the interposer.Type: ApplicationFiled: April 24, 2012Publication date: May 2, 2013Applicant: AMKOR TECHNOLOGY KOREA, INC.Inventors: Choon Heung LEE, Ki Cheol BAE, Do Hyun NA
-
Patent number: 8183678Abstract: A semiconductor device and a method of fabricating the same. An interposer used for the semiconductor device includes integrated circuits therein to realize the functions of a decoupling capacitor, an ESD preventing circuit, an impedance matching circuit, and termination. The semiconductor device may include a semiconductor die with a through silicon via (TSV) structure having two or more through electrodes that pass through the semiconductor die, in which each of the through electrodes are connected to a respective bond pad of the semiconductor die.Type: GrantFiled: August 4, 2009Date of Patent: May 22, 2012Assignee: AMKOR Technology Korea, Inc.Inventors: Choon Heung Lee, Ki Cheol Bae, Do Hyun Na
-
Publication number: 20110031598Abstract: A semiconductor device and a method of fabricating the same are disclosed. An interposer used for the semiconductor device includes integrated circuits therein to realize the functions of a decoupling capacitor, an ESD preventing circuit, an impedance matching circuit, and termination. Therefore, it is possible to improve the reliability of the operation of the semiconductor device.Type: ApplicationFiled: August 4, 2009Publication date: February 10, 2011Applicant: AMKOR Technology Korea, Inc.Inventors: Choon Heung LEE, Ki Cheol BAE, Do Hyun NA
-
Patent number: 7837120Abstract: In accordance with the present invention, there is provided multiple embodiments of a memory card, each embodiment including a module comprising at least a printed circuit board having an electronic circuit device mounted thereto. The module is inserted into a complementary cavity formed within a case of the memory card, such case generally defining the outer appearance of the memory card. The module is secured within the cavity of the case through the use of an adhesive. In each embodiment of the present invention, the module is uniquely configured to prevent adhesive leakage from within the corresponding cavity of the case of the memory card when the module is secured within the cavity.Type: GrantFiled: November 29, 2005Date of Patent: November 23, 2010Assignee: Amkor Technology, Inc.Inventors: Sang Jae Jang, Chul Woo Park, Choon Heung Lee
-
Patent number: 7719845Abstract: A memory card comprising a circuit board having opposed upper and lower circuit board surfaces, multiple side edges, a chamfer extending between a pair of the side edges, a plurality of pads disposed on the lower circuit board surface, and a conductive pattern which is disposed on the upper circuit board surface and electrically connected to the pads. At least one electronic circuit device is attached to the upper circuit board surface and electrically connected to the conductive pattern of the circuit board. A body at least partially encapsulates the circuit board and the electronic circuit element such that sections of the upper circuit board surface, including one which extends along the entirety of the chamfer, is not covered by the body.Type: GrantFiled: April 20, 2006Date of Patent: May 18, 2010Assignee: Amkor Technology, Inc.Inventors: Sang Jae Jang, Chul Woo Park, Jae Dong Kim, Choon Heung Lee
-
Patent number: 7633763Abstract: A memory card comprising a substrate having opposed top and bottom surfaces and a plurality of terminals disposed on the bottom surface thereof. Mounted to the top surface of the substrate is at least one component which is itself electrically connected to the terminals of the substrate. Formed on the bottom surface of the substrate is a first encapsulation part. Formed on the top surface of the substrate is a second encapsulation part which encapsulates the component mounted thereto.Type: GrantFiled: January 28, 2004Date of Patent: December 15, 2009Assignee: Amkor Technology, Inc.Inventors: Chul Woo Park, Suk Gu Ko, Sang Jae Jang, Sung Su Park, Choon Heung Lee
-
Publication number: 20090021921Abstract: A memory card comprising a circuit board having opposed upper and lower circuit board surfaces, multiple side edges, a chamfer extending between a pair of the side edges, a plurality of pads disposed on the lower circuit board surface, and a conductive pattern which is disposed on the upper circuit board surface and electrically connected to the pads. At least one electronic circuit device is attached to the upper circuit board surface and electrically connected to the conductive pattern of the circuit board. A body at least partially encapsulates the circuit board and the electronic circuit element such that a section of the upper circuit board surface extending along the entirety of the chamfer is not covered by the body.Type: ApplicationFiled: April 26, 2005Publication date: January 22, 2009Inventors: Sang Jae Jang, Chul Woo Park, Suk Ku Ko, Choon Heung Lee
-
Patent number: 7375975Abstract: In accordance with the present invention, there is provided multiple embodiments of a memory card, each embodiment including a case which is cooperatively engaged to a module comprising at least a printed circuit board having an electronic circuit device mounted thereto. In each embodiment of the present invention, the case is reinforced by a stiffener which effectively increases the mechanical strength of the fully fabricated memory card, thus providing the capability to withstand typical bending and twisting tests. The stiffener may be provided in any one of a plurality of different shapes or profiles, and may embedded within one or more of various locations within the case.Type: GrantFiled: October 31, 2005Date of Patent: May 20, 2008Assignee: Amkor Technology, Inc.Inventors: Sang Jae Jang, Chul Woo Park, Choon Heung Lee