Patents by Inventor Choong-Ho Lee

Choong-Ho Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9196733
    Abstract: A fin field effect transistor (fin FET) is formed using a bulk silicon substrate and sufficiently guarantees a top channel length formed under a gate, by forming a recess having a predetermined depth in a fin active region and then by forming the gate in an upper part of the recess. A device isolation film is formed to define a non-active region and a fin active region in a predetermined region of the substrate. In a portion of the device isolation film a first recess is formed, and in a portion of the fin active region a second recess having a depth shallower than the first recess is formed. A gate insulation layer is formed within the second recess, and a gate is formed in an upper part of the second recess. A source/drain region is formed in the fin active region of both sides of a gate electrode.
    Type: Grant
    Filed: April 24, 2015
    Date of Patent: November 24, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Keun-Nam Kim, Hung-Mo Yang, Choong-Ho Lee
  • Patent number: 9174250
    Abstract: A method of cleaning off organic deposition material accumulated on a mask includes forming an organic deposition material pattern on a substrate using the mask, which includes a plurality of slots, in a deposition chamber including a deposition source; transporting the mask to a stock chamber that is maintained at a vacuum and adjacent to the deposition chamber; and partially cleaning off the organic deposition material accumulated along the boundaries of the slots of the mask in the stock chamber. A system to clean off an organic deposition material accumulated on a mask having a plurality of slots, includes a deposition chamber including a deposition source; and a stock chamber that is maintained at substantially the same vacuum as the deposition chamber and includes a cleaning device that cleans off the organic deposition material accumulated on the mask.
    Type: Grant
    Filed: August 11, 2011
    Date of Patent: November 3, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jung-Min Lee, Choong-Ho Lee, Yoon-Chan Oh, Hee-Seong Jeong
  • Patent number: 9172064
    Abstract: A deposition mask for forming an organic layer pattern of an organic light emitting diode (OLED) display includes a base member having a first surface facing a substrate of the OLED display, and a second surface facing a side opposite to the first surface, and including a plurality of openings passing through the first surface and the second surface for forming the organic layer pattern. The opening has a pair of first side walls and a pair of second side walls. Each side wall of the openings has an inclination surface inclined with respect to a thickness direction of the base member, and when measuring an inclination angle of the inclination surface with reference to the first surface of the base member, the inclination angle of the first side wall and the inclination angle of the second side wall are different from each other.
    Type: Grant
    Filed: May 21, 2013
    Date of Patent: October 27, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jung-Min Lee, Choong-Ho Lee
  • Publication number: 20150279960
    Abstract: Provided are field effect transistors and methods of fabricating the same. The transistor may include a substrate with an active pattern, the active pattern having a top surface and two sidewalls, a gate electrode proximal to the top surface and the sidewalls of the active pattern and crossing the active pattern, a gate spacer covering a sidewall of the gate electrode, a gate dielectric pattern at a bottom surface of the gate electrode, a source electrode on the active pattern at one side of the gate electrode, a drain electrode on the active pattern at another side of the gate electrode, and silicide patterns on surfaces of the source and drain electrodes, respectively. The gate dielectric pattern includes at least one high-k layer and the gate spacer has a dielectric constant that is smaller than that of the gate dielectric pattern.
    Type: Application
    Filed: June 16, 2015
    Publication date: October 1, 2015
    Inventors: Choong-Ho Lee, Donggu Yi, Seung Chul Lee, Hyungsuk Lee, Seonah Nam, Changwoo Oh, Jongwook Lee, Song-Yi Han
  • Patent number: 9121095
    Abstract: A thin film deposition apparatus used to produce large substrates on a mass scale and improve manufacturing yield. The thin film deposition apparatus includes a deposition source; a first nozzle disposed at a side of the deposition source and including a plurality of first slits arranged in a first direction; a second nozzle disposed opposite to the first nozzle and including a plurality of second slits arranged in the first direction; and a barrier wall assembly including a plurality of barrier walls arranged in the first direction so as to partition a space between the first nozzle and the second nozzle.
    Type: Grant
    Filed: May 21, 2010
    Date of Patent: September 1, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Choong-Ho Lee, Jung-Min Lee
  • Publication number: 20150228796
    Abstract: A fin field effect transistor (fin FET) is formed using a bulk silicon substrate and sufficiently guarantees a top channel length formed under a gate, by forming a recess having a predetermined depth in a fin active region and then by forming the gate in an upper part of the recess. A device isolation film is formed to define a non-active region and a fin active region in a predetermined region of the substrate. In a portion of the device isolation film a first recess is formed, and in a portion of the fin active region a second recess having a depth shallower than the first recess is formed. A gate insulation layer is formed within the second recess, and a gate is formed in an upper part of the second recess. A source/drain region is formed in the fin active region of both sides of a gate electrode.
    Type: Application
    Filed: April 24, 2015
    Publication date: August 13, 2015
    Inventors: Keun-Nam Kim, Hung-Mo YANG, Choong-Ho LEE
  • Publication number: 20150221887
    Abstract: A display device includes a substrate, a display unit formed on the substrate, a sealing substrate bonded to the substrate by a bonding layer surrounding the display unit, the sealing substrate comprising a complex member and an insulating member, wherein the complex member has a resin matrix and a plurality of carbon fibers and the insulator is connected to an edge of the complex member and comprises a penetration hole, a metal layer disposed at one side of the sealing substrate wherein the one side faces the substrate, and a conductive connection unit filling in the penetration hole and contacting the metal layer. The complex member and the insulator may be coupled by tongue and groovecoupling along a thickness direction of the sealing substrate where the protrusion-groove coupling structure is top-to-bottom symmetric and the insulator may have a thickness identical to that of the complex member.
    Type: Application
    Filed: April 16, 2015
    Publication date: August 6, 2015
    Inventors: Jung-Min Lee, Choong-Ho Lee, Kie Hyun Nam
  • Patent number: 9087723
    Abstract: Provided are field effect transistors and methods of fabricating the same. The transistor may include a substrate with an active pattern, the active pattern having a top surface and two sidewalls, a gate electrode proximal to the top surface and the sidewalls of the active pattern and crossing the active pattern, a gate spacer covering a sidewall of the gate electrode, a gate dielectric pattern at a bottom surface of the gate electrode, a source electrode on the active pattern at one side of the gate electrode, a drain electrode on the active pattern at another side of the gate electrode, and silicide patterns on surfaces of the source and drain electrodes, respectively. The gate dielectric pattern includes at least one high-k layer and the gate spacer has a dielectric constant that is smaller than that of the gate dielectric pattern.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: July 21, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Choong-Ho Lee, Donggu Yi, Seung Chul Lee, Hyungsuk Lee, Seonah Nam, Changwoo Oh, Jongwook Lee, Song-Yi Han
  • Publication number: 20150155489
    Abstract: A thin film deposition apparatus including a deposition source having a crucible to contain a deposition material and a heater to heat and vaporize the deposition material; a nozzle unit disposed at a side of the deposition source along a first direction and having a plurality of nozzle slits to discharge the deposition material that was vaporized; a plurality of emission coefficient increasing units disposed toward the nozzle unit within the deposition source and increasing a quantity of motion of the deposition material that is discharged toward the nozzle unit; a patterning slit sheet disposed opposite to the nozzle unit and having a plurality of patterning slits arranged along the first direction; and a barrier plate assembly disposed between the nozzle unit and the patterning slit sheet along the first direction, and having a plurality of barrier plates that partition a space between the nozzle unit and the patterning slit sheet into a plurality of sub-deposition spaces.
    Type: Application
    Filed: February 9, 2015
    Publication date: June 4, 2015
    Inventors: Choong-Ho Lee, Jung-Min Lee, Jun-Sik Oh
  • Patent number: 9035285
    Abstract: A display device includes a substrate, a display unit formed on the substrate, a sealing substrate bonded to the substrate by a bonding layer surrounding the display unit, the sealing substrate comprising a complex member and an insulating member, wherein the complex member has a resin matrix and a plurality of carbon fibers and the insulator is connected to an edge of the complex member and comprises a penetration hole, a metal layer disposed at one side of the sealing substrate wherein the one side faces the substrate, and a conductive connection unit filling in the penetration hole and contacting the metal layer. The complex member and the insulator may be coupled by tongue and groovecoupling along a thickness direction of the sealing substrate where the protrusion-groove coupling structure is top-to-bottom symmetric and the insulator may have a thickness identical to that of the complex member.
    Type: Grant
    Filed: March 22, 2011
    Date of Patent: May 19, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jung-Min Lee, Choong-Ho Lee, Kie Hyun Nam
  • Patent number: 9018697
    Abstract: A fin field effect transistor (fin FET) is formed using a bulk silicon substrate and sufficiently guarantees a top channel length formed under a gate, by forming a recess having a predetermined depth in a fin active region and then by forming the gate in an upper part of the recess. A device isolation film is formed to define a non-active region and a fin active region in a predetermined region of the substrate. In a portion of the device isolation film a first recess is formed, and in a portion of the fin active region a second recess having a depth shallower than the first recess is formed. A gate insulation layer is formed within the second recess, and a gate is formed in an upper part of the second recess. A source/drain region is formed in the fin active region of both sides of a gate electrode.
    Type: Grant
    Filed: March 26, 2012
    Date of Patent: April 28, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Keun-Nam Kim, Hung-Mo Yang, Choong-Ho Lee
  • Publication number: 20150102329
    Abstract: A mask for depositing a thin film according to an exemplary embodiment of the present invention includes: mask strips each including a plurality of pattern portions disposed end to end along one direction; and a frame on which the mask strips are positioned. Intervals between adjacent ends of adjacent pattern portions differ from each other according to distance from a predetermined location, thereby providing an organic light emitting diode display having a more uniform quality.
    Type: Application
    Filed: October 10, 2014
    Publication date: April 16, 2015
    Inventor: Choong Ho LEE
  • Publication number: 20150076617
    Abstract: Methods of forming patterns of a semiconductor device are provided. The methods may include forming a hard mask film on a semiconductor substrate. The methods may include forming first and second sacrificial film patterns that are spaced apart from each other on the hard mask film. The methods may include forming a first spacer on opposing sidewalls of the first sacrificial film pattern and a second spacer on opposing sidewalls of the second sacrificial film pattern. The methods may include removing the first and second sacrificial film patterns. The methods may include trimming the second spacer such that a line width of the second spacer becomes smaller than a line width of the first spacer. The methods may include forming first and second hard mask film patterns by etching the hard mask film using the first spacer and the trimmed second spacer as an etch mask.
    Type: Application
    Filed: November 20, 2014
    Publication date: March 19, 2015
    Inventors: Myeong-Cheol Kim, Il-Sup Kim, Cheol Kim, Jong-Chan Shin, Jong-Wook Lee, Choong-Ho Lee, Si-Young Choi, Jong-Seo Hong
  • Publication number: 20150068455
    Abstract: Disclosed is a method of manufacturing a metal mask. A method of manufacturing a metal mask in accordance with an exemplary embodiment of the present invention includes forming through holes in a plate using a laser, by scanning the laser onto sequentially smaller overlapping portions of the plate.
    Type: Application
    Filed: September 4, 2014
    Publication date: March 12, 2015
    Inventors: Choong Ho LEE, Tong-Jin Park, Doh-Hyoung Lee, Sung Sik Yun, Da Hee Jeong, Jun Ho Jo
  • Patent number: 8951349
    Abstract: A thin film deposition apparatus including a deposition source having a crucible to contain a deposition material and a heater to heat and vaporize the deposition material; a nozzle unit disposed at a side of the deposition source along a first direction and having a plurality of nozzle slits to discharge the deposition material that was vaporized; a plurality of emission coefficient increasing units disposed toward the nozzle unit within the deposition source and increasing a quantity of motion of the deposition material that is discharged toward the nozzle unit; a patterning slit sheet disposed opposite to the nozzle unit and having a plurality of patterning slits arranged along the first direction; and a barrier plate assembly disposed between the nozzle unit and the patterning slit sheet along the first direction, and having a plurality of barrier plates that partition a space between the nozzle unit and the patterning slit sheet into a plurality of sub-deposition spaces.
    Type: Grant
    Filed: November 19, 2010
    Date of Patent: February 10, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Choong-Ho Lee, Jung-Min Lee, Jun-Sik Oh
  • Publication number: 20150014888
    Abstract: A method of forming a pattern on a mask sheet using a laser beam includes determining a target scan line with respect to the mask sheet, which corresponds to a position of the pattern on a final mask sheet, determining a correction scan line with respect to the mask sheet, along which the laser beam is scanned to form the pattern of the final mask sheet, applying a counter force to the mask sheet, fixing the mask sheet onto a mask frame while the counter force is applied to the mask sheet, scanning the laser beam along the correction scan line, and releasing the counter force which is applied to the mask sheet.
    Type: Application
    Filed: May 30, 2014
    Publication date: January 15, 2015
    Applicant: Samsung Display Co., Ltd.
    Inventors: Yoon-Chan Oh, Choong-Ho Lee
  • Patent number: 8916237
    Abstract: A method of manufacturing a thin film on a substrate including: disposing the substrate to be separated from a thin film deposition apparatus by a preset distance; passing vaporized deposition material through first slits of a first nozzle, the first slits arranged in a first direction; passing the vaporized deposition material received from the first slits through second slits of a second nozzle of the thin film deposition apparatus; using an adjusting member including an actuator set to adjust an orientation of the second nozzle relative to a deposition target area on the substrate on which the deposition material from the second nozzle is to be deposited; and depositing the deposition material from the second nozzle onto the deposition target area while the thin film deposition apparatus or the substrate is moved relative to the other, the second nozzle defining a pattern of deposition material on the substrate, is disclosed.
    Type: Grant
    Filed: May 21, 2010
    Date of Patent: December 23, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Choong-Ho Lee, Jung-Min Lee
  • Patent number: 8906757
    Abstract: Methods of forming patterns of a semiconductor device are provided. The methods may include forming a hard mask film on a semiconductor substrate. The methods may include forming first and second sacrificial film patterns that are spaced apart from each other on the hard mask film. The methods may include forming a first spacer on opposing sidewalls of the first sacrificial film pattern and a second spacer on opposing sidewalls of the second sacrificial film pattern. The methods may include removing the first and second sacrificial film patterns. The methods may include trimming the second spacer such that a line width of the second spacer becomes smaller than a line width of the first spacer. The methods may include forming first and second hard mask film patterns by etching the hard mask film using the first spacer and the trimmed second spacer as an etch mask.
    Type: Grant
    Filed: November 12, 2012
    Date of Patent: December 9, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myeong-Cheol Kim, Il-Sup Kim, Cheol Kim, Jong-Chan Shin, Jong-Wook Lee, Choong-Ho Lee, Si-Young Choi, Jong-Seo Hong
  • Patent number: 8907326
    Abstract: A thin film deposition apparatus that can be used to manufacture large substrates on a mass scale and that improves manufacturing yield, and an organic light-emitting display device manufactured using the thin film deposition apparatus.
    Type: Grant
    Filed: June 14, 2010
    Date of Patent: December 9, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jung-Min Lee, Choong-Ho Lee
  • Publication number: 20140357035
    Abstract: Provided are a semiconductor device including a high voltage transistor and a low voltage transistor and a method of manufacturing the same. The semiconductor device includes a semiconductor substrate including a high voltage region and a low voltage region; a high voltage transistor formed in the high voltage region and including a first active region, a first source/drain region, a first gate insulating layer, and a first gate electrode; and a low voltage transistor formed in the low voltage region and including a second active region, a second source/drain region, a second gate insulating layer, and a second gate electrode. The second source/drain region has a smaller thickness than a thickness of the first source/drain region.
    Type: Application
    Filed: August 14, 2014
    Publication date: December 4, 2014
    Inventors: Shigenobu MAEDA, Hyun-pil NOH, Choong-ho LEE, Seog-heon HAM