Patents by Inventor Choong-Ho Lee

Choong-Ho Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130337588
    Abstract: A deposition mask for forming an organic layer pattern of an organic light emitting diode (OLED) display includes a base member having a first surface facing a substrate of the OLED display, and a second surface facing a side opposite to the first surface, and including a plurality of openings passing through the first surface and the second surface for forming the organic layer pattern. The opening has a pair of first side walls and a pair of second side walls. Each side wall of the openings has an inclination surface inclined with respect to a thickness direction of the base member, and when measuring an inclination angle of the inclination surface with reference to the first surface of the base member, the inclination angle of the first side wall and the inclination angle of the second side wall are different from each other.
    Type: Application
    Filed: May 21, 2013
    Publication date: December 19, 2013
    Applicant: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jung-Min Lee, Choong-Ho Lee
  • Patent number: 8556671
    Abstract: A frit sealing system and a method of manufacturing an organic light-emitting display (OLED) using the frit sealing system are disclosed. In one embodiment, the frit sealing system includes: a thermal expansion film formed on the second substrate to pressurize the second substrate when heat is applied to the frit and thermal expansion film, wherein the frit is interposed between the first and second substrates and a mask formed on the thermal expansion film.
    Type: Grant
    Filed: December 9, 2010
    Date of Patent: October 15, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jung-Min Lee, Choong-Ho Lee
  • Patent number: 8546865
    Abstract: Provided is a nonvolatile memory device having a three dimensional structure. The nonvolatile memory device includes a plurality of stacked semiconductor layers and a plurality of memory cell transistors which is formed on each of a plurality of semiconductor layers and serially connected. Memory cell transistors disposed on different semiconductor layers are serially connected to include one cell string forming a current path in a plurality of semiconductor layers, a first selection transistor serially connected to one edge portion of the cell string and a second selection transistor serially connected to the other edge portion of the cell string.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: October 1, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Ho Lim, Choong-Ho Lee, Hye-Jin Cho
  • Patent number: 8536057
    Abstract: A thin film deposition apparatus and a method of manufacturing an organic light emitting device (OLED) using the thin film deposition apparatus.
    Type: Grant
    Filed: June 10, 2010
    Date of Patent: September 17, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Choong-Ho Lee, Yoon-Chan Oh, Jung-Min Lee
  • Patent number: 8531349
    Abstract: A dual display module having a first display panel and a second display panel, the dual display module including a bezel arranged between the first display panel and the second display panel, and having a penetration area between the first display panel and the second display panel; and a supporting member arranged between the bezel and the second display panel and supporting the second display panel, the supporting member having at least one protrusion unit that protrudes through the penetration area to face the first display panel.
    Type: Grant
    Filed: March 18, 2009
    Date of Patent: September 10, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yoon-Chan Oh, Chan-Kyoung Moon, Kyoung-Soo Lee, Min-Hyeng Lee, Seon-Hee Kim, Gun-Mo Kim, Choong-Ho Lee, Byung-Hee Kim, Kuen-Dong Ha
  • Patent number: 8525401
    Abstract: A display panel with secured mechanical reliability comprises: a first plate including a display region and a non display region, a second plate facing the first plate, a first frit portion interposed between the first plate and the second plate and sealing the display region from outside, and a second frit portion separated from the first fit portion and comprising a plurality of sub-frits isolated from each other. The sub-frits are located between a first line which passes through points closest to edges of the first plate among outer points of the first frit portion with respect to a sealed space and extends parallel to the edges of the first plate and a second line which passes through points furthest from the edges of the first plate among inner points of the first frit portion with respect to the sealed space and extends parallel to the edges of the first plate.
    Type: Grant
    Filed: November 8, 2011
    Date of Patent: September 3, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventor: Choong-Ho Lee
  • Publication number: 20130221447
    Abstract: Provided are field effect transistors and methods of fabricating the same. The transistor may include a substrate with an active pattern, the active pattern having a top surface and two sidewalls, a gate electrode proximal to the top surface and the sidewalls of the active pattern and crossing the active pattern, a gate spacer covering a sidewall of the gate electrode, a gate dielectric pattern at a bottom surface of the gate electrode, a source electrode on the active pattern at one side of the gate electrode, a drain electrode on the active pattern at another side of the gate electrode, and silicide patterns on surfaces of the source and drain electrodes, respectively. The gate dielectric pattern includes at least one high-k layer and the gate spacer has a dielectric constant that is smaller than that of the gate dielectric pattern.
    Type: Application
    Filed: January 30, 2013
    Publication date: August 29, 2013
    Inventors: Choong-Ho Lee, Donggu Yi, Seung Chul Lee, Hyungsuk Lee, Seonah Nam, Changwoo Oh, Jongwook Lee, Song-Yi Han
  • Patent number: 8519549
    Abstract: An anisotropic conductive film (ACF) is disclosed. The ACF includes a film, an adhesive layer positioned on the film, and one or more conductive balls within the adhesive layer. The conductive balls include a first core part having a first hardness, a second core part covering the first core part and having a second hardness that is greater than the first hardness, and a conductive part covering the second core part, respectively.
    Type: Grant
    Filed: September 23, 2010
    Date of Patent: August 27, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jung-Min Lee, Choong-Ho Lee
  • Patent number: 8502448
    Abstract: A display apparatus having an improved function for encapsulating a display unit, and comprising a substrate, wherein the display unit is disposed on the substrate; an encapsulation unit facing the display unit, the encapsulation unit comprising: a metal layer; and a composite member; and a sealing unit disposed between the substrate and the encapsulation unit and separated from the display unit so as to adhere the substrate to the encapsulation unit, wherein the composite member comprises a resin matrix and carbon fibers, and wherein the metal layer is disposed between the substrate and the composite member.
    Type: Grant
    Filed: January 10, 2011
    Date of Patent: August 6, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jung-Min Lee, Kie-Hyun Nam, Choong-Ho Lee, Dong-Ki Lee, Hoon Kim
  • Patent number: 8487383
    Abstract: A flash memory device, including a cell array region where a plurality of memory cells are connected in series to a single cell string, the cell array region including a pocket p-well configured to accommodate the plurality of memory cells and an n-well configured to surround the pocket p-well, a first peripheral region where low-voltage (LV) and high-voltage (HV) switches are connected to the memory cells through a word line, and a second peripheral region where bulk voltage switches are connected to bulk regions of the LV and HV switches.
    Type: Grant
    Filed: December 9, 2010
    Date of Patent: July 16, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yoon-Moon Park, Se-Jun Park, Suk-Kang Sung, Keon-Soo Kim, Jung-Dal Choi, Choong-Ho Lee, Jin-Hyun Shin, Seung-Wook Choi, Dong-Hoon Jang
  • Patent number: 8487533
    Abstract: A display apparatus including: a display unit disposed on a substrate; an encapsulation unit facing the display unit, the encapsulation unit including: a metal layer; a complex member; and a reinforcement member formed on an upper surface of the complex member; and a sealing unit disposed between the substrate and the encapsulation unit and apart from the display unit to bond the substrate and the encapsulation unit to the sealing unit.
    Type: Grant
    Filed: January 11, 2011
    Date of Patent: July 16, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Choong-Ho Lee, Jung-Min Lee, Kie-Hyun Nam
  • Patent number: 8469238
    Abstract: A resin fluid dispensing apparatus includes a container having a first volume arranged to receive a resin fluid, a first connection unit connected to the container, a pressure chamber having a second volume configured to connect to the first connection unit and to contain the resin fluid transported from the first volume through the first connection unit, a pressure unit including a pressure plate directly pressurizing the resin fluid in the second volume, a dispenser having a syringe arranged to receive the pressurized resin fluid transported from the second volume through a second connection unit connected to the pressure chamber and to dispense the received pressurized resin fluid through the syringe.
    Type: Grant
    Filed: August 13, 2010
    Date of Patent: June 25, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jung-Min Lee, Choong-Ho Lee
  • Patent number: 8466470
    Abstract: A display device includes a wire substrate including a wire unit for driving the display device, an integrated circuit chip mounted at the wire substrate, and a pad unit extended from the wire unit to be disposed between the wire substrate and the integrated circuit chip. The pad unit is connected to the integrated circuit chip. The pad unit includes a first conductive layer extended from the wire unit, and a second conductive layer disposed on the first conductive layer. The hardness of the second conductive layer is less than the hardness of the first conductive layer.
    Type: Grant
    Filed: August 27, 2010
    Date of Patent: June 18, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jung-Min Lee, Choong-Ho Lee
  • Patent number: 8455344
    Abstract: A non-volatile memory device includes field insulating layer patterns on a substrate to define an active region of the substrate, upper portions of the field insulating layer patterns protruding above an upper surface of the substrate, a tunnel insulating layer on the active region, a charge trapping layer on the tunnel insulating layer, a blocking layer on the charge trapping layer, first insulating layers on upper surfaces of the field insulating layer patterns, and a word line structure on the blocking layer and first insulating layers.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: June 4, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Suk-Kang Sung, Choong-Ho Lee, Dong-Uk Choi, Hee-Soo Kang
  • Publication number: 20130134520
    Abstract: Provided are a semiconductor device including a high voltage transistor and a low voltage transistor and a method of manufacturing the same. The semiconductor device includes a semiconductor substrate including a high voltage region and a low voltage region; a high voltage transistor formed in the high voltage region and including a first active region, a first source/drain region, a first gate insulating layer, and a first gate electrode; and a low voltage transistor formed in the low voltage region and including a second active region, a second source/drain region, a second gate insulating layer, and a second gate electrode. The second source/drain region has a smaller thickness than a thickness of the first source/drain region.
    Type: Application
    Filed: September 12, 2012
    Publication date: May 30, 2013
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Shigenobu Maeda, Hyun-pil Noh, Choong-ho Lee, Seog-heon Ham
  • Patent number: 8422290
    Abstract: Methods of programming data in a non-volatile memory cell are provided. A memory cell according to some embodiments may include a gate structure that includes a tunnel oxide layer pattern, a floating gate, a dielectric layer and a control gate sequentially stacked on a substrate, impurity regions that are formed in the substrate at both sides of the gate structure, and a conductive layer pattern that is arranged spaced apart from and facing the floating gate. Embodiments of such methods may include applying a programming voltage to the control gate, grounding the impurity regions and applying a fringe voltage to the conductive layer pattern to generate a fringe field in the floating gate.
    Type: Grant
    Filed: March 25, 2011
    Date of Patent: April 16, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hee-Soo Kang, Choong-Ho Lee, Dong-Uk Choi
  • Patent number: 8315102
    Abstract: A non-volatile memory device includes an array of non-volatile memory cells configured to support single bit and multi-bit programming states. A control circuit is provided, which is configured to program a first page of non-volatile memory cells in the array as M-bit cells during a first programming operation and further configured to program the first page of non-volatile memory cells as N-bit cells during a second programming operation. The first and second programming operations are separated in time by at least one operation to erase the first page of non-volatile memory cells. M and N are unequal integers greater than zero.
    Type: Grant
    Filed: November 4, 2011
    Date of Patent: November 20, 2012
    Assignee: Samsung Electronics, Co., Ltd.
    Inventors: Se-Hoon Lee, Choong-Ho Lee, Jung-Dal Choi
  • Patent number: 8293604
    Abstract: Vertical channel semiconductor devices include a semiconductor substrate with a pillar having an upper surface. An insulated gate electrode is around a periphery of the pillar. The insulated gate electrode has an upper surface at a vertical level lower than the upper surface of the pillar to vertically space apart the insulated gate electrode from the upper surface of the pillar. A first source/drain region is in the substrate adjacent the pillar. A second source/drain region is disposed in an upper region of the pillar including the upper surface of the pillar. A contact pad contacts the entire upper surface of the pillar to electrically connect to the second source/drain region.
    Type: Grant
    Filed: July 19, 2010
    Date of Patent: October 23, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-man Yoon, Dong-gun Park, Choong-Ho Lee, Seong-Goo Kim, Won-sok Lee, Seung-bae Park
  • Publication number: 20120235557
    Abstract: A display panel with secured mechanical reliability comprises: a first plate including a display region having light emitters and a non-display region, a second plate facing the first plate, a first frit portion interposed between the first plate and the second plate and sealing the display region from the outside, and a second frit portion separated from the first frit portion and comprising a plurality of sub-frits isolated from each other, wherein the sub-frits are located between a first line which passes through points closest to edges of the first plate among outer points of the first frit portion with respect to a sealed space and extends parallel to the edges of the first plate and a second line which passes through points furthest from the edges of the first plate among inner points of the first frit portion with respect to the sealed space and extends parallel to the edges of the first plate.
    Type: Application
    Filed: November 8, 2011
    Publication date: September 20, 2012
    Applicant: SAMSUNG MOBILE DISPLAY CO., LTD.
    Inventor: Choong-Ho Lee
  • Patent number: 8264034
    Abstract: A fin field effect transistor (fin FET) is formed using a bulk silicon substrate and sufficiently guarantees a top channel length formed under a gate, by forming a recess having a predetermined depth in a fin active region and then by forming the gate in an upper part of the recess. A device isolation film is formed to define a non-active region and a fin active region in a predetermined region of the substrate. In a portion of the device isolation film a first recess is formed, and in a portion of the fin active region a second recess having a depth shallower than the first recess is formed. A gate insulation layer is formed within the second recess, and a gate is formed in an upper part of the second recess. A source/drain region is formed in the fin active region of both sides of a gate electrode.
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: September 11, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Keun-Nam Kim, Hung-Mo Yang, Choong-Ho Lee