Patents by Inventor Christopher Boguslaw Kocon
Christopher Boguslaw Kocon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9324856Abstract: A semiconductor device includes MOSFET cells having a drift region of a first conductivity type. A first and second active area trench are in the drift region. A split gate uses the active trenches as field plates or includes planar gates between the active trenches including a MOS gate electrode (MOS gate) and a diode gate electrode (diode gate). A body region of the second conductivity type in the drift region abutts the active trenches. A source of the first conductivity type in the body region includes a first source portion proximate to the MOS gate and a second source portion proximate to the diode gate. A vertical drift region uses the drift region below the body region to provide a drain. A connector shorts the diode gate to the second source portion to provide an integrated channel diode. The MOS gate is electrically isolated from the first source portion.Type: GrantFiled: May 30, 2014Date of Patent: April 26, 2016Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Christopher Boguslaw Kocon, John Manning Savidge Neilson
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Patent number: 9318598Abstract: A trench MOSFET device includes a semiconductor layer of a first doping type. MOS transistor cells are in a body region of a second doping type in the semiconductor layer. The transistor cells include a first cell type including a first trench providing a first gate electrode or the first gate electrode is on the semiconductor surface between the first trench and a second trench, and a first source region is formed in the body region. The first gate electrode is electrically isolated from the first source region. A second cell type has a third trench providing a second gate electrode or the second gate electrode is on the semiconductor surface between the third trench and a fourth trench, and a second source region is in the body region. An electrically conductive member directly connects the second gate electrode, first source region and second source region together.Type: GrantFiled: May 30, 2014Date of Patent: April 19, 2016Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Thomas Eugene Grebs, Touhidur Rahman, Christopher Boguslaw Kocon
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Patent number: 9299830Abstract: A semiconductor device contains a vertical MOS transistor having a trench gate in trenches extending through a vertical drift region to a drain region. The trenches have field plates under the gate; the field plates are adjacent to the drift region and have a plurality of segments. A dielectric liner in the trenches separating the field plates from the drift region has a thickness great than a gate dielectric layer between the gate and the body. The dielectric liner is thicker on a lower segment of the field plate, at a bottom of the trenches, than an upper segment, immediately under the gate. The trench gate may be electrically isolated from the field plates, or may be connected to the upper segment. The segments of the field plates may be electrically isolated from each other or may be connected to each other in the trenches.Type: GrantFiled: May 7, 2015Date of Patent: March 29, 2016Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Hideaki Kawahara, Seetharaman Sridhar, Christopher Boguslaw Kocon, Simon John Molloy, Hong Yang
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Patent number: 9245994Abstract: A metal oxide semiconductor field effect transistor (MOSFET) in and on a semiconductor surface provides a drift region of a first conductivity type. A plurality of active area trenches in the drift region, and first and second termination trenches are each parallel to and together sandwiching the active area trenches. The active area trenches and termination trenches include a trench dielectric liner and electrically conductive filler material filled field plates. A gate is over the drain drift region between active area trenches. A body region of a second conductivity abuts the active region trenches. A source of the first conductivity type is in the body region on opposing sides of the gate. A vertical drain drift region uses the drift region below the body region. A first and second curved trench feature couples the field plate of the first and second termination trench to field plates of active area trenches.Type: GrantFiled: February 7, 2014Date of Patent: January 26, 2016Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Hideaki Kawahara, Christopher Boguslaw Kocon, Simon John Molloy, John Manning Savidge Neilson
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Patent number: 9230851Abstract: A method of fabricating a semiconductor device includes forming at least one trench from a top side of a semiconductor layer, wherein the trench is lined with a trench dielectric liner and filled by a first polysilicon layer. The surface of the trench dielectric liner is etched, wherein dips in the trench dielectric liner are formed relative to a top surface of the first polysilicon layer which results in forming a protrusion including the first polysilicon layer. The first polysilicon layer is etched to remove at least a portion of the protrusion. A second dielectric layer is formed over at least the trench after etching the first polysilicon layer. A second polysilicon layer is deposited. The second polysilicon layer is etched to remove it over the trench and provide a patterned second polysilicon layer on the top side of the semiconductor layer.Type: GrantFiled: February 7, 2014Date of Patent: January 5, 2016Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Simon John Molloy, Christopher Boguslaw Kocon, John Manning Savidge Neilson, Hong Yang, Seetharaman Sridhar, Hideaki Kawahara
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Publication number: 20150357461Abstract: A semiconductor device includes a vertical MOS transistor with a plurality of parallel RESURF drain trenches separated by a constant spacing in a vertical drain drift region. The vertical MOS transistor has chamfered corners; each chamfered corner extends across at least five of the drain trenches. A RESURF termination trench surrounds the drain trenches, separated from sides and ends of the drain trenches by distances which are functions of the drain trench spacing. At the chamfered corners, the termination trench includes external corners which extend around an end of a drain trench which extends past an adjacent drain trench, and includes internal corners which extend past an end of a drain trench which is recessed from an adjacent drain trench. The termination trench is separated from the drain trenches at the chamfered corners by distances which are also functions of the drain trench spacing.Type: ApplicationFiled: June 9, 2014Publication date: December 10, 2015Inventors: Hideaki KAWAHARA, Christopher Boguslaw KOCON, Simon John MOLLOY, Jayhoon CHUNG, John Manning Savidge NEILSON
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Publication number: 20150357459Abstract: A semiconductor device includes a vertical drift region over a drain contact region, abutted on opposite sides by RESURF trenches. A split gate is disposed over the vertical drift region. A first portion of the split gate is a gate of an MOS transistor and is located over a body of the MOS transistor over a first side of the vertical drift region. A second portion of the split gate is a gate of a channel diode and is located over a body of the channel diode over a second, opposite, side of the vertical drift region. A source electrode is electrically coupled to a source region of the channel diode and a source region of the MOS transistor.Type: ApplicationFiled: June 9, 2014Publication date: December 10, 2015Inventors: Christopher Boguslaw Kocon, Simon John Molloy, John Manning Savidge Neilson, Hideaki Kawahara
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Publication number: 20150349112Abstract: A trench MOSFET device includes a semiconductor layer of a first doping type. MOS transistor cells are in a body region of a second doping type in the semiconductor layer. The transistor cells include a first cell type including a first trench providing a first gate electrode or the first gate electrode is on the semiconductor surface between the first trench and a second trench, and a first source region is formed in the body region. The first gate electrode is electrically isolated from the first source region. A second cell type has a third trench providing a second gate electrode or the second gate electrode is on the semiconductor surface between the third trench and a fourth trench, and a second source region is in the body region. An electrically conductive member directly connects the second gate electrode, first source region and second source region together.Type: ApplicationFiled: May 30, 2014Publication date: December 3, 2015Applicant: Texas Instruments IncorporatedInventors: THOMAS EUGENE GREBS, TOUHIDUR RAHMAN, CHRISTOPHER BOGUSLAW KOCON
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Publication number: 20150349110Abstract: A semiconductor device includes MOSFET cells having a drift region of a first conductivity type. A first and second active area trench are in the drift region. A split gate uses the active trenches as field plates or includes planar gates between the active trenches including a MOS gate electrode (MOS gate) and a diode gate electrode (diode gate). A body region of the second conductivity type in the drift region abutts the active trenches. A source of the first conductivity type in the body region includes a first source portion proximate to the MOS gate and a second source portion proximate to the diode gate. A vertical drift region uses the drift region below the body region to provide a drain. A connector shorts the diode gate to the second source portion to provide an integrated channel diode. The MOS gate is electrically isolated from the first source portion.Type: ApplicationFiled: May 30, 2014Publication date: December 3, 2015Applicant: Texas Instruments IncorporatedInventor: CHRISTOPHER BOGUSLAW KOCON
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Patent number: 9136381Abstract: Semiconductor device includes MOSFET having planar cells on an epitaxial semiconductor surface of a first type providing a drain drift region. A first and second epitaxial column formed in the semiconductor surface are doped a second type. A split gate includes planar gates between the epitaxial columns including a MOS gate electrode (MOS gate) and a diode gate electrode (diode gate). A body region of the second type in the drift region abuts the epitaxial columns. A source of the first type in the body region includes a first source portion proximate to the MOS gate and a second source portion proximate to the diode gate. A vertical drift region uses the drift region below the body region to provide a drain. A connector shorts the diode gate to the second source portion to provide an integrated channel diode. The MOS gate is electrically isolated from the first source portion.Type: GrantFiled: November 18, 2014Date of Patent: September 15, 2015Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Christopher Boguslaw Kocon, John Manning Savidge Neilson, Simon John Molloy, Hideaki Kawahara
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Patent number: 9076671Abstract: A semiconductor device containing a high voltage MOS transistor with a drain drift region over a lower drain layer and channel regions laterally disposed at the top surface of the substrate. RESURF trenches cut through the drain drift region and body region parallel to channel current flow. The RESURF trenches have dielectric liners and electrically conductive RESURF elements on the liners. Source contact metal is disposed over the body region and source regions. A semiconductor device containing a high voltage MOS transistor with a drain drift region over a lower drain layer, and channel regions laterally disposed at the top surface of the substrate. RESURF trenches cut through the drain drift region and body region perpendicular to channel current flow. Source contact metal is disposed in a source contact trench and extended over the drain drift region to provide a field plate.Type: GrantFiled: December 3, 2014Date of Patent: July 7, 2015Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Christopher Boguslaw Kocon, Marie Denison, Taylor Efland
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Publication number: 20150145036Abstract: A semiconductor device containing a high voltage MOS transistor with a drain drift region over a lower drain layer and channel regions laterally disposed at the top surface of the substrate. RESURF trenches cut through the drain drift region and body region parallel to channel current flow. The RESURF trenches have dielectric liners and electrically conductive RESURF elements on the liners. Source contact metal is disposed over the body region and source regions. A semiconductor device containing a high voltage MOS transistor with a drain drift region over a lower drain layer, and channel regions laterally disposed at the top surface of the substrate. RESURF trenches cut through the drain drift region and body region perpendicular to channel current flow. Source contact metal is disposed in a source contact trench and extended over the drain drift region to provide a field plate.Type: ApplicationFiled: December 3, 2014Publication date: May 28, 2015Inventors: Christopher Boguslaw KOCON, Marie DENISON, Taylor Efland
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Patent number: 8928075Abstract: A semiconductor device containing a high voltage MOS transistor with a drain drift region over a lower drain layer and channel regions laterally disposed at the top surface of the substrate. RESURF trenches cut through the drain drift region and body region parallel to channel current flow. The RESURF trenches have dielectric liners and electrically conductive RESURF elements on the liners. Source contact metal is disposed over the body region and source regions. A semiconductor device containing a high voltage MOS transistor with a drain drift region over a lower drain layer, and channel regions laterally disposed at the top surface of the substrate. RESURF trenches cut through the drain drift region and body region perpendicular to channel current flow. Source contact metal is disposed in a source contact trench and extended over the drain drift region to provide a field plate.Type: GrantFiled: August 1, 2012Date of Patent: January 6, 2015Assignee: Texas Instruments IncorporatedInventors: Christopher Boguslaw Kocon, Marie Denison, Taylor Efland
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Patent number: 8884365Abstract: A field effect transistor (FET) includes a body region of a first conductivity type disposed within a semiconductor region of a second conductivity type and a gate trench extending through the body region and terminating within the semiconductor region. The FET also includes a flared shield dielectric layer disposed in a lower portion of the gate trench, the flared shield dielectric layer including a flared portion that extends under the body region. The FET further includes a conductive shield electrode disposed in the trench and disposed, at least partially, within the flared shield dielectric.Type: GrantFiled: May 10, 2013Date of Patent: November 11, 2014Assignee: Fairchild Semiconductor CorporationInventors: Hamza Yilmaz, Daniel Calafut, Christopher Boguslaw Kocon, Steven P. Sapp, Dean E. Probst, Nathan L. Kraft, Thomas E. Grebs, Rodney S. Ridley, Gary M. Dolny, Bruce D. Marchant, Joseph A. Yedinak
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Publication number: 20140308787Abstract: A semiconductor device containing an extended drain MOS transistor with an integrated snubber formed by forming a drain drift region of the MOS transistor, forming a snubber capacitor including a capacitor dielectric layer and capacitor plate over the extended drain, and forming a snubber resistor over a gate of the MOS transistor so that the resistor is connected in series between the capacitor plate and a source of the MOS transistor.Type: ApplicationFiled: June 26, 2014Publication date: October 16, 2014Inventor: Christopher Boguslaw KOCON
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Publication number: 20140264573Abstract: An accumulation-mode field effect transistor including a plurality of gates. The accumulation-mode field effect transistor including a semiconductor region including a channel region adjacent to but insulated from each of the plurality of gates.Type: ApplicationFiled: May 31, 2014Publication date: September 18, 2014Applicant: Fairchild Semiconductor CorporationInventors: Christopher Boguslaw KOCON, Praveen Muraleedharan SHENOY
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Patent number: 8803207Abstract: In one general aspect, an apparatus can include a trench disposed in a semiconductor region, a shield dielectric layer lining a lower portion of a sidewall of the trench and a bottom surface of the trench, and a gate dielectric lining a upper portion of the sidewall of the trench. The apparatus can also include a shield electrode disposed in a lower portion of the trench and insulated from the semiconductor region by the shield dielectric layer, and an inter-electrode dielectric (IED) disposed in the trench over the shield electrode where the shield electrode has a curved top surface.Type: GrantFiled: April 6, 2011Date of Patent: August 12, 2014Assignee: Fairchild Semiconductor CorporationInventors: Thomas E. Grebs, Nathan Lawrence Kraft, Rodney Ridley, Gary M. Dolny, Joseph A. Yedinak, Christopher Boguslaw Kocon, Ashok Challa
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Publication number: 20140217497Abstract: A metal oxide semiconductor field effect transistor (MOSFET) in and on a semiconductor surface provides a drift region of a first conductivity type. A plurality of active area trenches in the drift region, and first and second termination trenches are each parallel to and together sandwiching the active area trenches. The active area trenches and termination trenches include a trench dielectric liner and electrically conductive filler material filled field plates. A gate is over the drain drift region between active area trenches. A body region of a second conductivity abuts the active region trenches. A source of the first conductivity type is in the body region on opposing sides of the gate. A vertical drain drift region uses the drift region below the body region. A first and second curved trench feature couples the field plate of the first and second termination trench to field plates of active area trenches.Type: ApplicationFiled: February 7, 2014Publication date: August 7, 2014Applicant: Texas Instruments IncorporatedInventors: HIDEAKI KAWAHARA, CHRISTOPHER BOGUSLAW KOCON, SIMON JOHN MOLLOY, JOHN MANNING SAVIDGE NEILSON
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Publication number: 20140220761Abstract: A method of fabricating a semiconductor device includes forming at least one trench from a top side of a semiconductor layer, wherein the trench is lined with a trench dielectric liner and filled by a first polysilicon layer. The surface of the trench dielectric liner is etched, wherein dips in the trench dielectric liner are formed relative to a top surface of the first polysilicon layer which results in forming a protrusion including the first polysilicon layer. The first polysilicon layer is etched to remove at least a portion of the protrusion. A second dielectric layer is formed over at least the trench after etching the first polysilicon layer. A second polysilicon layer is deposited. The second polysilicon layer is etched to remove it over the trench and provide a patterned second polysilicon layer on the top side of the semiconductor layer.Type: ApplicationFiled: February 7, 2014Publication date: August 7, 2014Applicant: Texas Instruments IncorporatedInventors: SIMON JOHN MOLLOY, CHRISTOPHER BOGUSLAW KOCON, JOHN MANNING SAVIDGE NEILSON, HONG YANG, SEETHARAMAN SRIDHAR, HIDEAKI KAWAHARA
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Patent number: 8796745Abstract: A semiconductor device containing an extended drain MOS transistor with an integrated snubber formed by forming a drain drift region of the MOS transistor, forming a snubber capacitor including a capacitor dielectric layer and capacitor plate over the extended drain, and forming a snubber resistor over a gate of the MOS transistor so that the resistor is connected in series between the capacitor plate and a source of the MOS transistor.Type: GrantFiled: July 3, 2012Date of Patent: August 5, 2014Assignee: Texas Instruments IncorporatedInventor: Christopher Boguslaw Kocon