Patents by Inventor Christopher M. Laighton

Christopher M. Laighton has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10199470
    Abstract: A Field Effect Transistor (FET) having a substrate; a plurality of active regions disposed on the substrate; and a laterally extending finger-like control electrode disposed on a portion of a surface of the substrate. The active regions are laterally spaced one from the other successively along the laterally extending finger-like control electrode. The laterally extending finger-like control electrode controls a flow of carriers through each one of the plurality of active regions between a source electrode and a drain electrode.
    Type: Grant
    Filed: November 8, 2016
    Date of Patent: February 5, 2019
    Assignee: Raytheon Company
    Inventors: Alan J. Bielunis, Istvan Rodriguez, Christopher M. Laighton
  • Publication number: 20190036189
    Abstract: A phase shifter is formed by providing a branchline coupler having a pair of phase adjusting sections. Each one of the phase adjusting sections is coupled to a corresponding one of a pair of shunt transmission line sections of the branchline coupler. Each one of the pair of phase adjusting sections includes: first and second conductive pads are disposed on the surface of a substrate having a gap between them; one of the pads being connected to a ground plane conductor on a bottom surface of the substrate. A series of conductive layer segment is sequentially written on the surface of the substrate in the gap electrically connected to sidewalls of the first and second pads. Phase shift through the phase shifter is measured after each one of the segments is written. The writing process is terminated when the measuring detects a predetermined phase shift through the phase shift through the phase shifter.
    Type: Application
    Filed: July 26, 2017
    Publication date: January 31, 2019
    Applicant: Raytheon Company
    Inventors: Christopher M. Laighton, Susan C. Trulli, Elicia K. Harper
  • Patent number: 10158156
    Abstract: A microwave transmission line having a coplanar waveguide and a pair of conductive members, each one of the pair of conductive members having a proximal end disposed on a portion of a corresponding one of a pair of ground plane conductors of the coplanar waveguide and a distal end disposed over, and vertically spaced from, a region between a center conductor of the coplanar waveguide and a corresponding one of the pair of ground plane conductors of the coplanar waveguide. The distal ends are laterally separated from each other by a region disposed over the center conductor.
    Type: Grant
    Filed: June 20, 2016
    Date of Patent: December 18, 2018
    Assignee: Raytheon Company
    Inventors: Christopher M. Laighton, Edward A. Watters, Keith R. Kessler
  • Publication number: 20180358676
    Abstract: A quadrature coupler having: a pair of overlying strip conductors separated by a first dielectric layer to provide a coupling region between the coupling region of overlying strip conductors; a pair of opposing ground pads, the coupling region being disposed between the pair of opposing ground pads; a second dielectric layer disposed over the coupling region and between the pair of opposing ground pads; and an electrically conductive shield layer disposed over the second dielectric layer, extending over opposing sides of the dielectric layer and onto the pair of opposing ground pads. Portions of coupler are formed by printing or additive manufacturing.
    Type: Application
    Filed: June 13, 2017
    Publication date: December 13, 2018
    Applicant: Raytheon Company
    Inventors: Christopher M. Laighton, Susan C. Trulli, Elicia K. Harper
  • Publication number: 20180358675
    Abstract: A microwave transmission line structure having a pair of ground strip conductors on a surface of a dielectric substrate structure. A signal strip conductor is disposed on the surface of the dielectric substrate structure between the pair of ground strip conductors. A solid dielectric layer is disposed over: the signal strip conductor; the upper surface of the dielectric substrate structure between sides of each one of the ground strip conductors; and the signal strip conductor. An electrically conductive shield member is disposed on the solid dielectric layer and on, and in direct contact with, upper surfaces of the pair of ground strip conductors. The structure is used on each one of a plurality of proximate microwave transmission lines formed on the substrate structure to electrically isolate the transmission line.
    Type: Application
    Filed: June 7, 2017
    Publication date: December 13, 2018
    Applicant: Raytheon Company
    Inventors: Christopher M. Laighton, Susan C. Trulli, Elicia K. Harper
  • Patent number: 9978698
    Abstract: A structure having pair of structure members separated by a gap and an interconnect structure member disposed in the gap. The interconnect structure member includes: a fill-structure having opposing sides in direct contact with the opposing sides of the first structure member and the second structure member; and, an interconnecting microwave transmission line disposed on the fill-structure electrically interconnecting the microwave transmission line of the first structure member to the second member structure. An electrically conductive member is disposed over a signal line of, and electrically connected to the ground conductor the interconnecting microwave transmission.
    Type: Grant
    Filed: January 25, 2017
    Date of Patent: May 22, 2018
    Assignee: Raytheon Company
    Inventors: Susan C. Trulli, Christopher M. Laighton, Elicia K. Harper
  • Publication number: 20180130888
    Abstract: A Field Effect Transistor (FET) having a substrate; a plurality of active regions disposed on the substrate; and a laterally extending finger-like control electrode disposed on a portion of a surface of the substrate. The active regions are laterally spaced one from the other successively along the laterally extending finger-like control electrode. The laterally extending finger-like control electrode controls a flow of comers through each one of the plurality of active regions between a source electrode and a drain electrode.
    Type: Application
    Filed: November 8, 2016
    Publication date: May 10, 2018
    Applicant: Raytheon Company
    Inventors: Alan J. Bielunis, Istvan Rodriguez, Christopher M. Laighton
  • Publication number: 20180131066
    Abstract: A microwave transmission line having a coplanar waveguide and a pair of conductive members, each one of the pair of conductive members having a proximal end disposed on a portion of a corresponding one of a pair of ground plane conductors of the coplanar waveguide and a distal end disposed over, and vertically spaced from, a region between a center conductor of the coplanar waveguide and a corresponding one of the pair of ground plane conductors of the coplanar waveguide. The distal ends are laterally separated from each other by a region disposed over the center conductor.
    Type: Application
    Filed: June 20, 2016
    Publication date: May 10, 2018
    Applicant: Raytheon Company
    Inventors: Christopher M. Laighton, Edward A. Watters, Keith R. Kessler
  • Publication number: 20170293017
    Abstract: A transmit/receive module having a switch, a load and a controller for coupling radar energy fed to switch to the load during a time interval subsequent to the controller producing a transmit enable signal to the transmit/receive module and prior to the controller producing a receive enable signal to the transmit/receive module.
    Type: Application
    Filed: April 8, 2016
    Publication date: October 12, 2017
    Applicant: Raytheon Company
    Inventors: Steven C. Evangelista, Christopher M. Laighton, Anthony J. Silva
  • Publication number: 20170271281
    Abstract: A microwave amplifier having a field effect transistor formed on an upper surface of a substrate. A de-Q'ing section connected to the field effect transistor includes: a de-Q'ing resistive via that passes through the substrate; and a de-Q'ing capacitor having one plate thereof connected a ground plane conductor through the de-Q'ing resistive via.
    Type: Application
    Filed: July 5, 2016
    Publication date: September 21, 2017
    Applicant: Raytheon Company
    Inventors: Istvan Rodriguez, Christopher M. Laighton, Alan J. Bielunis
  • Patent number: 9755333
    Abstract: A high power RF connector receptacle having a solderable pin, an outer connector receptacle shell and a high breakdown voltage dielectric such as Silicon Carbide. The connector receptacle can be completed as a stepped process where the Silicon Carbide substrate can be mounted to the package, the pin can be dropped into place and soldered, and then the outer shell can be soldered onto the SiC substrate. Alternatively, the SiC, pin and outer shell can be assembled as a subassembly and then soldered to the package. The combination of SiC and solder gives a hermetic seal to the package. In addition, the SiC has an extraordinarily high dielectric breakdown voltage for high power connections.
    Type: Grant
    Filed: July 5, 2016
    Date of Patent: September 5, 2017
    Assignee: Raytheon Company
    Inventors: Christopher M. Laighton, Istvan Rodriguez, Alan J. Bielunis
  • Patent number: 9698144
    Abstract: A Field Effect Transistor (FET) having a plurality of FET cells having a plurality of source pads, a plurality of drain pads, and a plurality of gate electrodes disposed on a surface of a substrate; each one of the FET cells having a corresponding one of the gate electrodes disposed between one of the source pads and one of the drain pads. The FET includes; a gate contact connected to the gate electrode of each one of the FET cells; a drain contact connected to the drain pad of each one of the FET cells; and a source contact connected to source pad of each one of the FET cells. The cells are disposed in a loop configuration.
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: July 4, 2017
    Assignee: Raytheon Company
    Inventors: Istvan Rodriguez, Christopher M. Laighton, Alan J. Bielunis
  • Patent number: 9685438
    Abstract: A Field Effect Transistor (FET) having: a plurality of FET cells having a plurality of source pads, a plurality of drain pads, and a plurality of gate electrodes disposed on a surface of a substrate; each one of the FET cells having a corresponding one of the gate electrodes disposed between one of the source pads and one of the drain pads; a gate contact connected to the gate electrodes of each one of the FET cells; a drain contact connected to the drain pad of each one of the FET cells; and a source contact connected to source pad of each one of the FET cells. The cells are disposed on a surface in a two-dimensional array.
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: June 20, 2017
    Assignee: RAYTHEON COMPANY
    Inventors: Christopher M. Laighton, Alan J. Bielunis, Istvan Rodriguez
  • Publication number: 20170162958
    Abstract: A high power RF connector receptacle having a solder able pin, an outer connector receptacle shell and a high breakdown voltage dielectric such as Silicon Carbide. The connector receptacle can be completed as a stepped process where the Silicon Carbide substrate can be mounted to the package, the pin can be dropped into place and soldered, and then the outer shell can be soldered onto the SiC substrate. Alternatively, the SiC, pin and outer shell can be assembled as a subassembly and then soldered to the package. The combination of SiC and solder gives a hermetic seal to the package.
    Type: Application
    Filed: July 5, 2016
    Publication date: June 8, 2017
    Applicant: Raytheon Company
    Inventors: Christopher M. Laighton, Istvan Rodriguez, Alan J. Bielunis
  • Patent number: 9647310
    Abstract: A microwave structure having an input section for receiving both a common mode signal and a CPW differential mode signal; an output section; and a CPW transmission line, having a center conductor disposed between a pair of coplanar ground plane conductors, connected between the input section and the output section. The conductors of the CPW transmission line are configured to provide the common mode signal a different attenuation in passing to the output section than the CPW transmission line provides to the differential mode signal passing between the input section and the output section.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: May 9, 2017
    Assignee: RAYTHEON COMPANY
    Inventors: Shahed Reza, Keith R. Kessler, Christopher M. Laighton, Michael F. Parkes
  • Patent number: 9634613
    Abstract: A depletion mode FET having a source electrode connected to ground; and a bias circuit for producing a bias current for a gate electrode of the FET. The bias circuit includes a pair of source follower transistors circuits; a first one of the pair of two source follower transistor circuits being coupled between a first voltage supply having a first polarity relative to the ground potential and a second voltage supply having a second polarity relative to ground potential, the first polarity being opposite to the second polarity, the first one of the pair of the source follower transistor circuits supplying a control signal to a second one of the pair of source follower transistor circuits. The second one of the pair of source follower transistors circuits is coupled between the second voltage supply and the ground potential and wherein the second one of the pair of source follower transistor circuits produces a bias signal for the control electrode of the output transistor.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: April 25, 2017
    Assignee: Raytheon Company
    Inventors: Edward A. Watters, Christopher M. Laighton, John P. Bettencourt
  • Patent number: 9589917
    Abstract: A Microwave Monolithic Integrated Circuit (MMIC) having an integrated high power load. The MMIC includes a microwave transmission line and a resistive load coupled to a terminating end of the microwave transmission line. The resistive load comprises a hollow resistive material disposed on sidewalls of a via passing through a substrate, the resistive material having an upper portion electrically connected to a terminating end of a strip conductor of the microwave transmission line strip conductor and a lower portion electrically connected to the ground plane.
    Type: Grant
    Filed: March 21, 2016
    Date of Patent: March 7, 2017
    Assignee: Raytheon Company
    Inventors: Istvan Rodriguez, Christopher M. Laighton, Alan J. Bielunis
  • Patent number: 9584080
    Abstract: A power amplifier structure having: a power divider for dividing power in a signal fed to an input port between a pair of output ports. Each one of a pair of amplifiers has: an input coupled to a corresponding one of the pair of power divider output ports; and an output. A power combiner is provided. Signals at the power divider output ports are fed to the inputs of the pair of amplifiers in a forward direction and then pass through the amplifiers in the forward direction towards the outputs of the pair of amplifiers. Connectors direct the signals at the amplifier outputs to the power combiners, the signal then passing through the power combiner to an output port in a direction opposite to the forward direction.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: February 28, 2017
    Assignee: Raytheon Company
    Inventors: Christopher M. Laighton, James A. Robbins, Jonathan B. Langille, Philip M. Henault
  • Publication number: 20170053910
    Abstract: A Field Effect Transistor (FET) having a plurality of FET cells having a plurality of source pads, a plurality of drain pads, and a plurality of gate electrodes disposed on a surface of a substrate; each one of the FET cells having a corresponding one of the gate electrodes disposed between one of the source pads and one of the drain pads. The FET includes; a gate contact connected to the gate electrode of each one of the FET cells; a drain contact connected to the drain pad of each one of the FET cells; and a source contact connected to source pad of each one of the FET cells. The cells are disposed in a loop configuration.
    Type: Application
    Filed: August 19, 2015
    Publication date: February 23, 2017
    Applicant: Raytheon Company
    Inventors: Istvan Rodriguez, Christopher M. Laighton, Alan J. Bielunis
  • Publication number: 20170053909
    Abstract: A Field Effect Transistor (FET) having: a plurality of FET cells having a plurality of source pads, a plurality of drain pads, and a plurality of gate electrodes disposed on a surface of a substrate; each one of the FET cells having a corresponding one of the gate electrodes disposed between one of the source pads and one of the drain pads; a gate contact connected to the gate electrodes of each one of the FET cells; a drain contact connected to the drain pad of each one of the FET cells; and a source contact connected to source pad of each one of the FET cells. The cells are disposed on a surface in a two-dimensional array.
    Type: Application
    Filed: August 19, 2015
    Publication date: February 23, 2017
    Applicant: RAYTHEON COMPANY
    Inventors: Christopher M. Laighton, Alan J. Bielunis, Istvan Rodriguez