Patents by Inventor Chuan-Chang Li

Chuan-Chang Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10971992
    Abstract: A start-up circuit to discharge EMI filter is developed for power saving. It includes a detection circuit detecting a power source for generating a sample signal. A sample circuit is coupled to the detection circuit for generating a reset signal in response to the sample signal. The reset signal is utilized for discharging a stored voltage of the EMI filter.
    Type: Grant
    Filed: August 5, 2019
    Date of Patent: April 6, 2021
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Wei-Hsuan Huang, Meng-Jen Tsai, Chien-Yuan Lin, Ming-Chang Tsou, Chuan-Chang Li, Gwo-Hwa Wang
  • Publication number: 20190379276
    Abstract: A start-up circuit to discharge EMI filter is developed for power saving. It includes a detection circuit detecting a power source for generating a sample signal. A sample circuit is coupled to the detection circuit for generating a reset signal in response to the sample signal. The reset signal is utilized for discharging a stored voltage of the EMI filter.
    Type: Application
    Filed: August 5, 2019
    Publication date: December 12, 2019
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: WEI-HSUAN HUANG, MENG-JEN TSAI, CHIEN-YUAN LIN, MING-CHANG TSOU, CHUAN-CHANG LI, GWO-HWA WANG
  • Patent number: 10411584
    Abstract: A start-up circuit to discharge EMI filter is developed for power saving. It includes a detection circuit detecting a power source for generating a sample signal. A sample circuit is coupled to the detection circuit for generating a reset signal in response to the sample signal. The reset signal is utilized for discharging a stored voltage of the EMI filter.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: September 10, 2019
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Wei-Hsuan Huang, Meng-Jen Tsai, Chien-Yuan Lin, Ming-Chang Tsou, Chuan-Chang Li, Gwo-Hwa Wang
  • Publication number: 20190123633
    Abstract: A start-up circuit to discharge EMI filter is developed for power saving. It includes a detection circuit detecting a power source for generating a sample signal. A sample circuit is coupled to the detection circuit for generating a reset signal in response to the sample signal. The reset signal is utilized for discharging a stored voltage of the EMI filter.
    Type: Application
    Filed: December 17, 2018
    Publication date: April 25, 2019
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: WEI-HSUAN HUANG, MENG-JEN TSAI, CHIEN-YUAN LIN, MING-CHANG TSOU, CHUAN-CHANG LI, GWO-HWA WANG
  • Patent number: 10193435
    Abstract: A start-up circuit to discharge EMI filter is developed for power saving. It includes a detection circuit detecting a power source for generating a sample signal. A sample circuit is coupled to the detection circuit for generating a reset signal in response to the sample signal. The reset signal is utilized for discharging a stored voltage of the EMI filter.
    Type: Grant
    Filed: April 25, 2013
    Date of Patent: January 29, 2019
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Wei-Hsuan Huang, Meng-Jen Tsai, Chien-Yuan Lin, Ming-Chang Tsou, Chuan-Chang Li, Gwo-Hwa Wang
  • Publication number: 20170019016
    Abstract: A start-up circuit to discharge EMI filter is developed for power saving. It includes a detection circuit detecting a power source for generating a sample signal. A sample circuit is coupled to the detection circuit for generating a reset signal in response to the sample signal. The reset signal is utilized for discharging a stored voltage of the EMI filter.
    Type: Application
    Filed: April 25, 2013
    Publication date: January 19, 2017
    Applicant: SYSTEM GENERAL CORP.
    Inventors: WEI-HSUAN HUANG, MENG-JEN TSAI, CHIEN-YUAN LIN, MING-CHANG TSOU, CHUAN-CHANG LI, GWO-HWA WANG
  • Publication number: 20130235627
    Abstract: A start-up circuit to discharge EMI filter is developed for power saving. It includes a detection circuit detecting a power source for generating a sample signal. A sample circuit is coupled to the detection circuit for generating a reset signal in response to the sample signal. The reset signal is utilized for discharging a stored voltage of the EMI filter.
    Type: Application
    Filed: April 25, 2013
    Publication date: September 12, 2013
    Applicant: SYSTEM GENERAL CORP.
    Inventors: WEI-HSUAN HUANG, MENG-JEN TSAI, CHIEN-YUAN LIN, MING-CHANG TSOU, CHUAN-CHANG LI, GWO-HWA WANG
  • Patent number: 8461915
    Abstract: A start-up circuit to discharge EMI filter is developed for power saving. It includes a detection circuit detecting a power source for generating a sample signal. A sample circuit is coupled to the detection circuit for generating a reset signal in response to the sample signal. The reset signal is utilized for discharging a stored voltage of the EMI filter.
    Type: Grant
    Filed: August 12, 2009
    Date of Patent: June 11, 2013
    Assignee: System General Corp.
    Inventors: Wei-Hsuan Huang, Meng-Jen Tsai, Chien-Yuan Lin, Ming-Chang Tsou, Chuan-Chang Li, Gwo-Hwa Wang
  • Patent number: 8331070
    Abstract: A power supply with an open-loop protection according to the present invention comprises a transformer, a switch, a signal generation circuit, a feedback detection circuit, a brown-out detection circuit, and a delay circuit. The transformer receives an input voltage. The switch is coupled to the transformer for switching the transformer. The signal generation circuit generates a switching signal to control the switch. The feedback detection circuit generates a pull-high signal in response to a feedback signal of the power supply. The brown-out detection circuit generates a delay signal in response to the pull-high signal and the input voltage. The delay circuit counts a delay time in response to the delay signal for generating a disabling signal coupled to the signal generation circuit to latch the switching signal. The brown-out detection circuit is utilized to detect whether the input voltage is in the brown-out condition for determining whether the open-loop protection is executed.
    Type: Grant
    Filed: June 23, 2010
    Date of Patent: December 11, 2012
    Assignee: System General Corp.
    Inventors: Wei-Hsuan Huang, Meng-Jen Tsai, Chien-Yuan Lin, Chuan-Chang Li
  • Publication number: 20110211281
    Abstract: A power supply with an open-loop protection according to the present invention comprises a transformer, a switch, a signal generation circuit, a feedback detection circuit, a brown-out detection circuit, and a delay circuit. The transformer receives an input voltage. The switch is coupled to the transformer for switching the transformer. The signal generation circuit generates a switching signal to control the switch. The feedback detection circuit generates a pull-high signal in response to a feedback signal of the power supply. The brown-out detection circuit generates a delay signal in response to the pull-high signal and the input voltage. The delay circuit counts a delay time in response to the delay signal for generating a disabling signal coupled to the signal generation circuit to latch the switching signal. The brown-out detection circuit is utilized to detect whether the input voltage is in the brown-out condition for determining whether the open-loop protection is executed.
    Type: Application
    Filed: June 23, 2010
    Publication date: September 1, 2011
    Applicant: SYSTEM GENERAL CORP.
    Inventors: WEI-HSUAN HUANG, MENG-JEN TSAI, CHIEN-YUAN LIN, CHUAN-CHANG LI
  • Patent number: 7928758
    Abstract: A transistor gate driving circuit is developed for power saving. It includes a first high-side transistor, a second high-side transistor and a low-side transistor. A voltage clamp device is connected to the gate terminal of the first high-side transistor to limit the maximum output voltage. A detection circuit is coupled to detect a feedback signal of the power converter. The feedback signal is correlated to the output load of the power converter. The detection circuit will generate a disable signal in response to the level of the feedback signal. The disable signal is coupled to disable the second high-side transistor once the level of the feedback signal is lower than a threshold.
    Type: Grant
    Filed: May 26, 2009
    Date of Patent: April 19, 2011
    Assignee: System General Corp.
    Inventors: Ta-Yung Yang, Chuan-Chang Li
  • Publication number: 20100309694
    Abstract: A start-up circuit to discharge EMI filter is developed for power saving. It includes a detection circuit detecting a power source for generating a sample signal. A sample circuit is coupled to the detection circuit for generating a reset signal in response to the sample signal. The reset signal is utilized for discharging a stored voltage of the EMI filter.
    Type: Application
    Filed: August 12, 2009
    Publication date: December 9, 2010
    Inventors: Wei-Hsuan HUANG, Meng-Jen Tsai, Chien-Yuan Lin, Ming-Chang Tsou, Chuan-Chang Li, Gwo-Hwa Wang
  • Publication number: 20100141307
    Abstract: A frequency multiplier according to the present invention comprises a period-to-voltage converter that generates a control signal in response to the period of an input signal. An oscillator generates an output signal in accordance with the control signal. The level of the control signal is corrected to the frequency of the input signal. The control signal is coupled to determine the frequency of the output signal.
    Type: Application
    Filed: November 18, 2009
    Publication date: June 10, 2010
    Inventors: Ta-Yung Yang, Pei-Sheng Tsu, Chih-Ho Lin, Chuan-Chang Li
  • Publication number: 20090309634
    Abstract: A transistor gate driving circuit is developed for power saving. It includes a first high-side transistor, a second high-side transistor and a low-side transistor. A voltage clamp device is connected to the gate terminal of the first high-side transistor to limit the maximum output voltage. A detection circuit is coupled to detect a feedback signal of the power converter. The feedback signal is correlated to the output load of the power converter. The detection circuit will generate a disable signal in response to the level of the feedback signal. The disable signal is coupled to disable the second high-side transistor once the level of the feedback signal is lower than a threshold.
    Type: Application
    Filed: May 26, 2009
    Publication date: December 17, 2009
    Inventors: Ta-Yung YANG, Chuan-Chang LI