Patents by Inventor Chun-Chi Lee

Chun-Chi Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6713320
    Abstract: A bumping process wherein a substrate is first provided with many electrical connections. Subsequently, the bumps on the bump transfer substrate are pressed onto the electrical connections of the substrate accompanying a heating process and then the bumps are transferred onto the electrical connections of the substrate because the adhesion characteristic between the bumps and the electrical connections is better than that between the bumps and the release layer.
    Type: Grant
    Filed: December 30, 2002
    Date of Patent: March 30, 2004
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yung-Chi Lee, Yu-Chen Chou, Tsung-Hua Wu, Su Tao
  • Patent number: 6714421
    Abstract: A flip chip package substrate is disclosed. The substrate is correspondingly flip chip bonded to a first chip, a second chip, and so on, wherein these chips are of similar type of pad arrangement but of different pad pitches. The top face of the flip chip package substrate is provided with a plurality of bump pad groups, and these bump pad groups are respectively provided with a plurality of bump pads in the sequence of a first bump pad, a second bump pad, and so on, and a plurality of bump pads of the same bump pad group are electrically connected with each other, and the positions of the first bump pads are respectively corresponding to the positions of the second pads, and the rest may be inferred by analogy. Hence, these chips share the same flip chip package substrate.
    Type: Grant
    Filed: April 3, 2003
    Date of Patent: March 30, 2004
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Kun-Ching Chen, Ho-Ming Tong, Chun-Chi Lee
  • Publication number: 20040032009
    Abstract: A semiconductor wafer device is provided in this invention. The semiconductor wafer device includes a plurality of chips, circuits, cutting streets, and a polymer layer. The cutting streets include a plurality of longitudinal cutting streets and transverse cutting streets, which are formed between the neighboring chips, and the polymer layer is formed on the cutting streets. In addition, this invention also provides a semiconductor wafer device with a plurality of bumps formed thereon and the bumps are encompassed with a polymer layer.
    Type: Application
    Filed: August 11, 2003
    Publication date: February 19, 2004
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yao-Shin Fang, Chi-Cheng Pan, Kuo-Pin Yang, Su Tao, Sung-Ching Hung, Chun-Chi Lee, Ho-Ming Tong
  • Patent number: 6692581
    Abstract: A solder paste for fabricating bumps includes a flux and metallic alloy powder. The metallic alloy powder includes a plurality of low eutectic metallic alloy granules, and the size of these metallic alloy granules is 20-60 &mgr;m and the average size of the metallic granules is 35 &mgr;m to 45 &mgr;m.
    Type: Grant
    Filed: February 20, 2003
    Date of Patent: February 17, 2004
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Ching-Fu Horng, Shih-Kuang Chen, Shyh-Ing Wu, Chun-Hung Lin, Yung-Chi Lee, Yu-Chen Chou, Tsung-Hua Wu, Su Tao
  • Publication number: 20040026797
    Abstract: A flip chip package substrate is disclosed. The substrate is correspondingly flip chip bonded to a first chip, a second chip, and so on, wherein these chips are of similar type of pad arrangement but of different pad pitches. The top face of the flip chip package substrate is provided with a plurality of bump pad groups, and these bump pad groups are respectively provided with a plurality of bump pads in the sequence of a first bump pad, a second bump pad, and so on, and a plurality of bump pads of the same bump pad group are electrically connected with each other, and the positions of the first bump pads are respectively corresponding to the positions of the second pads, and the rest may be inferred by analogy. Hence, these chips share the same flip chip package substrate.
    Type: Application
    Filed: April 3, 2003
    Publication date: February 12, 2004
    Inventors: Kun-Ching Chen, Ho-Ming Tong, Chun-Chi Lee
  • Publication number: 20040018666
    Abstract: A wafer level package structure and a method for packaging said wafer level package structure are described. The wafer level package structure at least comprises a die, a heat slug covering said die, a carrier for supporting said heat slug and said die, a plurality of wires electrically connecting said die and said carrier, and a mould compound encapsulating said die, said carrier, said heat slug and said wires. The method comprises the steps of (a)providing a heat slug metal with a plurality of openings; (b)mounting said heat slug metal onto a wafer to dispose said openings on corresponding bonding pads of the wafer so as to expose said bonding pads; (c)sawing said combined heat slug metal and wafer into a plurality of die units; (d)attaching said die unit onto a carrier; (e)electrically connecting a plurality of wires to said die unit and said carrier; (f)encapsulating said wired die unit and said carrier.
    Type: Application
    Filed: April 17, 2003
    Publication date: January 29, 2004
    Inventors: Chun-Chi Lee, Su Tao
  • Patent number: 6673711
    Abstract: A solder ball fabricating process for forming solder balls over a wafer having an active layer is provided. A patterned solder mask layer is formed over the active surface of the wafer. The patterned solder mask layer has an opening that exposes a bonding pad on the wafer. Solder material is deposited into the opening over the bonding pad. A reflow process is conducted to form a pre-solder body. The aforementioned steps are repeated so that various solder materials are fused together to form a solder ball over the bonding pad.
    Type: Grant
    Filed: February 26, 2003
    Date of Patent: January 6, 2004
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yung-Chi Lee, Yu-Chen Chou
  • Patent number: 6664128
    Abstract: The present invention provides a bump fabrication process. After forming an under bump metallurgy (UBM) layer and bumps in sequence over the substrate, the under bump metallurgy layer that is not covered by the bumps is etched with an etchant. The etchant mainly comprises sulfuric acid and de-ionized water. The etchant can etch the nickel-vanadium layer of the UBM layer without damaging the bumps.
    Type: Grant
    Filed: February 12, 2003
    Date of Patent: December 16, 2003
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yu-Chen Chou, Tsung-Hua Wu, Su Tao
  • Publication number: 20030189261
    Abstract: An under-ball-metallurgy layer over a contact pad is provided. The contact pad and corresponding contact surface of the under-bump-metallurgy layer are made of copper. The under-ball-metallurgy layer is constructed from a stack of metallic layers selected from a group consisting of titanium/copper, titanium-tungsten alloy/copper, tantalum/copper, titanium/titanium-nitride compound/copper, tantalum/tantalum-nitride compound/copper, tantalum/nickel-vanadium alloy/copper, tantalum/nickel/copper, copper/nickel-vanadium alloy/copper, titanium/nickel/copper, copper/chromium-copper alloy/copper, or chromium-copper alloy/chromium/chromium-copper alloy/copper.
    Type: Application
    Filed: March 11, 2003
    Publication date: October 9, 2003
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Ching-Huei Su, Chao-Fu Weng
  • Publication number: 20030189260
    Abstract: A flip-chip bonding structure suited for bonding a first connect pad and a second connect pad. The flip-chip bonding structure includes a metal layer, a bump and an adhesion body. The metal layer is placed on the first connect pad. The bump, lead-free material, is placed on the metal layer. The adhesion body, made of lead-free material, is placed on the bump and is bonded onto the second connect pad.
    Type: Application
    Filed: April 1, 2003
    Publication date: October 9, 2003
    Inventors: HO-MING TONG, CHUN-CHI LEE, JEN-KUANG FANG, MIN-LUNG HUANG, CHING-HUEI SU, CHAO-FU WENG
  • Publication number: 20030189249
    Abstract: A chip structure having a chip, an adhesion layer, and a metal layer. The chip has an active surface and many conductive pads. The conductive pads are disposed on the active surface, wherein the conductive pads are made of copper. The adhesion layer is directly formed on the conductive pads, wherein the material of the adhesion layer includes copper. The metal layer is formed on the adhesion layer, wherein the material of the metal layer includes copper.
    Type: Application
    Filed: March 11, 2003
    Publication date: October 9, 2003
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Ching-Huei Su, Chao-Fu Weng
  • Patent number: 6617237
    Abstract: A lead-free solder bump fabrication process for producing a plurality of lead-free solder bumps over a wafer is provided. The lead-free solder bump fabrication process includes forming a lead-free pre-formed solder bump over each bonding pad on the wafer and then forming a patterned solder mask layer over the active surface of the wafer. The openings in the solder mask layer expose the respective lead-free pre-formed solder bumps on the wafer. Thereafter, lead-free solder material is deposited into the opening. The material composition of the lead-free solder material differs from the material composition of the lead-free pre-formed solder bump. A reflow process is conducted so that the lead-free pre-formed solder bump fuses with the lead-free solder material to form a lead-free solder bump. Finally, the solder mask layer is removed.
    Type: Grant
    Filed: February 27, 2003
    Date of Patent: September 9, 2003
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yung-Chi Lee, Yu-Chen Chou, Tsung-Hua Wu, Su Tao
  • Publication number: 20030164552
    Abstract: An under-ball metallic layer on a contact pad with the junction between the under-ball metallic layer and the contact pad made from copper material. The under-ball metallic layer comprises an adhesion layer, a barrier layer and a wettable layer. The adhesion layer is formed over the contact pad and made from a material such as titanium-tungsten alloy or chromium. The barrier layer is formed over the adhesion layer and made from a material such as nickel-vanadium alloy. The wettable layer is formed over the barrier layer and made from a material such as copper, palladium or gold.
    Type: Application
    Filed: May 3, 2002
    Publication date: September 4, 2003
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yung-Chi Lee
  • Publication number: 20030166330
    Abstract: The present invention provides a bump fabrication process. After forming an under bump metallurgy (UBM) layer and bumps in sequence over the substrate, the under bump metallurgy layer that is not covered by the bumps is etched with an etchant. The etchant mainly comprises sulfuric acid and de-ionized water. The etchant can etch the nickel-vanadium layer of the UBM layer without damaging the bumps.
    Type: Application
    Filed: February 12, 2003
    Publication date: September 4, 2003
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yu-Chen Chou, Tsung-Hua Wu, Su Tao
  • Publication number: 20030166331
    Abstract: A bump fabrication process for forming a bump over a wafer having a plurality of bonding pads thereon is provided. A patterned solder mask layer having a plurality of openings that exposes the respective bonding pads is formed over a wafer. The area of the opening in a the cross-sectional area through a the bottom-section as well as through a the top-section of the opening is smaller than the area of the opening in a the cross-sectional area through a the mid-section of the opening. Solder material is deposited into the opening and then a reflow process is conducted fusing the solder material together to form a spherical bump inside the opening. Finally, the solder mask layer is removed. In addition, a pre-formed bump may form on the bonding pad of the wafer prior to forming the patterned solder mask layer over the wafer having at leastwith an opening that exposes the pre-formed bump.
    Type: Application
    Filed: February 10, 2003
    Publication date: September 4, 2003
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yung-Chi Lee, Yu-Chen Chou, Tsung-Hua Wu, Su Tao
  • Publication number: 20030166332
    Abstract: A bump fabrication method is described. The method comprises the steps of providing a wafer having an active surface and a plurality of bonding pads formed on the active surface; respectively forming an under bump metallurgy layer onto the bonding pads, wherein the under bump metallurgy layer includes at least a wetting layer having an oxidized region and positioned at a top layer of the under bump metallurgy layer; patterning a masking layer on the active surface wherein the masking layer is provided with a plurality of openings to expose the wetting layers; removing the oxidized region of the wetting layer using ionic bombardment; fully forming a flux film on the active layer, wherein at least a portion of the flux film covers onto the wetting layer; filling a solder paste into the openings; performing a re-flow process to form a plurality of bumps after the solder paste melts so that the flux film removes the oxidized region of the wetting layer; and removing the masking layer.
    Type: Application
    Filed: February 24, 2003
    Publication date: September 4, 2003
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yung-Chi Lee, Yu-Chen Chou, Tsung-Hua Wu, Su Tao
  • Publication number: 20030164395
    Abstract: A solder ball attaching process for attaching solder balls to a wafer is provided. First, an under-ball-metallurgy layer is formed on the active surface of the wafer. Patterned masking layers are sequentially formed over the active surface of the wafer. The masking layers together form a step opening structure that exposes the under-ball-metallic layer. A solder ball is placed on the uppermost masking layer and allowed to roll so that the solder ball drops into the step opening structure by gravity. A reflow process is conducted to join the solder ball and the under-ball-metallurgy layer together. Finally, various masking layers are removed to expose the solder ball on the bonding pad of the wafer.
    Type: Application
    Filed: December 30, 2002
    Publication date: September 4, 2003
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yung-Chi Lee, Yu-Chen Chou, Tsung-Hua Wu, Su Tao
  • Publication number: 20030164204
    Abstract: A solder paste for fabricating bumps includes a flux and metallic alloy powder. The metallic alloy powder includes a plurality of low eutectic metallic alloy granules, and the size of these metallic alloy granules is 20-60 &mgr;m and the average size of the metallic granules is 35 &mgr;m to 45 &mgr;m.
    Type: Application
    Filed: February 20, 2003
    Publication date: September 4, 2003
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Ching-Fu Horng, Shih-Kuang Chen, Shyh-Ing Wu, Chun-Hung Lin, Yung-Chi Lee, Yu-Chen Chou, Tsung-Hua Wu, Su Tao
  • Publication number: 20030162380
    Abstract: A solder ball fabricating process for forming solder balls over a wafer having an active layer is provided. A patterned solder mask layer is formed over the active surface of the wafer. The patterned solder mask layer has an opening that exposes a bonding pad on the wafer. Solder material is deposited into the opening over the bonding pad. A reflow process is conducted to form a pre-solder body. The aforementioned steps are repeated so that various solder materials are fused together to form a solder ball over the bonding pad.
    Type: Application
    Filed: February 26, 2003
    Publication date: August 28, 2003
    Inventors: HO-MING TONG, CHUN-CHI LEE, JEN-KUANG FANG, MIN-LUNG HUANG, JAU-SHOUNG CHEN, CHING-HUEI SU, CHAO-FU WENG, YUNG-CHI LEE, YU-CHEN CHOU
  • Publication number: 20030162321
    Abstract: A bumping process wherein a substrate is first provided with many electrical connections. Subsequently, the bumps on the bump transfer substrate are pressed onto the electrical connections of the substrate accompanying a heating process and then the bumps are transferred onto the electrical connections of the substrate because the adhesion characteristic between the bumps and the electrical connections is better than that between the bumps and the release layer.
    Type: Application
    Filed: December 30, 2002
    Publication date: August 28, 2003
    Inventors: Ho-Ming Tong, Chun-Chi Lee, Jen-Kuang Fang, Min-Lung Huang, Jau-Shoung Chen, Ching-Huei Su, Chao-Fu Weng, Yung-Chi Lee, Yu-Chen Chou, Tsung-Hua Wu, Su Tao