Patents by Inventor Chun-Chung Huang
Chun-Chung Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250041975Abstract: A laser slicing apparatus, in which a laser module provides a laser beam, and a light splitting element of a focusing lens set splits the laser beam into a plurality of focused laser beams to form a plurality of induce lines having first laser modified cracks in a modified layer at a predetermined depth inside a substrate. A rotating module rotates the light splitting element with an angle, and the light splitting element converts the focused laser beams according to this angle to form a plurality of modified groups between the induce lines. Each modified group includes a plurality of modified lines having second laser modified cracks, and the first laser modified cracks and the second laser modified cracks are connected to each other to form a continuous laser modified crack in the modified layer at the predetermined depth inside the substrate, thereby speeding up the laser slicing production.Type: ApplicationFiled: September 11, 2023Publication date: February 6, 2025Applicant: Industrial Technology Research InstituteInventors: Jyun-Jhih WANG, Chun-Ming CHEN, Yu-Chung LIN, Pin-Hao HU, Chien-Jung HUANG
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Publication number: 20250024657Abstract: A method includes depositing a metal to form a gate layer for a first memory cell in a metallization layer of the semiconductor device. The method includes forming a plurality of semiconductor channels separated from the gate layer by a gate oxide layer. The method includes defining a plurality of gates from the gate layer. The method includes interconnecting the plurality of gates and the plurality of semiconductor channels to form a memory cell, wherein the interconnection comprises a plurality of mezzanine levels.Type: ApplicationFiled: July 11, 2023Publication date: January 16, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wei-Hua Chen, Kuan-Chung Chiu, Chieh Lee, Chun-Ying Lee, Chia-En Huang, Yi-Ching Liu
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Patent number: 11115606Abstract: A motherboard is capable of outputting image data and includes an image transmission port, an on-board video graphics array (VGA) card, a switching circuit, a control circuit, and a first network connection port. The image transmission port is configured to receive an external image signal. The on-board VGA card is configured to provide an internal image signal. The switching circuit selectively uses the external image signal or the internal image signal as image data. The control circuit selectively uses the image data or Ethernet network data as output data. The first network connection port is configured to transmit the output data.Type: GrantFiled: May 29, 2020Date of Patent: September 7, 2021Assignee: GIGA-BYTE TECHNOLOGY CO., LTD.Inventors: Yin-Yu Lin, Chia-En Liu, Chun-Chung Huang
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Publication number: 20200382722Abstract: A motherboard is capable of outputting image data and includes an image transmission port, an on-board video graphics array (VGA) card, a switching circuit, a control circuit, and a first network connection port. The image transmission port is configured to receive an external image signal. The on-board VGA card is configured to provide an internal image signal. The switching circuit selectively uses the external image signal or the internal image signal as image data. The control circuit selectively uses the image data or Ethernet network data as output data. The first network connection port is configured to transmit the output data.Type: ApplicationFiled: May 29, 2020Publication date: December 3, 2020Applicant: GIGA-BYTE TECHNOLOGY CO., LTD.Inventors: Yin-Yu LIN, Chia-En LIU, Chun-Chung HUANG
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Patent number: 9708640Abstract: An electrospun nanofibrous membrane is sheet like and is formed by multiple glucose oxidase/potassium hexacyanoferrate(III) modified electrospun nanofibers. The glucose oxidase/potassium hexacyanoferrate(III) modified electrospun nanofibers are PVA electrospun nanofibers containing glucose oxidase and potassium hexacyanoferrate(III) homogeneously dispersed therein. The glucose oxidase/potassium hexacyanoferrate(III) modified electrospun nanofibers are PVA electrospun nanofibers and are cross-linked by glutaraldehyde vapor with ultrasonic energy assistance. Graphene modified PVA/GOx electrospun membranes were prepared to examine the immobilization mechanism between graphene and GOx. The electrochemical measurement results show that the sensitivities increased with increasing graphene concentrations up to 20 ppm. The highest sensitivity recorded 38.7 ?A/mM was for a PVA/GOx membrane with 20 ppm graphene representing a 109% increase over a membrane made without graphene.Type: GrantFiled: July 6, 2015Date of Patent: July 18, 2017Assignee: National Taiwan University of Science and TechnologyInventors: Chang-Mou Wu, Hsiu-An Yu, Chun-Chung Huang
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Patent number: 9622348Abstract: A multilayer circuit board includes a plurality of stacked substrates, a plurality of first conductive lands, and a plurality of second conductive lands. A surface at a side of each of the substrates has an exposed portion which is not covered by the neighboring substrate, wherein each of the first conductive lands is respectively provided on each of the exposed portions. Each of the second conductive lands is provided on the exposed portion of the outermost substrate, wherein each of the substrates has a conductor pattern to be electrically connected to one of the first conductive lands and to one of the second conductive lands.Type: GrantFiled: July 15, 2014Date of Patent: April 11, 2017Assignee: MPI CORPORATIONInventors: Wei-Cheng Ku, Jun-Liang Lai, Chun-Chung Huang, Jing-Zhi Hung, Yung Nan Wu, Chih-Hao Ho
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Patent number: 9562937Abstract: A transconductance amplifier mirror circuit is connected to an electrode for sensing the capacitance of the electrode with reference to ground, or the capacitance between the electrode and another electrode. A voltage level change is produced on the electrode connected to the transconductance amplifier mirror circuit to cause the transconductance amplifier mirror circuit to supply charges to or drain charges from a charge calculation circuit. The charge amount variation is converted to a signal for calculating the sensed capacitance.Type: GrantFiled: June 2, 2015Date of Patent: February 7, 2017Assignee: ELAN MICROELECTRONICS CORPORATIONInventors: Chun-Chung Huang, I-Shu Lee, Shih-Yuan Hsu, Te-Sheng Chiu
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Patent number: 9442134Abstract: A probe card, which is between a tester and a device under test (DUT), includes two first electrical lines, two second electrical lines, two inductive elements, and a capacitor. The first electrical lines are electrically connected to the probes respectively. The second electrical lines are electrically connected to the first electrical lines respectively. The inductive elements are electrically connected to the first electrical lines and the tester respectively; and the capacitor has opposite ends connected to the second electrical lines respectively.Type: GrantFiled: July 15, 2014Date of Patent: September 13, 2016Assignee: MPI CORPORATIONInventors: Wei-Cheng Ku, Jun-Liang Lai, Chun-Chung Huang, Wei Chen, Hsin-Hsiang Liu, Kuang-Chung Chou
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Publication number: 20160153025Abstract: An electrospun nanofibrous membrane being sheet like and being formed by comprising multiple glucose oxidase/potassium hexacyanoferrate (III) modified electrospun nanofibers, wherein the glucose oxidase/potassium hexacyanoferrate (III) modified electrospun nanofibers are PVA electrospun nanofibers containing glucose oxidase and potassium hexacyanoferrate (III) homogeneously dispersed therein; and the glucose oxidase/potassium hexacyanoferrate (III) modified electrospun nanofibers are PVA electrospun nanofibers and are cross-linked by glutaraldehyde vapor with ultrasonic energy assistance. In the present invention, graphene modified PVA/GOx electrospun membranes were prepared to examine the immobilization mechanism between graphene and GOx. The electrochemical measurement results show that the sensitivities increased with increasing graphene concentrations up to 20 ppm. The highest sensitivity recorded 38.Type: ApplicationFiled: July 6, 2015Publication date: June 2, 2016Inventors: Chang-Mou Wu, Hsiu-An Yu, Chun-Chung Huang
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Publication number: 20150260771Abstract: A transconductance amplifier mirror circuit is connected to an electrode for sensing the capacitance of the electrode with reference to ground, or the capacitance between the electrode and another electrode. A voltage level change is produced on the electrode connected to the transconductance amplifier mirror circuit to cause the transconductance amplifier mirror circuit to supply charges to or drain charges from a charge calculation circuit. The charge amount variation is converted to a signal for calculating the sensed capacitance.Type: ApplicationFiled: June 2, 2015Publication date: September 17, 2015Inventors: Chun-Chung HUANG, I-Shu LEE, Shih-Yuan HSU, Te-Sheng CHIU
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Patent number: 9104277Abstract: Stimulus regions are defined based on the traces of a capacitive touch panel. A first signal is applied to a first trace in a first direction under a second signal applied to a second trace in a second direction to stimulate the second trace, to sense a stimulus region for an ADC value thereof. Calibration parameters for the traces are determined according to the ADC values of the traces without being touched, and are stored for later sensing the traces for position calculation and multi-finger calculation.Type: GrantFiled: November 15, 2010Date of Patent: August 11, 2015Assignee: ELAN MICROELECTRONICS CORPORATIONInventors: Tsun-Min Wang, Chun-Chung Huang
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Patent number: 9081438Abstract: A capacitive touch panel controller has a memory and multiple driving signal output units. At least one transistor of each driving signal output unit and multiple transistors of the memory are fabricated by an identical semiconductor fabrication process so that the gate oxide layers of the transistors of the driving signal output unit and the memory are identical in thickness. As the transistor of each driving signal output unit and those of the memory are fabricated by a same high-voltage semiconductor fabrication process, the transistor of each driving signal output unit can be fabricated to provide a capacitive touch panel controller having high-voltage driving capability without using any high-voltage fabrication process and increasing the production cost. Due to the high-voltage driving, the SNR and anti-interference capability can be increased.Type: GrantFiled: January 10, 2013Date of Patent: July 14, 2015Assignee: Elan Microelectronics CorporationInventors: I-Hau Yeh, Tsun-Min Wang, Chun-Chung Huang
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Patent number: 9075486Abstract: A transconductance amplifier mirror circuit is connected to an electrode for sensing the capacitance of the electrode with reference to ground, or the capacitance between the electrode and another electrode. A voltage level change is produced on the electrode connected to the transconductance amplifier mirror circuit to cause the transconductance amplifier mirror circuit to supply charges to or drain charges from a charge calculation circuit. The charge amount variation is converted to a signal for calculating the sensed capacitance.Type: GrantFiled: December 9, 2011Date of Patent: July 7, 2015Assignee: ELAN MICROELECTRONICS CORPORATIONInventors: Chun-Chung Huang, I-Shu Lee, Shih-Yuan Hsu, Te-Sheng Chiu
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Publication number: 20150015291Abstract: A cantilever probe card, which is provided between a device under test (DUT) and a tester, includes a carrier board, a probe base, two probes, and a transmission device. The carrier board is provided with through holes. The probe base is provided on the carrier board, and the probes are mounted to the probe base. Each probe has a tip to contact a test pad of the DUT. The transmission device is flexible, and has signal circuits. The transmission device passes through the through hole on the carrier board, and the signal circuits connect the probes to the tester respectively.Type: ApplicationFiled: July 15, 2014Publication date: January 15, 2015Applicant: MPI CORPORATIONInventors: WEI-CHENG KU, Jun-Liang Lai, Chun-Chung HUANG, Jing-Zhi Hung, Yung Nan Wu, CHIH-HAO HO
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Publication number: 20150014046Abstract: A multilayer circuit board includes a plurality of stacked substrates, a plurality of first conductive lands, and a plurality of second conductive lands. A surface at a side of each of the substrates has an exposed portion which is not covered by the neighboring substrate, wherein each of the first conductive lands is respectively provided on each of the exposed portions. Each of the second conductive lands is provided on the exposed portion of the outermost substrate, wherein each of the substrates has a conductor pattern to be electrically connected to one of the first conductive lands and to one of the second conductive lands.Type: ApplicationFiled: July 15, 2014Publication date: January 15, 2015Applicant: MPI CORPORATIONInventors: Wei-Cheng KU, Jun-Liang LAI, Chun-Chung HUANG, Jing-Zhi HUNG, Yung Nan WU, Chih-Hao HO
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Publication number: 20150015295Abstract: A probe card, which is between a tester and a device under test (DUT), includes two first electrical lines, two second electrical lines, two inductive elements, and a capacitor. The first electrical lines are electrically connected to the probes respectively. The second first electrical lines are electrically connected to the first electrical lines respectively. The inductive elements are electrically connected the first electrical lines and the tester respectively; and the capacitor has opposite ends connected to the second first electrical lines respectively.Type: ApplicationFiled: July 15, 2014Publication date: January 15, 2015Applicant: MPI CORPORATIONInventors: WEI-CHENG KU, Jun-Liang Lai, Chun-Chung HUANG, Wei Chen, Hsin-Hsiang Liu, Kuang-Chung Chou
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Patent number: 8884909Abstract: A control circuit and a control method for a capacitive touch panel are provided. Therein, while a scanning signal charges and discharges each trace on the capacitive touch panel, a signal in phase with the scanning signal is provided to traces adjacent to the scanned trace or a ground layer under the scanned trace so as to lower parasitic capacitances between the scanned trace and the ground layer or other traces, thereby decreasing a base capacitance of the capacitive touch panel and enhancing a sensing result of the control circuit as well as providing a shielding effect and reducing noise interference so that the capacitive touch panel has improved performance.Type: GrantFiled: February 25, 2009Date of Patent: November 11, 2014Assignee: Elan Microelectronics CorporationInventors: Chun-Chung Huang, Tsun-Min Wang, Chun-Yu Lin
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Patent number: 8830201Abstract: An equalized capacitive touchpad and a touch positioning method for a capacitive touchpad use an equalizer to correct a sensed value of a mutual capacitance between two sensing lines of the capacitive touchpad, to thereby offset the attenuation of the sensed value due to the impedance of the two sensing lines. Thus, the sensed values generated from different positions along a sensing line are equalized, and the touch positioning accuracy of the capacitive touchpad is improved.Type: GrantFiled: July 22, 2013Date of Patent: September 9, 2014Assignee: Elan Microelectronics CorporationInventors: Chun-Chung Huang, Tsun-Min Wang
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Patent number: 8749520Abstract: A two-step detection for a capacitive touchpad to identify a real touch point first detects the self capacitances from multiple capacitance sensor traces of the capacitive touchpad to identify any touch point on the capacitive touchpad and then, if multiple touch points are detected, further detects the mutual capacitance at one of the detected touch points to identify whether it is a real touch point.Type: GrantFiled: July 9, 2013Date of Patent: June 10, 2014Assignee: Elan Microelectronics Corp.Inventors: Chun-Chung Huang, Tsun-Min Wang, Te-Sheng Chiu
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Patent number: 8736578Abstract: A sensing method and circuit for a capacitive touch panel sense the capacitance variation of a lateral capacitor formed at the intersection of two traces of the capacitive touch panel, to distinguish a real point from a ghost point. A sensing cycle includes two non-overlapping clock phases. In the first clock phase, the voltages across the lateral capacitor and across a sensing capacitor are set. In the second clock phase, the voltage at a first, terminal of the lateral capacitor is changed, and a second terminal of the lateral capacitor is connected to a first terminal of the sensing capacitor, causing a voltage variation at a second terminal of the sensing capacitor. This voltage variation is used to determine whether the intersection is touched. The sensing method and circuit reflect the status of the lateral capacitor in real-time and prevent the location of the touch point from being misjudged.Type: GrantFiled: March 13, 2013Date of Patent: May 27, 2014Assignee: Elan Microelectronics CorporationInventors: Tsun-Min Wang, Chun-Yu Lin, Te-Sheng Chiu, Chun-Chung Huang