Abstract: The present disclosure relates to a fractional frequency divider, a radio frequency transceiver, and a method of configuring a phase delay in the fractional frequency divider. The fractional frequency divider comprises a counter, a multiplexer, and a delay module. The method is applicable to the fractional frequency divider. The radio frequency transceiver comprises the fractional frequency divider, and the fractional frequency divider adopts the method. According to the aforesaid technical solution, the present disclosure has advantages as follows: the embodiments of the present disclosure can minimize the timing inaccuracy and suppress the output jitter and output spurs; and the embodiments of the present disclosure can effectively extend the operating frequency range of the fractional frequency divider.

Abstract: The present disclosure relates to a fractional frequency divider, a radio frequency transceiver, and a method of configuring a phase delay in the fractional frequency divider. The fractional frequency divider comprises a counter, a multiplexer, and a delay module. The method is applicable to the fractional frequency divider. The radio frequency transceiver comprises the fractional frequency divider, and the fractional frequency divider adopts the method. According to the aforesaid technical solution, the present disclosure has advantages as follows: the embodiments of the present disclosure can minimize the timing inaccuracy and suppress the output jitter and output spurs; and the embodiments of the present disclosure can effectively extend the operating frequency range of the fractional frequency divider.

Abstract: An operational amplifier, any of a pair of amplification circuits of its output-stage amplification circuit unit comprises: a first and second transistors, a capacitor and a DC bias circuit; a control electrode of the first transistor is connected with a corresponding output terminal of a preceding-stage amplification circuit unit, a first electrode thereof is connected with a first power terminal and a second electrode thereof is connected with an output terminal of an amplification circuit of the output-stage amplification circuit unit; an output terminal of the DC bias circuit is connected with a control electrode of the second transistor, a first electrode of which is connected with a second power terminal, and a second electrode thereof is connected with the output terminal; both ends of the capacitor are respectively connected with the control electrodes of the first and second transistors; and the first and second transistors are of opposite polarities.

Abstract: The present disclosure discloses an apparatus for protection against electrostatic discharge and a method of manufacturing the same. The apparatus comprises: a first input/output pad electrically connected to an input/output pin and comprising an input/output protection circuit provided between a power source line and a ground line, wherein the input/output protection circuit is configured to release an electrostatic discharge current generated at the input/output pin; and a second input/output pad which is an empty pad electrically connected to the input/output pin and an RF input/output terminal of an internal RF circuit and is configured to receive a signal from the input/output pin and transmit the signal to the internal RF circuit. With the above apparatus, parasitic capacitive load can be minimized while electrostatic protection is performed on the RF circuit.

Abstract: The present disclosure discloses a harmonic rejection mixing circuit device and a receiver. In the harmonic rejection mixing circuit device, outputs of first and fourth mixers are combined with the input terminal of the fourth mixer being connected to a capacitor, the first mixer samples a first group of local oscillator (LO) signals, and the fourth mixer phase-invertedly samples the first group of LO signals, thus the noise introduced by a fundamental LO signal input to the first mixer may be eliminated using the double balance feature of the fourth mixer core, thereby ensuring a high signal-to-noise ratio of the receiver. Similarly, the noises introduced by fundamental LO signals input to second and third mixers may be eliminated respectively using the double balance features of the fifth and sixth mixer cores, thereby lowering the noise figure to ensure a high signal-to-noise ratio of the receiver.

Abstract: The present disclosure discloses an apparatus for protection against electrostatic discharge and a method of manufacturing the same. The apparatus comprises: a first input/output pad electrically connected to an input/output pin and comprising an input/output protection circuit provided between a power source line and a ground line, wherein the input/output protection circuit is configured to release an electrostatic discharge current generated at the input/output pin; and a second input/output pad which is an empty pad electrically connected to the input/output pin and an RF input/output terminal of an internal RF circuit and is configured to receive a signal from the input/output pin and transmit the signal to the internal RF circuit. With the above apparatus, parasitic capacitive load can be minimized while electrostatic protection is performed on the RF circuit.

Abstract: The present disclosure discloses a harmonic rejection mixing circuit device and a receiver. In the harmonic rejection mixing circuit device, outputs of first and fourth mixers are combined with the input terminal of the fourth mixer being connected to a capacitor, the first mixer samples a first group of local oscillator (LO) signals, and the fourth mixer phase-invertedly samples the first group of LO signals, thus the noise introduced by a fundamental LO signal input to the first mixer may be eliminated using the double balance feature of the fourth mixer core, thereby ensuring a high signal-to-noise ratio of the receiver. Similarly, the noises introduced by fundamental LO signals input to second and third mixers may be eliminated respectively using the double balance features of the fifth and sixth mixer cores, thereby lowering the noise figure to ensure a high signal-to-noise ratio of the receiver.

Abstract: A signal mixing circuit device includes a first mixer, a second mixer and a signal amplifying circuit serially connected to the first mixer; the first mixer includes an RF signal input terminal for receiving an RF signal, LO signal input terminals for sampling a first and second LO signals, a first mixed-signal output terminal for outputting a first mixed signal and a second mixed-signal output terminal for outputting a second mixed signal; the second mixer includes an input terminal connected to a capacitor, two mixed-signal output terminals respectively connected to the first and second mixed-signal output terminals of the first mixer, LO signal input terminals for inversely sampling the first and second LO signals. With the double-balance nature of the second mixer core, the noise at the LO signal input terminals of the first mixer can be cancelled. A receiver includes the signal mixing circuit device is also disclosed.

Abstract: A signal mixing circuit device and a receiver are disclosed, the signal mixing circuit device comprising first to fourth mixers, first and second signal amplifying circuits, a signal strength detector, a controller and an attenuator. A signal strength value for the output from the first signal amplifying circuit is detected using the signal strength detector. If the signal strength value is less than a first threshold, a high-gain path is initiated, so that noises respectively input to the first and second mixers together with local oscillator signals are eliminated by the fourth and third mixers respectively, thereby ensuring a high signal-to-noise ratio. If the signal strength value is greater than a second threshold, a low-gain path is initiated, which partially reuses the circuit of the high-gain path, thereby effectively reducing the overall circuit area and decreasing chip cost and power consumption.

Abstract: A signal mixing circuit device includes a first mixer, a second mixer and a signal amplifying circuit serially connected to the first mixer; the first mixer includes an RF signal input terminal for receiving an RF signal, LO signal input terminals for sampling a first and second LO signals, a first mixed-signal output terminal for outputting a first mixed signal and a second mixed-signal output terminal for outputting a second mixed signal; the second mixer includes an input terminal connected to a capacitor, two mixed-signal output terminals respectively connected to the first and second mixed-signal output terminals of the first mixer, LO signal input terminals for inversely sampling the first and second LO signals. With the double-balance nature of the second mixer core, the noise at the LO signal input terminals of the first mixer can be cancelled. A receiver includes the signal mixing circuit device is also disclosed.

Abstract: A signal amplifying circuit device comprises a mixer and a first and second amplifiers connected in series, where the mixer is configured to receive an RF signal and two LO signals with a preset phase difference therebetween and output a first and a second mixed signals, the first amplifier includes a first input terminal for receiving the first mixed signal, a second input terminal for receiving the second mixed signal, and a first and second output terminals, the second amplifier includes a first input terminal connected to the first output terminal of the first stage of amplifier at a first joint, a second input terminal connected to the second output terminal of the first stage of amplifier at a second joint, a first output terminal, and a second output terminal. A receiver including the signal amplifying circuit device is also disclosed.

Abstract: A system and method for frequency hopping precalibrates a subset of a plurality of channels, storing the channels' associated curves in a computer readable medium. Before hopping to a new channel, decision making circuitry can access the precalibrated curves. If the destination channel has an associated curve, then the system can use the values from that curve when hopping to a new channel. If the destination channel does not have an associated precalibrated curve, then the system can identify a closely situated channel with a precalibrated curve and use an offset value to settle at the destination channel. According to another aspect of the present invention, the offsets can be updated. According to a further aspect of the invention, the updated can be done dynamically.

Abstract: A differential ring oscillator includes a plurality of delay stages connected in a ring. At least one of the delay stages includes: a current source, arranged to generate a bias current according to a coarse tuning signal; a latching circuit arranged to generate a differential output signal to a next delay stage according to a differential input signal from a previous delay stage; a capacitive array arranged to provide a first capacitance according to a fine tuning signal; and a varactor device arranged to provide a second capacitance according to a controllable signal for locking an oscillating frequency of the differential ring oscillator to a target frequency. The coarse tuning signal and fine tuning signal are arranged for adjusting the oscillating frequency of the differential ring oscillator to, respectively, reach a predetermined frequency range including the target frequency and to approach the target frequency in the predetermined frequency range.

Abstract: A system and method for voltage controlled oscillator (VCO) biasing in low voltage circuits including low resistance elements that are especially susceptible to noise. In one embodiment, a poly resistor and triode resistor is used to cancel or offset the effects that temperature variations have on the circuit. The triode resistor is powered by a voltage source that uses a pair of diodes coupled to a constant transconductance (gm) circuit to generate a reduced noise voltage that is independent of the power supply noise. The size of the triode resistor and poly resistors can be varied.

Abstract: A signal generator includes: an adjusting circuit arranged to adjust a first amplitude of an oscillating signal to generate an adjusted oscillating signal; and a resistor ladder circuit arranged to receive the adjusted oscillating signal to generate a plurality of candidate output oscillating signals having a plurality of different amplitudes respectively and output an output oscillating signal selected from the candidate output oscillating signals.

Abstract: Wireless receiver for receiving a plurality of co-existing wireless signals respectively from different positioning systems, includes an analog frontend and an analog-to-digital converting unit. The analog frontend is arranged to convert bands of the co-existing wireless signals into a plurality of corresponding intermediate bands by a local frequency and to provide an intermediate signal including the intermediate bands. The analog-to-digital converting unit is coupled to the analog frontend, and is arranged to convert the intermediate signal to a digital signal, wherein an operation band of the analog-to-digital converting unit covers the plurality of intermediate bands.

Abstract: A system and method for frequency hopping precalibrates a subset of a plurality of channels, storing the channels' associated curves in a computer readable medium. Before hopping to a new channel, decision making circuitry can access the precalibrated curves. If the destination channel has an associated curve, then the system can use the values from that curve when hopping to a new channel. If the destination channel does not have an associated precalibrated curve, then the system can identify a closely situated channel with a precalibrated curve and use an offset value to settle at the destination channel. According to another aspect of the present invention, the offsets can be updated. According to a further aspect of the invention, the updated can be done dynamically.

Abstract: An amplifier receives an input signal with an input node, provides an output signal in response, and includes a main branch and an auxiliary branch. The auxiliary branch is coupled between the input node and a splitting node for input matching of the input node. The main branch, also coupled to the splitting node, has an output node of current mode, and is arranged to output the output signal at the output node. An associated receiver is also disclosed.

Abstract: A differential ring oscillator includes a plurality of delay stages connected in a ring. At least one of the delay stages includes: a current source, arranged to generate a bias current according to a coarse tuning signal; a latching circuit arranged to generate a differential output signal to a next delay stage according to a differential input signal from a previous delay stage; a capacitive array arranged to provide a first capacitance according to a fine tuning signal; and a varactor device arranged to provide a second capacitance according to a controllable signal for locking an oscillating frequency of the differential ring oscillator to a target frequency. The coarse tuning signal and fine tuning signal are arranged for adjusting the oscillating frequency of the differential ring oscillator to, respectively, reach a predetermined frequency range including the target frequency and to approach the target frequency in the predetermined frequency range.

Abstract: Circuits, methods, and apparatus that provide isolation between receive and transmit circuits in a wireless transceiver. One example provides switches that can be included on an integrated circuit with at least portions of a wireless transceiver. These switches vary the impedance of transmitter and receiver circuits between a termination impedance and a high impedance by inserting or removing components in parallel with matching networks. Signal losses are minimized since these switches are shunt connected to input and output paths on the wireless circuit and are not connected directly in either signal path.