Patents by Inventor Chun-Wei Lo
Chun-Wei Lo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220256571Abstract: A method and apparatus are disclosed from the perspective of a network. In one embodiment, the method includes the network transmitting a Semi-Persistent Scheduling (SPS) configuration to a User Equipment (UE) for configuring a second Physical Downlink Shared Channel (PDSCH). The method also includes the network transmitting a configuration to the UE for configuring a first monitoring occasion for a first Physical Downlink Control Channel (PDCCH) and a second monitoring occasion for a second PDCCH, wherein the second PDCCH is associated with the first PDCCH. The method further includes the network not allowing the first PDCCH and the second PDCCH to schedule the UE with a first PDSCH partially or fully overlapping with the second PDSCH in time domain, wherein a last symbol of a later monitoring occasion among the first and the second monitoring occasion ends less than a processing threshold before a starting symbol of the second PDSCH.Type: ApplicationFiled: January 25, 2022Publication date: August 11, 2022Inventors: Hsin-Yuan Lo, Chun-Wei Huang
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Publication number: 20210149337Abstract: An optical measurement system comprises a polarization beam splitter for dividing an incident beam into a reference beam and a measurement beam, a first beam splitter for reflecting the measurement beam to form a first reflected measurement beam, a spatial light modulator for modulating the first reflected measurement beam to form a modulated measurement beam, a condenser lens for focusing the modulated measurement beam to an object to form a penetrating measurement beam, an objective lens for converting the penetrating measurement beam into a parallel measurement beam, a mirror for reflecting the parallel measurement beam to form an object beam, a second beam splitter for reflecting the reference beam to a path coincident with that of the object beam, and a camera for receiving an interference signal generated by the reference beam and the object beam to generate an image of the object.Type: ApplicationFiled: September 22, 2020Publication date: May 20, 2021Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Hsiang-Chun WEI, Chung-Lun KUO, Chia-Hung CHO, Chun-Wei LO, Chih-Hsiang LIU
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Patent number: 10094774Abstract: A scattering measurement system is provided, including: a light source generator for generating a detection light beam with discontinuous multi-wavelengths, and generating a multi-order diffraction light beam with three-dimensional feature information when the detection light beam is incident on an object; a detector having a photosensitive array for receiving and converting the multi-order diffraction light beam into multi-order diffraction signals with the three-dimensional feature information; and a processing module for receiving the multi-order diffraction signals and comparing the multi-order diffraction signals with multi-order diffraction feature patterns in a database so as to analyze the three-dimensional feature information of the object.Type: GrantFiled: December 5, 2016Date of Patent: October 9, 2018Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chia-Liang Yeh, Yi-Chang Chen, Yi-Sha Ku, Chun-Wei Lo
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Patent number: 9752866Abstract: A measurement system is configured to measure a surface structure of a sample. The surface of the sample has a thin film and a via, the depth of the via is larger than the thickness of the thin film. The measurement system includes a light source, a first light splitter, a first aperture stop, a lens assembly, a second aperture stop, a spectrum analyzer and an analysis module. The first light splitter disposed in the light emitting direction of the light source. The first aperture stop disposed between the light source and the first light splitter. The lens assembly is disposed between the first light splitter and the sample. The second aperture stop is disposed between the lens assembly and the first light splitter. The spectrum analyzer is disposed to at a side of the first light splitter opposite to the sample.Type: GrantFiled: December 29, 2015Date of Patent: September 5, 2017Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Hsiang-Chun Wei, Yi-Sha Ku, Chia-Hung Cho, Chieh-Yu Wu, Chun-Wei Lo, Chih-Hsiang Liu
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Publication number: 20170146339Abstract: A measurement system is configured to measure a surface structure of a sample. The surface of the sample has a thin film and a via, the depth of the via is larger than the thickness of the thin film. The measurement system includes a light source, a first light splitter, a first aperture stop, a lens assembly, a second aperture stop, a spectrum analyzer and an analysis module. The first light splitter disposed in the light emitting direction of the light source. The first aperture stop disposed between the light source and the first light splitter. The lens assembly is disposed between the first light splitter and the sample. The second aperture stop is disposed between the lens assembly and the first light splitter. The spectrum analyzer is disposed to at a side of the first light splitter opposite to the sample.Type: ApplicationFiled: December 29, 2015Publication date: May 25, 2017Inventors: Hsiang-Chun WEI, Yi-Sha KU, Chia-Hung CHO, Chieh-Yu WU, Chun-Wei LO, Chih-Hsiang LIU
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Publication number: 20170082536Abstract: A scattering measurement system is provided, including: a light source generator for generating a detection light beam with discontinuous multi-wavelengths, and generating a multi-order diffraction light beam with three-dimensional feature information when the detection light beam is incident on an object; a detector having a photosensitive array for receiving and converting the multi-order diffraction light beam into multi-order diffraction signals with the three-dimensional feature information; and a processing module for receiving the multi-order diffraction signals and comparing the multi-order diffraction signals with multi-order diffraction feature patterns in a database so as to analyze the three-dimensional feature information of the object.Type: ApplicationFiled: December 5, 2016Publication date: March 23, 2017Inventors: Chia-Liang YEH, Yi-Chang CHEN, Yi-Sha KU, Chun-Wei LO
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Publication number: 20170045355Abstract: A scattering measurement system is provided, including: a light source generator for generating a detection light beam with multi-wavelengths, wherein the detection light beam is incident on an object so as to generate a plurality of multi-order diffraction light beams with three-dimensional feature information; a spatial filter for filtering out zero-order light beams from the plurality of multi-order diffraction light beams; and a detector having a photosensitive array for receiving the plurality of multi-order diffraction light beams filtered out by the spatial filter and converting the filtered plurality of multi-order diffraction light beams into multi-order diffraction signals with the three-dimensional feature information. As such, the three-dimensional structure of the object can be obtained by comparing the multi-order diffraction signals with a database.Type: ApplicationFiled: December 18, 2015Publication date: February 16, 2017Inventors: Yi-Chen HSIEH, Chia-Liang YEH, Chia-Hung CHO, Yi-Chang CHEN, Yi-Sha KU, Chun-Wei LO
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Patent number: 7555737Abstract: For accomplishing a circuit design, a first physical design is implemented according to a first netlist to obtain a first physical layout of a circuit. The first physical layout of the circuit is processed to obtain a first timing data. The first timing data is then inputted for timing verification of the first netlist. If the first netlist does not pass the verification, the first netlist is modified into a second netlist, while defining a modified portion of the netlist. Then, the modified portion of netlist is processed to obtain a second timing data, and the second timing data is used to overwrite a part of the first timing data. The first physical design is modified into a second physical design according to the second netlist only when the second netlist with the first timing data overwritten by the second timing data passes the timing verification, thereby improving time efficiency.Type: GrantFiled: November 29, 2006Date of Patent: June 30, 2009Assignee: Dorado Design Automation, Inc.Inventors: Hsien Ming Liu, Chien Jung Hsin, Jun Jyeh Hsiao, Sheng Chun Lee, Chun Wei Lo
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Publication number: 20070124712Abstract: For accomplishing a circuit design, a first physical design is implemented according to a first netlist to obtain a first physical layout of a circuit. The first physical layout of the circuit is processed to obtain a first timing data. The first timing data is then inputted for timing verification of the first netlist. If the first netlist does not pass the verification, the first netlist is modified into a second netlist, while defining a modified portion of the netlist. Then, the modified portion of netlist is processed to obtain a second timing data, and the second timing data is used to overwrite a part of the first timing data. The first physical design is modified into a second physical design according to the second netlist only when the second netlist with the first timing data overwritten by the second timing data passes the timing verification, thereby improving time efficiency.Type: ApplicationFiled: November 29, 2006Publication date: May 31, 2007Applicant: DORADO DESIGN AUTOMATION, INC.Inventors: Hsien Ming Liu, Chien Jung Hsin, Jun Jyeh Hsiao, Sheng Chun Lee, Chun Wei Lo
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Patent number: 7096441Abstract: A method is capable of generating a command file of a group of design rule check (DRC) rules or layout versus schematic (LVS) rules and layout parasitic extraction (LPE) rules that can be used by a layout verification tool to verify the layout and the parasitic characteristics of an integrated circuit. The method comprises choosing whether to generate a command file of DRC rules or a command file of LVS/LPE rules, selecting a process from a group of processes, setting a set of parameters, and extracting program codes from a plurality of modules according to the selected process and the set of parameters so as to generate a command file of DRC rules or LVS/LPE rules.Type: GrantFiled: May 11, 2004Date of Patent: August 22, 2006Assignee: Faraday Technology Corp.Inventors: Chun-Wei Lo, Szu-Sheng Kang, Chien-Yi Ku, Chien-Tsung Chen
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Publication number: 20050257183Abstract: A method is capable of generating a command file of a group of design rule check (DRC) rules or layout versus schematic (LVS) rules and layout parasitic extraction (LPE) rules that can be used by a layout verification tool to verify the layout and the parasitic characteristics of an integrated circuit. The method comprises choosing whether to generate a command file of DRC rules or a command file of LVS/LPE rules, selecting a process from a group of processes, setting a set of parameters, and extracting program codes from a plurality of modules according to the selected process and the set of parameters so as to generate a command file of DRC rules or LVS/LPE rules.Type: ApplicationFiled: May 11, 2004Publication date: November 17, 2005Inventors: Chun-Wei Lo, Szu-Sheng Kang, Chien-Yi Ku, Chien-Tsung Chen