Patents by Inventor Chyi-Shyuan Chern

Chyi-Shyuan Chern has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8404572
    Abstract: An apparatus includes a process chamber configured to perform an ion implantation process. A cooling platen or electrostatic chuck is provided within the process chamber. The cooling platen or electrostatic chuck is configured to support a semiconductor wafer. The cooling platen or electrostatic chuck has a plurality of temperature zones. Each temperature zone includes at least one fluid conduit within or adjacent to the cooling platen or electrostatic chuck. At least two coolant sources are provided, each fluidly coupled to a respective one of the fluid conduits and configured to supply a respectively different coolant to a respective one of the plurality of temperature zones during the ion implantation process. The coolant sources include respectively different chilling or refrigeration units.
    Type: Grant
    Filed: February 13, 2009
    Date of Patent: March 26, 2013
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Chun-Lin Chang, Hsin-Hsien Wu, Zin-Chang Wei, Chi-Ming Yang, Chyi-Shyuan Chern, Jun-Lin Yeh, Jih-Jse Lin, Jo-Fei Wang, Ming-Yu Fan, Jong-I Mou
  • Patent number: 8404561
    Abstract: The invention relates to integrated circuit fabrication, and more particularly to an electronic device with an isolation structure made having almost no void. An exemplary method for fabricating an isolation structure, comprising: providing a substrate; forming a trench in the substrate; partially filling the trench with a first silicon oxide; exposing a surface of the first silicon oxide to a vapor mixture comprising NH3 and a fluorine-containing compound; heating the substrate to a temperature between 100° C. to 200° C.; and filling the trench with a second silicon oxide, whereby the isolation structure made has almost no void.
    Type: Grant
    Filed: May 5, 2010
    Date of Patent: March 26, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tze-Liang Lee, Pei-Ren Jeng, Chu-Yun Fu, Chyi Shyuan Chern, Jui-Hei Huang, Chih-Tang Peng, Hao-Ming Lien
  • Patent number: 8349628
    Abstract: An embodiment of the disclosure includes a method of fabricating a plurality of light emitting diode devices. A plurality of LED dies is provided. The LED dies are bonded to a carrier substrate. A patterned mask layer comprising a plurality of openings is formed on the carrier substrate. Each one of the plurality of LED dies is exposed through one of the plurality of the openings respectively. Each of the plurality of openings is filled with a phosphor. The phosphor is cured. The phosphor and the patterned mask layer are polished to thin the phosphor covering each of the plurality of LED dies. The patterned mask layer is removed after polishing the phosphor.
    Type: Grant
    Filed: March 22, 2011
    Date of Patent: January 8, 2013
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Yung-Chang Chen, Hsin-Hsien Wu, Chyi Shyuan Chern, Ching-Wen Hsiao, Fu-Wen Liu, Kuang-Huan Hsu
  • Publication number: 20120305956
    Abstract: The present disclosure provides a method of patterning a phosphor layer on a light emitting diode (LED) emitter. The method includes providing at least one LED emitter disposed on a substrate; forming a polymer layer over the at least one LED emitter; providing a mask over the polymer layer and the at least one LED emitter; etching the polymer layer through the mask to expose the at least one LED emitter within a cavity having polymer layer walls; and coating the at least one LED emitter with phosphor.
    Type: Application
    Filed: June 1, 2011
    Publication date: December 6, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Fu-Wen Liu, Chyi Shyuan Chern, Hsin-Hsien Wu, Yung-Chang Chen, Ming Shing Lee, Tzu-Wen Shih, Hsin-Hung Chen
  • Publication number: 20120292629
    Abstract: A method includes providing an LED element including a substrate and a gallium nitride (GaN) layer disposed on the substrate. The GaN layer is treated. The treatment includes performing an ion implantation process on the GaN layer. The ion implantation process may provide a roughened surface region of the GaN layer. In an embodiment, the ion implantation process is performed at a temperature of less than approximately 25 degrees Celsius. In a further embodiment, the substrate is at a temperature less than approximately zero degrees Celsius during the ion implantation process.
    Type: Application
    Filed: May 20, 2011
    Publication date: November 22, 2012
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd., ("TSMC")
    Inventors: Hsin-Hsien Wu, Chyi Shyuan Chern, Chun-Lin Chang, Ching-Wen Hsiao, Kuang-Huan Hsu
  • Publication number: 20120286240
    Abstract: An LED array comprises a growth substrate and at least two separated LED dies grown over the growth substrate. Each of LED dies sequentially comprise a first conductive type doped layer, a multiple quantum well layer and a second conductive type doped layer. The LED array is bonded to a carrier substrate. Each of separated LED dies on the LED array is simultaneously bonded to the carrier substrate. The second conductive type doped layer of each of separated LED dies is proximate to the carrier substrate. The first conductive type doped layer of each of LED dies is exposed. A patterned isolation layer is formed over each of LED dies and the carrier substrate. Conductive interconnects are formed over the patterned isolation layer to electrically connect the at least separated LED dies and each of LED dies to the carrier substrate.
    Type: Application
    Filed: July 25, 2012
    Publication date: November 15, 2012
    Applicant: TSMC Solid State Lighting Ltd.
    Inventors: Chih-Kuang Yu, Chyi Shyuan Chern, Hsing-Kuo Hsia, Hung-Yi Kuo
  • Publication number: 20120264296
    Abstract: A method of forming a through-silicon-via (TSV) opening includes forming a TSV opening through a substrate. A recast of a material of the substrate on sidewalls of the TSV opening is removed with a first chemical. The sidewalls of the TSV opening are cleaned with a second chemical by substantially removing a residue of the first chemical.
    Type: Application
    Filed: April 14, 2011
    Publication date: October 18, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chyi Shyuan CHERN, Hsin-Hsien WU, Chun-Lin CHANG, Hsing-Kuo HSIA, Hung-Yi KUO
  • Publication number: 20120256187
    Abstract: The present disclosure provides one embodiment of a light-emitting structure. The light-emitting structure includes a carrier substrate having first metal features; a transparent substrate having second metal features; a plurality of light-emitting diodes (LEDs) bonded with the carrier substrate and the transparent substrate, sandwiched between the carrier substrate and the transparent substrate; and metal pillars bonded to the carrier substrate and the transparent substrate, each of the metal pillars being disposed between adjacent two of the plurality of LEDs, wherein the first metal features, the second metal features and the metal pillars are configured to electrically connect the plurality of LEDs.
    Type: Application
    Filed: April 7, 2011
    Publication date: October 11, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Kuang Yu, Chyi Shyuan Chern
  • Patent number: 8277286
    Abstract: A chemical mechanical polishing method and apparatus provides a deformable, telescoping slurry dispenser arm coupled to a dispenser head that may be arcuate in shape and may also be a bendable telescoping member that can be adjusted to vary the number of slurry dispenser ports and the degree of curvature of the dispenser head. The dispenser arm may additionally include slurry dispenser ports therein. The dispenser arm may advantageously be formed of a plurality of nested tubes that are slidable with respect to one another. The adjustable dispenser arm may pivot about a pivot point and can be variously positioned to accommodate different sized polishing pads used to polish substrates of different dimensions and the bendable, telescoping slurry dispenser arm and dispenser head provide uniform slurry distribution to any of various wafer polishing locations, effective slurry usage and uniform polishing profiles in each case.
    Type: Grant
    Filed: February 13, 2009
    Date of Patent: October 2, 2012
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kun-Ku Hung, Zin-Chang Wei, Huang Soon Kang, Chyi-Shyuan Chern
  • Publication number: 20120244652
    Abstract: An embodiment of the disclosure includes a method of fabricating a plurality of light emitting diode devices. A plurality of LED dies is provided. The LED dies are bonded to a carrier substrate. A patterned mask layer comprising a plurality of openings is formed on the carrier substrate. Each one of the plurality of LED dies is exposed through one of the plurality of the openings respectively. Each of the plurality of openings is filled with a phosphor. The phosphor is cured. The phosphor and the patterned mask layer are polished to thin the phosphor covering each of the plurality of LED dies. The patterned mask layer is removed after polishing the phosphor.
    Type: Application
    Filed: March 22, 2011
    Publication date: September 27, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yung-Chang CHEN, Hsin-Hsien WU, Chyi Shyuan CHERN, Ching-Wen HSIAO, Fu-Wen LIU, Kuang-Huan HSU
  • Publication number: 20120228650
    Abstract: The present disclosure provides one embodiment of a method for fabricating a light emitting diode (LED) package. The method includes forming a plurality of through silicon vias (TSVs) on a silicon substrate; depositing a dielectric layer over a first side and a second side of the silicon substrate and over sidewall surfaces of the TSVs; forming a metal layer patterned over the dielectric layer on the first side and the second side of the silicon substrate and further filling the TSVs; and forming a plurality of highly reflective bonding pads over the metal layer on the second side of the silicon substrate for LED bonding and wire bonding.
    Type: Application
    Filed: May 21, 2012
    Publication date: September 13, 2012
    Applicant: TSMC Solid State Lighting Ltd.
    Inventors: Chyi Shyuan Chern, Wen-Chien Fu, Hsing-Kuo Hsia, Chih-Kuang Yu, Ching-Hua Chiu, Hung-Yi Kuo
  • Publication number: 20120205694
    Abstract: The present disclosure provides one embodiment of a method for fabricating a light emitting diode (LED) package. The method includes forming a plurality of through silicon vias (TSVs) on a silicon substrate; depositing a dielectric layer over a first side and a second side of the silicon substrate and over sidewall surfaces of the TSVs; forming a metal layer patterned over the dielectric layer on the first side and the second side of the silicon substrate and further filling the TSVs; and forming a plurality of highly reflective bonding pads over the metal layer on the second side of the silicon substrate for LED bonding and wire bonding.
    Type: Application
    Filed: February 11, 2011
    Publication date: August 16, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chyi Shyuan Chern, Wen-Chien Fu, Hsing-Kuo Hsia, Chih-Kuang Yu, Ching-Hua Chiu, Hung-Yi Kuo
  • Patent number: 8241924
    Abstract: A method for implant uniformity is provided that includes determining a variation of critical dimensions (CD) of a semiconductor wafer, moving the semiconductor wafer in a two-dimensional mode during an implantation process, and controlling a velocity of the movement of the semiconductor wafer so that an implant dose to the semiconductor wafer is varied based on the variation of CD.
    Type: Grant
    Filed: February 27, 2009
    Date of Patent: August 14, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Nai-Han Cheng, Chyi Shyuan Chern
  • Patent number: 8241932
    Abstract: An LED array comprises a growth substrate and at least two separated LED dies grown over the growth substrate. Each of LED dies sequentially comprise a first conductive type doped layer, a multiple quantum well layer and a second conductive type doped layer. The LED array is bonded to a carrier substrate. Each of separated LED dies on the LED array is simultaneously bonded to the carrier substrate. The second conductive type doped layer of each of separated LED dies is proximate to the carrier substrate. The first conductive type doped layer of each of LED dies is exposed. A patterned isolation layer is formed over each of LED dies and the carrier substrate. Conductive interconnects are formed over the patterned isolation layer to electrically connect the at least separated LED dies and each of LED dies to the carrier substrate.
    Type: Grant
    Filed: March 17, 2011
    Date of Patent: August 14, 2012
    Assignee: TSMC Solid State Lighting Ltd.
    Inventors: Chih-Kuang Yu, Chyi Shyuan Chern, Hsing-Kuo Hsia, Hung-Yi Kuo
  • Patent number: 8237231
    Abstract: A semiconductor structure with a metal gate structure includes a first type field-effect transistor having a first gate including: a high k dielectric material on a substrate, a first metal layer on the high k dielectric material layer and having a first work function, and a first aluminum layer on the first metal layer. The first aluminum layer includes an interfacial layer including aluminum, nitrogen and oxygen. The device also includes a second type field-effect transistor having a second gate including: the high k dielectric material on the substrate, a second metal layer on the high k dielectric material layer and having a second work function different from the first work function, and a second aluminum layer on the second metal layer.
    Type: Grant
    Filed: December 16, 2011
    Date of Patent: August 7, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuo Bin Huang, Ssu-Yi Li, Ryan Chia-Jen Chen, Chi-Ming Yang, Chyi Shyuan Chern, Chin-Hsiang Lin
  • Patent number: 8188447
    Abstract: A method includes dividing a semiconductor wafer into a plurality of dies areas, generating a map of the semiconductor wafer, scanning each of the plurality of die areas of the semiconductor wafer with a laser, and adjusting a parameter of the laser during the scanning based on a value of the die areas identified by the map of the semiconductor wafer. The map characterizing the die areas based on a first measurement of each individual die area.
    Type: Grant
    Filed: January 26, 2009
    Date of Patent: May 29, 2012
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chung-Ru Yang, Chyi Shyuan Chern, Soon Kang Huang
  • Publication number: 20120119228
    Abstract: An apparatus includes a wafer with a number of openings therein. For each opening, an LED device is coupled to a conductive carrier and the wafer in a manner so that each of the coupled LED device and a portion of the conductive carrier at least partially fill the opening. A method of fabricating an LED device includes forming a number of openings in a wafer. The method also includes coupling light-emitting diode (LED) devices to conductive carriers. The LED devices with conductive carriers at least partially fill each of the openings.
    Type: Application
    Filed: November 12, 2010
    Publication date: May 17, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsing-Kuo Hsia, Chih-Kuang Yu, Hung-Yi Kuo, Chyi Shyuan Chern
  • Publication number: 20120104435
    Abstract: Two or more molded ellipsoid lenses are formed on a packaged LED die by injecting a glue material into a mold over the LED die and curing the glue material. After curing, the refractive index of the lens in contact with the LED die is greater than the refractive index of the lens not directly contacting the LED die. At least one phosphor material is incorporated into the glue material for at least one of the lenses not directly contacting the LED die. The lens directly contacting the LED die may also include one or more phosphor material. A high refractive index coating may be applied between the LED die and the lens.
    Type: Application
    Filed: October 27, 2010
    Publication date: May 3, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsiao-Wen LEE, Shang-Yu TSAI, Tien-Ming LIN, Chyi Shyuan CHERN, Hsin-Hsien WU, Fu-Wen LIU, Huai-En LAI, Yu-Sheng TANG
  • Publication number: 20120086075
    Abstract: A semiconductor structure with a metal gate structure includes a first type field-effect transistor having a first gate including: a high k dielectric material on a substrate, a first metal layer on the high k dielectric material layer and having a first work function, and a first aluminum layer on the first metal layer. The first aluminum layer includes an interfacial layer including aluminum, nitrogen and oxygen. The device also includes a second type field-effect transistor having a second gate including: the high k dielectric material on the substrate, a second metal layer on the high k dielectric material layer and having a second work function different from the first work function, and a second aluminum layer on the second metal layer.
    Type: Application
    Filed: December 16, 2011
    Publication date: April 12, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuo Bin HUANG, Ssu-Yi LI, Ryan Chia-Jen CHEN, Chi-Ming YANG, Chyi Shyuan CHERN, Chin-Hsiang LIN
  • Publication number: 20120064715
    Abstract: A method of depositing a metal film on a substrate with patterned features includes placing a substrate with patterned features into a photo-induced chemical vapor deposition (PI-CVD) process chamber. The method also includes depositing a metal film by PI-CVD to fill the patterned features from bottom up.
    Type: Application
    Filed: November 22, 2011
    Publication date: March 15, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Simon Su-Horng LIN, Chi-Ming YANG, Chyi Shyuan CHERN, Chin-Hsiang LIN