Abstract: Four-pole circuits for iterative modular use in integrated circuits fabricated with complementary MOS (C-MOS) technology or LOCMOS technology, having a high density of circuit elements and high speed obtained at low dissipation. Each of said four-pole circuit modules has two signal inputs, a control input and a signal output line. The four-pole circuit modules may be constructed from two series connected complementary MOS transistors or two series-connected p-MOS transistors. In the latter case the control input must be doubled to receive the control signal and its inverted value. The signal outut is then alternatively connected to one of the two signal inputs (logically or physically) by each of the two values of the control signal.

Abstract: An analog/digital converter implemented on an MIS structure having a gate electrode in the form of a resistance layer across which the potential gradient is applied. The analog signal supplied to the gate electrode and is converted into a shift of an inversion layer below the gate electrode. The digital signal is obtained by means of determining the number of surface regions which are present below the gate electrode and which can be electrically connected to the inversion layer.

Abstract: A threshold arrangement includes two complementary transistors whose channels are situated in series between two supply terminals. In order to obtain a substantially square-wave relationship between the output voltage on the common drain electrodes and the input voltage on the interconnected gate electrodes, a direct voltage source is included between the two gate electrodes, which source has a voltage which is preferable substantially equal to the supply voltage minus the sum of the threshold voltages of the two complementary transistors.

Abstract: An analog-digital converter supplying a digital output signal in natural or reflected binary code, having an input stage, n consecutive conversion stages comprising two parallel channels of identical structure, in each of which there are two current paths in accordance with the result of a comparison of currents effected in the preceding stage and an output stage to which the switched currents proceed. In the complete converter there are 2.sup.n current paths corresponding to 2.sup.n quantization levels. Conversion is effected by means of a number of stages as small as the number n of bits of the desired digital signal. This converter is simple, fast, asynchronous, has a lower power consumption and its symmetry provides excellent automatic temperature compensation.

Abstract: Four-pole circuit modules constructed in integrated injection logic (I.sup.2 L), each four-pole circuit having two signal inputs, a control input, and a signal output line. The signal output line is alternatively connected to one of the signal inputs by each of the two values of a bivalent control signal. This two-level logic can be used in multiplexers in which the four-pole circuits are successively arranged in two or more levels. A shift register composed of master-slave flipflops is obtained by connecting the signal output lines of a series of four-pole circuit modules to one of the signal input lines of the respective four-pole circuit modules and to a signal input line of the next four-pole circuit. Four-pole circuits can be arranged in a series with common control and different combinations of input signals in order to form an arithmetic member for one bit per input quantity.

Abstract: The invention relates to a semiconductor device in which a crossing connection is realized by using parts of a layer of refractory conductive material already present for masking as a part of a current conductor separated from a crossing conductor by an insulation layer. The mask of refractory material may also define the regions in which switching transistors are realized. The invention results in important advantages, in connection with density and crossing connections, in particular in I.sup.2 L-circuits.