Abstract: A single photon avalanche (SPAD) device configured to detect visible to infrared light includes a substrate and a trench coupled to the substrate. The trench has a lattice mismatch with the substrate and has a height equal to or greater than its width. The device further includes a substantially defect-free semiconductor region that includes photosensitive material. The semiconductor region includes a well coupled to the trench and doped a first type. The well is configured to detect a photon and generate a current. The semiconductor region also includes a region formed in the well and doped a second type opposite to the first type. The well is configured to cause an avalanche multiplication of the current. The trench and the well form a first electrode and the region forms a second electrode.

Abstract: An image sensor array includes a substrate and a plurality of pixels. Each pixel includes a single photon avalanche detector (SPAD), a quench device coupled to a respective SPAD and configured to quench an avalanche current, and time measurement circuitry configured to measure a time-of-flight of a photon. The SPAD has a trench coupled to the substrate and having a lattice mismatch with the substrate, and a substantially defect-free region coupled to the trench and configured to generate the avalanche current when the photon is detected in the defect-free region, wherein the trench and the defect-free region form an electrode. An imaging system includes an infrared laser configured to provide a pulse of light, and the image sensor array configured to receive the pulse from the infrared laser.

Abstract: In accordance with the invention, an improved image sensor comprises an array of germanium photosensitive elements integrated with a silicon substrate and integrated with silicon readout circuits. The silicon transistors are formed first on a silicon substrate, using well known silicon wafer fabrication techniques. The germanium elements are subsequently formed overlying the silicon by epitaxial growth. The germanium elements are advantageously grown within surface openings of a dielectric cladding. Wafer fabrication techniques are applied to the elements to form isolated germanium photodiodes. Since temperatures needed for germanium processing are lower than those for silicon processing, the formation of the germanium devices need not affect the previously formed silicon devices. Insulating and metallic layers are then deposited and patterned to interconnect the silicon devices and to connect the germanium devices to the silicon circuits.

Abstract: In accordance with the invention, a photonic device comprises a semiconductor substrate including at least one circuit component comprising a metal silicide layer and an overlying layer including at least one photoresponsive component. The metal silicide layer is disposed between the circuit component and the photoresponsive component to prevent entry into the circuit component of light that penetrates the photoresponsive component. The silicide layer advantageously reflects the light back into the photoresponsive element. In addition, the overlying layer can include one or more reflective layers to reduce entry of oblique light into the photoresponsive component. In an advantageous embodiment, the substrate comprises single-crystal silicon including one or more insulated gate field effect transistors (IGFETs), and/or capacitors, and the photoresponsive element comprises germanium and/or germanium alloy epitaxially grown from seeds on the silicon.

Abstract: A high-speed optical communications cell is integrated at the interior of a two-dimensional imaging array. The combined receiver and imager carries out both photodetection (converting photons to electrons) and circuit functions (e.g. amplifying and integrating the signals from the photodetectors). The high-speed receiver cell comprises a photodetector and a high-speed amplification circuit, providing an electrical output which can follow a rapidly varying optical signal falling on the photodetector. The imaging array comprises an array of photodetectors and readout circuits, providing an electrical representation of the variation of light with position across the receiver surface. The presence of an imaging array surrounding the communications receiver, and in the same plane as it, allows a single optical path to be used for source acquisition and tracking as well as for data reception.

Abstract: In accordance with the invention, an improved image sensor comprises an array of germanium photosensitive elements integrated with a silicon substrate and integrated with silicon readout circuits. The silicon transistors are formed first on a silicon substrate, using well known silicon wafer fabrication techniques. The germanium elements are subsequently formed overlying the silicon by epitaxial growth. The germanium elements are advantageously grown within surface openings of a dielectric cladding. Wafer fabrication techniques are applied to the elements to form isolated germanium photodiodes. Since temperatures needed for germanium processing are lower than those for silicon processing, the formation of the germanium devices need not affect the previously formed silicon devices. Insulating and metallic layers are then deposited and patterned to interconnect the silicon devices and to connect the germanium devices to the silicon circuits.

Abstract: In accordance with the invention, an improved image sensor comprises an array of germanium photosensitive elements integrated with a silicon substrate and integrated with silicon readout circuits. The silicon transistors are formed first on a silicon substrate, using well known silicon wafer fabrication techniques. The germanium elements are subsequently formed overlying the silicon by epitaxial growth. The germanium elements are advantageously grown within surface openings of a dielectric cladding. Wafer fabrication techniques are applied to the elements to form isolated germanium photodiodes. Since temperatures needed for germanium processing are lower than those for silicon processing, the formation of the germanium devices need not affect the previously formed silicon devices. Insulating and metallic layers are then deposited and patterned to interconnect the silicon devices and to connect the germanium devices to the silicon circuits.

Abstract: A method of making a semiconductor device having a predetermined epitaxial region, such as an active region, with reduced defect density includes the steps of: (a) forming a dielectric cladding region on a major surface of a single crystal body of a first material; (b) forming a first opening that extends to a first depth into the cladding region; (c) forming a smaller second opening, within the first opening, that extends to a second depth greater than the first depth and that exposes an underlying portion of the major surface of the single crystal body; (d) epitaxially growing regions of a second semiconductor material in each of the openings and on the top of the cladding region; (e) controlling the dimensions of the second opening so that defects are confined to the epitaxial regions grown within the second opening and on top of the cladding region, a first predetermined region being located within the first opening and being essentially free of defects; (f) planarizing the top of the device to remove all

Abstract: A method of making a semiconductor device having a predetermined epitaxial region, such as an active region, with reduced defect density includes the steps of: (a) forming a dielectric cladding region on a major surface of a single crystal body of a first material; (b) forming a first opening that extends to a first depth into the cladding region; (c) forming a smaller second opening, within the first opening, that extends to a second depth greater than the first depth and that exposes an underlying portion of the major surface of the single crystal body; (d) epitaxially growing regions of a second semiconductor material in each of the openings and on the top of the cladding region; (e) controlling the dimensions of the second opening so that defects are confined to the epitaxial regions grown within the second opening and on top of the cladding region, a first predetermined region being located within the first opening and being essentially free of defects; (D planarizing the top of the device to remove all

Abstract: A method of making a semiconductor device having a predetermined epitaxial region, such as an active region, with reduced defect density includes the steps of: (a) forming a dielectric cladding region on a major surface of a single crystal body of a first material; (b) forming a first opening that extends to a first depth into the cladding region; (c) forming a smaller second opening, within the first opening, that extends to a second depth greater than the first depth and that exposes an underlying portion of the major surface of the single crystal body; (d) epitaxially growing regions of a second semiconductor material in each of the openings and on the top of the cladding region; (e) controlling the dimensions of the second opening so that defects are confined to the epitaxial regions grown within the second opening and on top of the cladding region, a first predetermined region being located within the first opening and being essentially free of defects; (D planarizing the top of the device to remove all

Abstract: A heterojunction bipolar transistor includes an emitter or collector region of doped silicon, a base region including silicon-germanium, and a spacer. The emitter or collector region form a heterojunction with the base region. The spacer is positioned to electrically insulate the emitter or collector region from an external region. The spacer includes a silicon dioxide layer physically interposed between the emitter or collector region and the remainder of the spacer.

Abstract: A heterojunction bipolar transistor includes an emitter or collector region of doped silicon, a base region including silicon-germanium, and a spacer. The emitter or collector region form a heterojunction with the base region. The spacer is positioned to electrically insulate the emitter or collector region from an external region. The spacer includes a silicon dioxide layer physically interposed between the emitter or collector region and the remainder of the spacer.

Abstract: A process for device fabrication in which amorphous silicon is deposited into a narrow gap is disclosed. The gap is an opening between two layers of material. The gap results when a window is formed in one of the two layers and a portion of a third layer at the base of the window is removed. In the formation of a bipolar device, a layer of oxide is formed on a silicon substrate and a layer of silicon is formed on the oxide layer which serves as the extrinsic base for the device. In the bipolar device, a window is formed in the polysilicon and the oxide layer at the base of the window is then removed. In the bipolar device, the silicon substrate underlies the gap and the extrinsic base silicon overlies the gap. When the oxide is removed from the base of the window, a portion of the oxide layer underlying the extrinsic base silicon is removed as well, thereby forming a gap between the extrinsic base silicon and the underlying silicon substrate.

Abstract: A heterojunction bipolar transistor in an integrated circuit has intrinsic and extrinsic base portions. The intrinsic base portion substantially comprises epitaxial silicon-germanium alloy. The extrinsic base portion substantially comprises polycrystalline material, and contains a distribution of ion-implanted impurities. An emitter overlies the intrinsic base portion, and a spacer at least partially overlies the emitter. The spacer overhangs the extrinsic base portion by at least a distance characteristic of lateral straggle of the ion-implanted impurities.

Abstract: A device with at least one noise-sensitive element, at least one noise-generating element, and a porous silicon barrier in the substrate is disclosed. The porous silicon barrier isolates the noise-sensitive element from the signals coupled into the substrate by the noise-generating element. A process for making this device is also disclosed.