Patents by Inventor Colin Burgess
Colin Burgess has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20160356406Abstract: A fluid coupler for hydronic solar panels, framed with a rigid frame that, when engaged includes a male coupling rigidly attached to a first manifold pipe. The male coupling has a sealing face perpendicular to a longitudinal axis of the first manifold pipe. The coupler includes a female coupling rigidly attached to a second manifold pipe. The female coupling has a sealing face perpendicular to a longitudinal axis of the second manifold pipe and includes a coupling nut longitudinally constrained along and freely rotatable around the axis of the second manifold pipe.Type: ApplicationFiled: June 8, 2015Publication date: December 8, 2016Inventors: Colin BURGESS, Jacob BARRETT, Michael Charles TOMLIN
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Patent number: 9424093Abstract: A system includes a processor and memory storage units storing software code. The software code comprises code for a scheduling system and for generating a plurality of adaptive partitions that are each associated with one or more process threads and that each have a corresponding processor budget. The code also is executable to, when the system is under a normal load, allocate the processor to one of the threads that is in a ready state and has the highest priority among the process threads that are in a ready state. The code is also executable to, when the system is in overload, allocate the processor to one of the process threads that is in a ready state and has the highest priority among the process threads that are in a ready state and for which the adaptive partition that the process thread is associated with has available guaranteed processor budget.Type: GrantFiled: April 29, 2013Date of Patent: August 23, 2016Assignee: 2236008 Ontario Inc.Inventors: Dan Dodge, Attila Danko, Sebastien Marineau-Mes, Peter van der Veen, Colin Burgess, Thomas Fletcher, Brian Stecher
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Publication number: 20160179575Abstract: An adaptive partition scheduler is a priority-based scheduler that also provides execution time guarantees (fair-share). Execution time guarantees apply to threads or groups of threads when the system is overloaded. When the system is not overloaded, threads are scheduled based strictly on priority, maintaining strict real-time behavior. When the system is overloaded, threads are scheduled based priority of threads that are in a ready state and based on the available guaranteed processor time budget of the adaptive partition associated with each thread.Type: ApplicationFiled: February 25, 2013Publication date: June 23, 2016Inventors: Dan Dodge, Attila Danko, Sebastien Marineau-Mes, Peter van der Veen, Colin Burgess, Thomas Fletcher, Brian Stecher
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Patent number: 9361156Abstract: An adaptive partition scheduler is a priority-based scheduler that also provides execution time guarantees (fair-share). Execution time guarantees apply to threads or groups of threads when the system is overloaded. When the system is not overloaded, threads are scheduled based strictly on priority, maintaining strict real-time behavior. When the system is overloaded, threads are scheduled based priority of threads that are in a ready state and based on the available guaranteed processor time budget of the adaptive partition associated with each thread.Type: GrantFiled: February 25, 2013Date of Patent: June 7, 2016Assignee: 2236008 ONTARIO INC.Inventors: Dan Dodge, Attila Danko, Sebastien Marineau-Mes, Peter van der Veen, Colin Burgess, Thomas Fletcher, Brian Stecher
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Publication number: 20140245311Abstract: An adaptive partition scheduler is a priority-based scheduler that also provides execution time guarantees (fair-share). Execution time guarantees apply to threads or groups of threads when the system is overloaded. When the system is not overloaded, threads are scheduled based strictly on priority, maintaining strict real-time behavior. When the system is overloaded, threads are scheduled based priority of threads that are in a ready state and based on the available guaranteed processor time budget of the adaptive partition associated with each thread.Type: ApplicationFiled: February 25, 2013Publication date: August 28, 2014Applicant: QNX SOFTWARE SYSTEMS LIMITEDInventors: Dan Dodge, Attila Danko, Sebastien Marineau-Mes, Peter van der Veen, Colin Burgess, Thomas Fletcher, Brian Stecher
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Patent number: 8595733Abstract: A system includes a processor, one or more memory storage units, and software code stored in the one or more memory storage units. The software code is executable by the processor to generate a plurality of adaptive partitions that are each associated with one or more process threads. The software code further includes a scheduling system that is executable by the processor for selectively allocating the processor to run the process threads based on a comparison between ordering function values for each adaptive partition. The ordering function value for each adaptive partition is calculated using one or more weighted variables for each adaptive partition. The variables include, for example, 1) the process budget, such as a guaranteed time budget, of the adaptive partition, 2) the critical budget, if any, of the adaptive partition, 3) the rate at which the process threads of an adaptive partition consume processor time.Type: GrantFiled: December 23, 2010Date of Patent: November 26, 2013Assignee: QNX Software Systems LimitedInventors: Dan Dodge, Attilla Danko, Sebastien Marineau-Mes, Peter van der Veen, Colin Burgess, Thomas Fletcher, Brian Stecher
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Patent number: 8544013Abstract: A system is set forth that includes a processor, one or more memory storage units, and software code stored in the one or more memory storage units. The software code is executable by the processor to generate a plurality of adaptive partitions that are each associated with one or more process threads. Each of the plurality of adaptive partitions has a corresponding processor budget that is assigned to it. The process threads include a mutex holding thread and a mutex waiting thread. The mutex holding thread is associated with a first adaptive partition and may gain exclusive access to a mutex object. The mutex waiting thread is associated with a second adaptive partition and must wait for access to the mutex object while the mutex object is held by the mutex holding thread. The software code further includes a scheduling system that selectively allocates the processor to run the process threads based, at least in part, on the processor budget of the associated adaptive partitions.Type: GrantFiled: March 8, 2006Date of Patent: September 24, 2013Assignee: QNX Software Systems LimitedInventors: Dan Dodge, Attilla Danko, Sebastien Marineau-Mes, Peter van der Veen, Colin Burgess, Thomas Fletcher, Brian Stecher
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Publication number: 20130247066Abstract: A system includes a processor and memory storage units storing software code. The software code comprises code for a scheduling system and for generating a plurality of adaptive partitions that are each associated with one or more process threads and that each have a corresponding processor budget. The code also is executable to, when the system is under a normal load, allocate the processor to one of the threads that is in a ready state and has the highest priority among the process threads that are in a ready state. The code is also executable to, when the system is in overload, allocate the processor to one of the process threads that is in a ready state and has the highest priority among the process threads that are in a ready state and for which the adaptive partition that the process thread is associated with has available guaranteed processor budget.Type: ApplicationFiled: April 29, 2013Publication date: September 19, 2013Applicant: QNX SOFTWARE SYSTEMS LIMITEDInventors: Dan Dodge, Attila Danko, Sebastien Marineau-Mes, Peter van der Veen, Colin Burgess, Thomas Fletcher, Brian Stecher
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Patent number: 8497842Abstract: A system includes a touchscreen display and an interface application. The interface application controls the touchscreen display to provide a container and a user interface control. The user interface control may be selected through manipulation of the touchscreen display in an area of the container proximate the user interface control. The user interface application identifies a user manipulation as a mouse movement in response to manipulation of the touchscreen display in an area of the container when the manipulation has a motion magnitude exceeding a threshold value.Type: GrantFiled: February 28, 2008Date of Patent: July 30, 2013Assignee: QNX Software Systems LimitedInventors: Steve Tomkins, Dan Dodge, Peter Van Der Veen, Xiaodan Tang, Colin Burgess
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Patent number: 8434086Abstract: A system is set forth comprising a processor and memory storage units storing software code. The software code comprises code for a scheduling system and for generating a plurality of adaptive partitions that are each associated with one or more software threads and that each have a corresponding processor budget. The code also is executable to generate at least one sending thread and at least one receiving thread which responds to communications from the sending thread to execute one or more tasks corresponding to the communications. In operation, the scheduling system selectively allocates the processor to each sending and receiving thread based on the processor budget of the adaptive partition associated with the respective thread. The scheduling system bills the processor budget of the adaptive partition associated with the sending thread for processor allocation used by the receiving thread to respond to communications sent by the sending thread.Type: GrantFiled: December 22, 2005Date of Patent: April 30, 2013Assignee: QNX Software Systems LimitedInventors: Dan Dodge, Attilla Danko, Sebastien Marineau-Mes, Peter Van Der Veen, Colin Burgess, Thomas Fletcher, Brian Stecher
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Patent number: 8387052Abstract: An adaptive partition scheduler is a priority-based scheduler that also provides execution time guarantees (fair-share). Execution time guarantees apply to threads or groups of threads when the system is overloaded. When the system is not overloaded, threads are scheduled based strictly on priority, maintaining strict real-time behavior. Even when overloaded, the scheduler provides real-time guarantees to a set of critical threads, as specified by the system architect.Type: GrantFiled: August 31, 2005Date of Patent: February 26, 2013Assignee: QNX Software Systems LimitedInventors: Dan Dodge, Attila Danko, Sebastien Marineau-Mes, Peter Van Der Veen, Colin Burgess, Thomas Fletcher, Brian Stecher
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Patent number: 8330774Abstract: A system compositing images from different applications includes a movie clip based application, an image application, and a compositing application that is in communication with the movie clip based application and the image application. The movie clip based application defines one or more movie clip images for display. The image application provides one or more images for display with the one or more movie clip images. The compositing application operates to composite the one or more movie clip images with the one or more images of the image application for viewing on a display.Type: GrantFiled: October 29, 2008Date of Patent: December 11, 2012Assignee: QNX Software Systems LimitedInventors: Garry Turcotte, David Donohoe, Dan Dodge, Peter van der Veen, Steve Tomkins, Xiaodan Tang, Colin Burgess
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Publication number: 20110107342Abstract: A system is set forth that includes a processor, one or more memory storage units, and software code stored in the one or more memory storage units. The software code is executable by the processor to generate a plurality of adaptive partitions that are each associated with one or more process threads. Each of the plurality, of adaptive partitions has one or more corresponding scheduling attributes that are assigned to it. The software code further includes a scheduling system that is executable by the processor for selectively allocating the processor to run the process threads based on a comparison between ordering function values for each adaptive partition. The ordering function value for each adaptive partition is calculated using one or more of the scheduling attributes of the corresponding adaptive partition.Type: ApplicationFiled: December 23, 2010Publication date: May 5, 2011Applicant: QNX Software Systems GmbH & Co. KGInventors: Dan Dodge, Attilla Danko, Sebastien Marineau-Mes, Peter van der Veen, Colin Burgess, Thomas Fletcher, Brian Stecher
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Patent number: 7870554Abstract: A system includes a processor, one or more memory storage units, and software code stored in the memory storage units. The software code is executable by the processor to generate a plurality of adaptive partitions that are each associated with one or more process threads. Each of adaptive partition has one or more corresponding assigned scheduling attributes. The software code includes a scheduling system for selectively allocating the processor to run process threads based on a comparison between ordering function values for each adaptive partition. Ordering function values are calculated based on scheduling attributes of the corresponding adaptive partition. A critical ordering function value also may be calculated and used to determine the proper manner of billing an associated adaptive partition for the processor allocation used to run its associated critical threads. Methods of implementing various aspects of such a system are also set forth.Type: GrantFiled: March 8, 2006Date of Patent: January 11, 2011Assignee: QNX Software Systems GmbH & Co. KGInventors: Dan Dodge, Attilla Danko, Sebastien Marineau-Mes, Peter van der Veen, Colin Burgess, Thomas Fletcher, Brian Stecher
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Patent number: 7840966Abstract: A system is set forth that includes a processor, one or more memory storage units, and software code stored in the one or more memory storage units. The software code is executable by the processor to generate a plurality of adaptive partitions that are each associated with one or more process threads. Each of the plurality of adaptive partitions has a corresponding processor time budget. One or more of the process threads are designated as critical threads. Each adaptive partition associated with a critical thread is assigned a corresponding critical time budget. The software code also includes a scheduling system that is executable by the processor for selectively allocating the processor to run the process threads based, at least in part, on the processor time budgets of the respective adaptive partitions.Type: GrantFiled: March 8, 2006Date of Patent: November 23, 2010Assignee: QNX Software Systems GmbH & Co. KGInventors: Dan Dodge, Attilla Danko, Sebastien Marineau-Mes, Peter van der Veen, Colin Burgess, Thomas Fletcher, Brian Stecher
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Patent number: 7624260Abstract: A processing system is set forth that includes a processor, read only memory storing an operating system image file accessible by the processor, and random access memory that is also accessible by the processor. The processing system also includes a boot program that is executable by the processor to initialize the processing system in response, for example, to a power-on event, reset event, or a wake-up event. A power-on event occurs when power is initially provided to the processing system while a wake-up event occurs when the processing system is to exit a low-power mode of operation. A reset event occurs when, for example, a fault is detected that causes the system to restart. The boot program selectively performs a full boot copy of the operating system image file from the read only memory to the random access memory or a fast boot copy of only predetermined portions of the operating system image file from the read only memory to the random access memory.Type: GrantFiled: May 4, 2006Date of Patent: November 24, 2009Assignee: QNX Software Systems GmbH & Co. KGInventors: Sheridan Ethier, Randy Martin, Colin Burgess, Brian Stecher
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Patent number: 7590839Abstract: A fast booting system decreases the boot time of a computer system, and allows the fast launching of applications on a subsequent reboot. The fast booting system stores data associated with fast boot applications in a non-volatile memory. On a subsequent reboot, the fast booting system reads the data and launches the fast boot applications to decrease boot time.Type: GrantFiled: March 21, 2006Date of Patent: September 15, 2009Assignee: QNX Software Systems GmbH & Co. KGInventors: Peter van der Veen, Colin Burgess
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Publication number: 20090195556Abstract: A system compositing images from different applications includes a movie clip based application, an image application, and a compositing application that is in communication with the movie clip based application and the image application. The movie clip based application defines one or more movie clip images for display. The image application provides one or more images for display with the one or more movie clip images. The compositing application operates to composite the one or more movie clip images with the one or more images of the image application for viewing on a display.Type: ApplicationFiled: October 29, 2008Publication date: August 6, 2009Inventors: Garry Turcotte, David Donohoe, Dan Dodge, Peter van der Veen, Steve Tomkins, Xiaodan Tang, Colin Burgess
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Publication number: 20090115736Abstract: A system includes a touchscreen display and an interface application. The interface application controls the touchscreen display to provide a container and a user interface control. The user interface control may be selected through manipulation of the touchscreen display in an area of the container proximate the user interface control. The user interface application identifies a user manipulation as a mouse movement in response to manipulation of the touchscreen display in an area of the container when the manipulation has a motion magnitude exceeding a threshold value.Type: ApplicationFiled: February 28, 2008Publication date: May 7, 2009Inventors: Steve Tomkins, Dan Dodge, Peter van der Veen, Xiaodan Tang, Colin Burgess
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Publication number: 20070260867Abstract: A processing system is set forth that includes a processor, read only memory storing an operating system image file accessible by the processor, and random access memory that is also accessible by the processor. The processing system also includes a boot program that is executable by the processor to initialize the processing system in response, for example, to a power-on event, reset event, or a wake-up event. A power-on event occurs when power is initially provided to the processing system while a wake-up event occurs when the processing system is to exit a low-power mode of operation. A reset event occurs when, for example, a fault is detected that causes the system to restart. The boot program selectively performs a full boot copy of the operating system image file from the read only memory to the random access memory or a fast boot copy of only predetermined portions of the operating system image file from the read only memory to the random access memory.Type: ApplicationFiled: May 4, 2006Publication date: November 8, 2007Inventors: Sheridan Ethier, Randy Martin, Colin Burgess, Brian Stecher