Abstract: Various embodiments provide a vertical-conduction semiconductor device that includes: a silicon substrate having a front face and a rear face; a front-side structure arranged on the front face of the substrate, having at least one current-conduction region at the front face; and a back side metal structure, arranged on the rear face of the substrate, in electrical contact with the substrate and constituted by a stack of metal layers. The back side metal structure is formed by: a first metal layer; a silicide region, interposed between the rear face of the substrate and the first metal layer and in electrical contact with the aforesaid rear face; and a second metal layer arranged on the first metal layer.

Abstract: A process for manufacturing a strained semiconductor device envisages: providing a die of semiconductor material, in which elementary components of the semiconductor device have been integrated by means of initial front-end steps; and coupling, using the die-attach technique, the die to a support, at a coupling temperature. The aforesaid coupling step envisages selecting the value of the coupling temperature at a value higher than an operating temperature of use of the semiconductor device, and moreover selecting the material of the support so that it is different from the material of the die in order to determine, at the operating temperature, a coupling stress that is a function of the different values of the coefficients of thermal expansion of the materials of the die and of the support and of the temperature difference between the coupling temperature and the operating temperature.

Abstract: A method for soldering a die obtained using the semiconductor technique with a leadframe, comprising the steps of providing a leadframe, which has at least one surface made at least partially of copper; providing a die, which has at least one surface coated with a metal layer; applying to the surface a solder alloy comprising at least 40 wt % of tin or at least 50% of indium or at least 50% of gallium, without lead, and heating the alloy to a temperature of at least 380° C. to form a drop of solder alloy; providing a die, which has at least one surface coated with a metal layer; and setting the metal layer in contact with the drop of solder alloy to form the soldered connection with the leadframe. Moreover, a device obtained with said method is provided.

Abstract: A method for soldering a die obtained using the semiconductor technique with a leadframe, comprising the steps of providing a leadframe, which has at least one surface made at least partially of copper; providing a die, which has at least one surface coated with a metal layer; applying to the surface a solder alloy comprising at least 40 wt % of tin or at least 50% of indium or at least 50% of gallium, without lead, and heating the alloy to a temperature of at least 380° C. to form a drop of solder alloy; providing a die, which has at least one surface coated with a metal layer; and setting the metal layer in contact with the drop of solder alloy to form the soldered connection with the leadframe. Moreover, a device obtained with said method is provided.

Abstract: A method for soldering a die obtained using the semiconductor technique with a leadframe, comprising the steps of providing a leadframe, which has at least one surface made at least partially of copper; providing a die, which has at least one surface coated with a metal layer; applying to the surface a solder alloy comprising at least 40 wt % of tin or at least 50% of indium or at least 50% of gallium, without lead, and heating the alloy to a temperature of at least 380° C. to form a drop of solder alloy; providing a die, which has at least one surface coated with a metal layer; and setting the metal layer in contact with the drop of solder alloy to form the soldered connection with the leadframe. Moreover, a device obtained with said method is provided.

Abstract: Various embodiments provide a vertical-conduction semiconductor device that includes: a silicon substrate having a front face and a rear face; a front-side structure arranged on the front face of the substrate, having at least one current-conduction region at the front face; and a back side metal structure, arranged on the rear face of the substrate, in electrical contact with the substrate and constituted by a stack of metal layers. The back side metal structure is formed by: a first metal layer; a silicide region, interposed between the rear face of the substrate and the first metal layer and in electrical contact with the aforesaid rear face; and a second metal layer arranged on the first metal layer.

Abstract: A process for manufacturing a strained semiconductor device envisages: providing a die of semiconductor material, in which elementary components of the semiconductor device have been integrated by means of initial front-end steps; and coupling, using the die-attach technique, the die to a support, at a coupling temperature. The aforesaid coupling step envisages selecting the value of the coupling temperature at a value higher than an operating temperature of use of the semiconductor device, and moreover selecting the material of the support so that it is different from the material of the die in order to determine, at the operating temperature, a coupling stress that is a function of the different values of the coefficients of thermal expansion of the materials of the die and of the support and of the temperature difference between the coupling temperature and the operating temperature.

Abstract: A process for manufacturing a strained semiconductor device envisages: providing a die of semiconductor material, in which elementary components of the semiconductor device have been integrated by means of initial front-end steps; and coupling, using the die-attach technique, the die to a support, at a coupling temperature. The aforesaid coupling step envisages selecting the value of the coupling temperature at a value higher than an operating temperature of use of the semiconductor device, and moreover selecting the material of the support so that it is different from the material of the die in order to determine, at the operating temperature, a coupling stress that is a function of the different values of the coefficients of thermal expansion of the materials of the die and of the support and of the temperature difference between the coupling temperature and the operating temperature.

Abstract: A method for soldering a die obtained using the semiconductor technique with a leadframe, comprising the steps of providing a leadframe, which has at least one surface made at least partially of copper; providing a die, which has at least one surface coated with a metal layer; applying to the surface a solder alloy comprising at least 40 wt % of tin or at least 50% of indium or at least 50% of gallium, without lead, and heating the alloy to a temperature of at least 380° C. to form a drop of solder alloy; providing a die, which has at least one surface coated with a metal layer; and setting the metal layer in contact with the drop of solder alloy to form the soldered connection with the leadframe. Moreover, a device obtained with said method is provided.

Abstract: A process for manufacturing a strained semiconductor device envisages: providing a die of semiconductor material, in which elementary components of the semiconductor device have been integrated by means of initial front-end steps; and coupling, using the die-attach technique, the die to a support, at a coupling temperature. The aforesaid coupling step envisages selecting the value of the coupling temperature at a value higher than an operating temperature of use of the semiconductor device, and moreover selecting the material of the support so that it is different from the material of the die in order to determine, at the operating temperature, a coupling stress that is a function of the different values of the coefficients of thermal expansion of the materials of the die and of the support and of the temperature difference between the coupling temperature and the operating temperature.

Abstract: A microfluidic device (1000-1005), comprising: a semiconductor body (2) having a first side (2a) and a second side (2b) opposite to one another, and housing, at the first side, a plurality of wells (4), having a first depth; an inlet region (30) forming an entrance point for a fluid to be supplied to the wells; a main channel (6a) fluidically connected to the inlet region, and having a second depth; and a plurality of secondary channels (6b) fluidically connecting the main channel to a respective well, and having a third depth. The first depth is higher than the second depth, which in turn is higher than the third depth.

Abstract: An embodiment of a die comprising: a semiconductor body including a front side, a back side, and a lateral surface; an electronic device, formed in said semiconductor body and including an active area facing the front side; a vertical conductive connection, extending through the semiconductor body and defining a conductive path between the front side and the back side of the semiconductor body; and a conductive contact, defining a conductive path on the front side of the semiconductor body, between the active area and the vertical conductive connection, wherein the vertical conductive connection is formed on the lateral surface of the die, outside the active area.

Abstract: An embodiment of a die comprising: a semiconductor body including a front side, a back side, and a lateral surface; an electronic device, formed in said semiconductor body and including an active area facing the front side; a vertical conductive connection, extending through the semiconductor body and defining a conductive path between the front side and the back side of the semiconductor body; and a conductive contact, defining a conductive path on the front side of the semiconductor body, between the active area and the vertical conductive connection, wherein the vertical conductive connection is formed on the lateral surface of the die, outside the active area.

Abstract: A galvanic-isolated coupling of circuit portions is accomplished on the basis of a stacked chip configuration. The semiconductor chips thus can be fabricated on the basis of any appropriate process technology, thereby incorporating one or more coupling elements, such as primary or secondary coils of a micro transformer, wherein the final characteristics of the micro transformer are adjusted during the wafer bond process.

Abstract: An embodiment of a die comprising: a semiconductor body including a front side, a back side, and a lateral surface; an electronic device, formed in said semiconductor body and including an active area facing the front side; a vertical conductive connection, extending through the semiconductor body and defining a conductive path between the front side and the back side of the semiconductor body; and a conductive contact, defining a conductive path on the front side of the semiconductor body, between the active area and the vertical conductive connection, wherein the vertical conductive connection is formed on the lateral surface of the die, outside the active area.

Abstract: A microfluidic device (1000-1005), comprising: a semiconductor body (2) having a first side (2a) and a second side (2b) opposite to one another, and housing, at the first side, a plurality of wells (4), having a first depth; an inlet region (30) forming an entrance point for a fluid to be supplied to the wells; a main channel (6a) fluidically connected to the inlet region, and having a second depth; and a plurality of secondary channels (6b) fluidically connecting the main channel to a respective well, and having a third depth. The first depth is higher than the second depth, which in turn is higher than the third depth.

Abstract: A galvanic-isolated coupling of circuit portions is accomplished on the basis of a stacked chip configuration. The semiconductor chips thus can be fabricated on the basis of any appropriate process technology, thereby incorporating one or more coupling elements, such as primary or secondary coils of a micro transformer, wherein the final characteristics of the micro transformer are adjusted during the wafer bond process.

Abstract: A rooftop tiling system may include multi-functional roof tiles integrating photovoltaic and thermal converters for solar energy. The tiles allow a heat transfer fluid to circulate through inner flow channels of the tiles, and light concentration photovoltaic modules may be present atop the tiles together with a transmission or light reflection focusing device.

Abstract: A method manufactures a gas sensor integrated on a semiconductor substrate. The method includes: realizing a first plurality of openings in the semiconductor substrate; realizing a crystalline silicon membrane suspended on the semiconductor substrate, forming an insulating cavity buried in the substrate; realizing a second plurality of openings in the semiconductor substrate, so as to totally suspend on the semiconductor substrate the crystalline silicon membrane; realizing, through a thermal oxidation process of the totally suspended crystalline silicon membrane, a suspended dielectric membrane; realizing, through selective photolithography, a heating element; realizing, through selective photolithography, electrodes and a pair of electric contacts; and selectively realizing, above the electrodes, a sensitive element by compacting layers of metallic oxide through a sintering process generated in the gas sensor by connecting the electrodes to a voltage generator.

Abstract: An embodiment of a die comprising: a semiconductor body including a front side, a back side, and a lateral surface; an electronic device, formed in said semiconductor body and including an active area facing the front side; a vertical conductive connection, extending through the semiconductor body and defining a conductive path between the front side and the back side of the semiconductor body; and a conductive contact, defining a conductive path on the front side of the semiconductor body, between the active area and the vertical conductive connection, wherein the vertical conductive connection is formed on the lateral surface of the die, outside the active area.