Patents by Inventor Dae Hyun Park
Dae Hyun Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240085282Abstract: There is provide a method for manufacturing analytical semiconductor samples by using an apparatus for manufacturing analytical semiconductor samples, which minimizes a feedback time by manufacturing a viewing surface that is environment-friendly and has a large area. The method comprising mounting the analytical semiconductor samples to a holder; discharging deionized (DI) water to an upper surface of a polishing plate through a DI water nozzle; grinding the analytical semiconductor samples with the upper surface of the polishing plat; determining whether a desired viewing surface of the analytical semiconductor samples has been acquired after the grinding of the analytical semiconductor samples; and transferring the analytical semiconductor samples to analyze the viewing surface of the ground analytical semiconductor samples based on a determination that the desired viewing surface of the analytical semiconductor samples has been acquired.Type: ApplicationFiled: August 23, 2023Publication date: March 14, 2024Applicant: Samsung Electronics Co., Ltd.Inventors: Min Chul JO, Sang Hyun PARK, Su Jin SHIN, Gil Ho GU, Dae Gon YU, So Yeon LEE, Yun Bin JEONG
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Patent number: 11930179Abstract: An image encoding/decoding method is provided. An image decoding method of the present invention may comprise deriving an intra-prediction mode of a current luma block, deriving an intra-prediction mode of a current chroma block based on the intra-prediction mode of the current luma block, generating a prediction block of the current chroma block based on the intra-prediction mode of the current chroma block, and the deriving of an intra-prediction mode of a current chroma block may comprise determining whether or not CCLM (Cross-Component Linear Mode) can be performed for the current chroma block.Type: GrantFiled: December 27, 2019Date of Patent: March 12, 2024Assignees: Electronics and Telecommunications Research Institute, INDUSTRY ACADEMY COOPERATION FOUNDATION OF SEJONG UNI, CHIPS & MEDIA, INC, INDUSTRY-UNIVERSITY COOPERATION FOUNDATION KOREA AEROSPACE UNIVERSITYInventors: Sung Chang Lim, Jung Won Kang, Ha Hyun Lee, Jin Ho Lee, Hui Yong Kim, Yung Lyul Lee, Ji Yeon Jung, Nam Uk Kim, Myung Jun Kim, Yang Woo Kim, Dae Yeon Kim, Jae Gon Kim, Do Hyeon Park
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Publication number: 20240080450Abstract: The present invention discloses an image decoding method, the method including generating a candidate list including motion information derived from a spatial neighboring block and a temporal neighboring block adjacent to a current block; deriving motion information of the current block using the candidate list; generating a prediction block of the current block using the derived motion information; and updating the derived motion information in a motion information list, wherein the generating of the candidate list is performed in such a manner as to include at least one information of the motion information included in the updated motion information list in a block decoded before the current block.Type: ApplicationFiled: November 2, 2023Publication date: March 7, 2024Applicants: Electronics and Telecommunications Research Institute, UNIVERSITY-INDUSTRY COOPERATION GROUP OF KYUNG HEE UNIVERSITYInventors: Jung Won KANG, Ha Hyun LEE, Sung Chang LIM, Jin Ho LEE, Hui Yong KIM, Gwang Hoon PARK, Tae Hyun KIM, Dae Young LEE
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Publication number: 20240073445Abstract: Disclosed is a method of decoding an image and a method of encoding an image. The method of decoding an image includes: obtaining motion-constrained tile set information; determining, on the basis of the motion-constrained tile set information, a first boundary region of a collocated tile set within a reference picture, which corresponds to a motion-constrained tile set; padding a second boundary region corresponding to the first boundary region; and performing inter prediction on the motion-constrained tile set by using a collocated tile set that includes the padded second boundary region.Type: ApplicationFiled: November 8, 2023Publication date: February 29, 2024Applicants: Electronics and Telecommunications Research Institute, CHIPS&MEDIA, INCInventors: Ha Hyun LEE, Jung Won KANG, Sung Chang LIM, Jin Ho LEE, Hui Yong KIM, Dae Yeon KIM, Dong Jin PARK
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Patent number: 11729127Abstract: Provided are a method and apparatus for generating a bundle invitation link. The method includes obtaining a plurality of invitation links from a first user terminal, each of the plurality of invitation links being connected to at least one community, generating a bundle invitation link connected to a detail page, the detail page including the plurality of invitation links, transmitting the bundle invitation link to a second user terminal, causing a display of the second user terminal to display the detail page in response to receiving, from the second user terminal, an input corresponding to the bundle invitation link, and receiving a data pair from the second user terminal, the data pair including at least one invitation link and an identification value of the second user terminal, and the at least one invitation link being selected from among the plurality of invitation links included in the detail page.Type: GrantFiled: July 7, 2021Date of Patent: August 15, 2023Assignee: NAVER CORPORATIONInventors: Su Bin Bak, Ji Min Yoo, Jane Choi, Dae Hyun Park, Jung Hun Bae, Young Ju Kang, Sun Mee Kim, Ji Hoon Ko, Hyo Jong Kim, Sang Hoon Lee
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Patent number: 11499494Abstract: A method for diagnosing fuel leakage of a vehicle includes: measuring a pressure of a fuel tank by a pressure sensor in a closed state of a fuel system during starting-off of the vehicle; measuring an inner temperature of the fuel tank by a temperature sensor; and diagnosing, by a controller, whether or not leakage occurs by performing different leakage diagnoses depending on a pressure condition of the fuel tank. Thus, the controller performs a first leakage diagnosis when a pressure value of the fuel tank, measured in the measuring the pressure of the fuel tank, is within an atmospheric pressure level; performs a second leakage diagnosis when the pressure value is higher than a positive pressure; and performs a third leakage diagnosis when the pressure value is lower than a negative pressure.Type: GrantFiled: November 11, 2021Date of Patent: November 15, 2022Assignees: HYUNDAI MOTOR COMPANY, KIA CORPORATIONInventors: Jeong Seok Lee, Ju Tae Song, Dae Hyun Park
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Publication number: 20220341370Abstract: A method for diagnosing fuel leakage of a vehicle includes: measuring a pressure of a fuel tank by a pressure sensor in a closed state of a fuel system during starting-off of the vehicle; measuring an inner temperature of the fuel tank by a temperature sensor; and diagnosing, by a controller, whether or not leakage occurs by performing different leakage diagnoses depending on a pressure condition of the fuel tank. Thus, the controller performs a first leakage diagnosis when a pressure value of the fuel tank, measured in the measuring the pressure of the fuel tank, is within an atmospheric pressure level; performs a second leakage diagnosis when the pressure value is higher than a positive pressure; and performs a third leakage diagnosis when the pressure value is lower than a negative pressure.Type: ApplicationFiled: November 11, 2021Publication date: October 27, 2022Applicants: HYUNDAI MOTOR COMPANY, KIA CORPORATIONInventors: Jeong Seok Lee, Ju Tae Song, Dae Hyun Park
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Publication number: 20220014491Abstract: Provided are a method and apparatus for generating a bundle invitation link. The method includes obtaining a plurality of invitation links from a first user terminal, each of the plurality of invitation links being connected to at least one community, generating a bundle invitation link connected to a detail page, the detail page including the plurality of invitation links, transmitting the bundle invitation link to a second user terminal, causing a display of the second user terminal to display the detail page in response to receiving, from the second user terminal, an input corresponding to the bundle invitation link, and receiving a data pair from the second user terminal, the data pair including at least one invitation link and an identification value of the second user terminal, and the at least one invitation link being selected from among the plurality of invitation links included in the detail page.Type: ApplicationFiled: July 7, 2021Publication date: January 13, 2022Applicant: NAVER CORPORATIONInventors: Su Bin BAK, Ji Min YOO, Jane CHOI, Dae Hyun PARK, Jung Hun BAE, Young Ju KANG, Sun Mee KIM, Ji Hoon KO, Hyo Jong KIM, Sang Hoon LEE
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Publication number: 20220012819Abstract: Provided is a community management method including: receiving, from a first terminal, a generation request for a standby community; generating the standby community including a user of the first terminal as a participant, according to the generation request for the standby community; and generating a regular community including participants of the standby community as members in response to a number of the participants of the standby community reaching a target number of the standby community, wherein a writing function is restricted in the standby community and allowed in the regular community.Type: ApplicationFiled: July 8, 2021Publication date: January 13, 2022Applicant: NAVER CORPORATIONInventors: Sa Ra YOON, Seok Woo LEE, Jane CHOI, Hyun Min LEE, Si Hyeon PARK, Dae Hyun PARK, Jung Hun BAE, Young Bae HYUN, Sun Mee KIM, Kyung Man KWAK, Young Sun MIN, Yong Kyu LEE, Man Joon KIM, Ji Hoon KO, O Shik KWON, Hyo Jong KIM, Ye Seul KIM, Ji Hyun KIM, Jung Min LEE
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Patent number: 11069666Abstract: A semiconductor package includes a frame having a through-hole, and a first semiconductor chip disposed in the through-hole of the frame and having an active surface on which a connection pad is disposed, an inactive surface opposing the active surface, and a side surface connecting the active and inactive surfaces. A first encapsulant covers at least a portion of each of the inactive surface and the side surface of the first semiconductor chip. A connection structure has a first surface having disposed thereon the active surface of the first semiconductor chip, and includes a redistribution layer electrically connected to the connection pad of the first semiconductor chip. A first passive component is disposed on a second surface of the connection structure opposing the first surface, the first passive component being electrically connected to the redistribution layer and having a thickness greater than a thickness of the first semiconductor chip.Type: GrantFiled: June 27, 2019Date of Patent: July 20, 2021Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Chui Kyu Kim, Dae Hyun Park, Jung Ho Shim, Jae Hyun Lim, Mi Ja Han, Sang Jong Lee, Han Kim
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Patent number: 11037884Abstract: A semiconductor package includes: a frame having a first surface and a second surface opposing each other, and including a through-hole and a wiring structure connected to the first surface and the second surface; a connection structure disposed on the first surface of the frame and including a redistribution layer; a semiconductor chip disposed in the through-hole and including connection pads connected to the redistribution layer; an encapsulant encapsulating the semiconductor chip and covering the second surface of the frame; and a plurality of electrical connection metal members disposed on the second surface of the frame and connected to the wiring structure. The wiring structure includes a shielding wiring structure surrounding the through-hole, and the plurality of electrical connection metal members include a plurality of grounding electrical connection metal members connected to the shielding wiring structure.Type: GrantFiled: June 6, 2019Date of Patent: June 15, 2021Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Yoon Seok Seo, Dae Hyun Park, Sang Jong Lee, Chul Kyu Kim, Jae Hyun Lim
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Patent number: 10923433Abstract: A fan-out semiconductor package includes a connection member including an insulating layer and a redistribution layer, a semiconductor chip disposed on the connection member, an encapsulant encapsulating the semiconductor chip, and an electromagnetic wave shielding layer disposed on the semiconductor chip and including a plurality of degassing holes. The electromagnetic wave shielding layer includes a first region and a second region in which densities of the degassing holes are different from each other, the first region having a density of the degassing holes higher than a density of the degassing holes in the second region.Type: GrantFiled: August 20, 2018Date of Patent: February 16, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Mi Ja Han, Dae Hyun Park, Seong Hwan Lee, Sang Jong Lee
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Patent number: 10762479Abstract: A blockchain-based method is described which is related to transferring electronic currency from a payer to a payee. In some embodiments, a first process, a second process and a third process are performed. The first process includes receiving a processing request for a target transaction from a terminal of a payer, and transferring the processing request to a first blockchain node among a plurality of blockchain nodes. When a verification result indicates that the target transaction is valid, the method proceeds to performing the second and third processes. The second process includes transferring electronic currency from an electronic wallet of the payer to an electronic wallet of the payee. The third process includes recording data for the target transaction in a new block, and spreading the new block over the blockchain network. In some embodiments, the second process and the third process are performed in parallel.Type: GrantFiled: March 30, 2018Date of Patent: September 1, 2020Assignee: SAMSUNG SDS CO., LTD.Inventors: Nyun Soo Hyun, Sang Hyeon Kim, Jeong Ho Kim, Kyung Jin Kim, Dae Hyun Park
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Publication number: 20200168558Abstract: A semiconductor package includes: a frame having a first surface and a second surface opposing each other, and including a through-hole and a wiring structure connected to the first surface and the second surface; a connection structure disposed on the first surface of the frame and including a redistribution layer; a semiconductor chip disposed in the through-hole and including connection pads connected to the redistribution layer; an encapsulant encapsulating the semiconductor chip and covering the second surface of the frame; and a plurality of electrical connection metal members disposed on the second surface of the frame and connected to the wiring structure. The wiring structure includes a shielding wiring structure surrounding the through-hole, and the plurality of electrical connection metal members include a plurality of grounding electrical connection metal members connected to the shielding wiring structure.Type: ApplicationFiled: June 6, 2019Publication date: May 28, 2020Inventors: Yoon Seok SEO, Dae Hyun PARK, Sang Jong LEE, Chul Kyu KIM, Jae Hyun LIM
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Publication number: 20200168591Abstract: A semiconductor package includes a frame having a through-hole, and a first semiconductor chip disposed in the through-hole of the frame and having an active surface on which a connection pad is disposed, an inactive surface opposing the active surface, and a side surface connecting the active and inactive surfaces. A first encapsulant covers at least a portion of each of the inactive surface and the side surface of the first semiconductor chip. A connection structure has a first surface having disposed thereon the active surface of the first semiconductor chip, and includes a redistribution layer electrically connected to the connection pad of the first semiconductor chip. A first passive component is disposed on a second surface of the connection structure opposing the first surface, the first passive component being electrically connected to the redistribution layer and having a thickness greater than a thickness of the first semiconductor chip.Type: ApplicationFiled: June 27, 2019Publication date: May 28, 2020Inventors: Chul Kyu KIM, Dae Hyun PARK, Jung Ho SHIM, Jae Hyun LIM, Mi Ja HAN, Sang Jong LEE, Han KIM
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Patent number: 10667386Abstract: A circuit board includes a first conductive layer, a second conductive layer, and a first insulating layer disposed between the first conductive layer and the second conductive layer, wherein the first conductive layer includes a signal line, the second conductive layer includes a ground line, and the ground line of the second conductive layer includes a pattern area patterned in a meander shape.Type: GrantFiled: February 4, 2019Date of Patent: May 26, 2020Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Han Kim, Seong Hee Choi, Dae Hyun Park
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Patent number: 10600679Abstract: A fan-out semiconductor package includes a first connection member having a through-hole, first and second semiconductor chips disposed in the through-hole, an encapsulant encapsulating at least portions of the first connection member, the first semiconductor chip, and the second semiconductor chip, and a second connection member disposed on the first connection member and on active surfaces of the first semiconductor chip and the second semiconductor chip. A redistribution layer of the second connection member is respectively connected to both the first and second connection pads through first and second conductors, and the second conductor has a height greater than that of the first conductor.Type: GrantFiled: August 3, 2017Date of Patent: March 24, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Han Kim, Mi Ja Han, Dae Hyun Park
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Patent number: 10553541Abstract: The present disclosure relates to a fan-out semiconductor package in which a plurality of semiconductor chips are stacked and packaged, and are disposed in a special form to be thus electrically connected to a redistribution layer of a connection member through vias rather than wires. The fan-out semiconductor package can further include a connection member having a through-hole, and at least one of the semiconductor chips can be disposed in the through-hole.Type: GrantFiled: April 17, 2018Date of Patent: February 4, 2020Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Hyung Joon Kim, Jung Ho Shim, Dae Hyun Park, Han Kim
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Publication number: 20190341353Abstract: A fan-out semiconductor package includes a connection member including an insulating layer and a redistribution layer, a semiconductor chip disposed on the connection member, an encapsulant encapsulating the semiconductor chip, and an electromagnetic wave shielding layer disposed on the semiconductor chip and including a plurality of degassing holes. The electromagnetic wave shielding layer includes a first region and a second region in which densities of the degassing holes are different from each other, the first region having a density of the degassing holes higher than a density of the degassing holes in the second region.Type: ApplicationFiled: August 20, 2018Publication date: November 7, 2019Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Mi Ja HAN, Dae Hyun PARK, Seong Hwan LEE, Sang Jong LEE
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Patent number: 10333193Abstract: A printed circuit board and a printed circuit board includes a signal transmitting part; a ground part that includes an impedance adjusting part and a dummy part; and an insulating layer disposed between the signal transmitting part and the ground part.Type: GrantFiled: June 29, 2015Date of Patent: June 25, 2019Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Dae Hyun Park, Han Kim