Abstract: Provided is a monitoring device for a winch drum of a crane, the device including: a monitoring unit that monitors whether or not an abrasion generation condition is satisfied for the winch drum; and a notification unit that performs notification based on satisfaction of the abrasion generation condition.

Abstract: A cleaning device includes: a cleaning brush that has bristles that rotate and contact a surface, to which toner has adhered, of a cleaning member to be cleaned, the cleaning brush removing the toner adhered to the surface of the cleaning member; a first contact member that contacts the bristles without a position of the first contact member relative to a position of the cleaning brush being changed; and a second contact member that contacts the bristles at a location downstream from the first contact member in a direction of rotation of the cleaning brush and without a position of the second contact member relative to the position of the cleaning brush being changed, and that is disposed on an extension line extended from a line between an axial center of the cleaning brush and a base of the bristles that move away from the first contact member.

Abstract: A method of culturing a cell population containing cartilage-derived cells positive for expression of Tie2 (cartilage-derived Tie2-positive cells), the method including culturing a cell population containing cartilage-derived Tie2-positive cells in a culture medium containing at least one kind of Tie2 expression enhancer other than growth factors (e.g., an extract derived from a plant of the genus Cinnamomum). This culturing method is preferably performed in cultureware having a culture surface coated with a coating agent (e.g., a polylysine-containing agent).

Abstract: A component mounting system reduces the waste of components while mounting components via an application material. The system determines whether or not to permit the start of the mounting process to a plurality of applying locations based on the post-application elapsed time that has elapsed after the application of the adhesive to the applying location. That is, the system predicts the post-application elapsed time exceeds the time limit at the mounting timing at which the component is mounted in the mounting process for each applying location. If the plurality of applying locations include no applying location where the post-application elapsed time exceeds the time limit at the mounting timing, the start of the mounting process is permitted. However, if there is any applying location where the post-application elapsed time exceeds the time limit at the mounting timing, the start of the mounting process is prohibited.

Abstract: According to one embodiment, a semiconductor memory device includes a stacked body in which a plurality of insulating layers and a plurality of conductive layers are alternately stacked above a substrate, a pillar that penetrates the stacked body while extending in a stacking direction of the stacked body, and a semiconductor layer, a first insulating layer, a charge accumulation layer, and a second insulating layer, which are stacked on a side surface of the pillar in order from the pillar, wherein the semiconductor layer has an average grain size that is larger on a side nearer to the pillar and is smaller on a side nearer to the first insulating layer.

Abstract: A component mounting system reduces the waste of components while mounting components via an application material. The system determines whether or not to permit the start of the mounting process to a plurality of applying locations based on the post-application elapsed time that has elapsed after the application of the adhesive to the applying location. That is, the system predicts the post-application elapsed time exceeds the time limit at the mounting timing at which the component is mounted in the mounting process for each applying location. If the plurality of applying locations include no applying location where the post-application elapsed time exceeds the time limit at the mounting timing, the start of the mounting process is permitted. However, if there is any applying location where the post-application elapsed time exceeds the time limit at the mounting timing, the start of the mounting process is prohibited.

Abstract: A spark plug having a center electrode, a ground electrode, and a noble metal tip that is joined to a part of the ground electrode near one end of the ground electrode via a fused portion. The fused portion extends outward beyond an outer shape of the noble metal tip so that a part of the fused portion is present at each of positions that are located inward from and separated from both side edges of the ground electrode in a width direction of the ground electrode. The fused portion includes a fused protrusion that is located near at least one of two side edges of the noble metal tip in the width direction of the ground electrode and that protrudes in a direction away from the one end of the ground electrode.

Abstract: A nonvolatile semiconductor memory device according to an embodiment comprises a memory cell, the memory cell comprising: a semiconductor layer; a control gate electrode; a charge accumulation layer disposed between the semiconductor layer and the control gate electrode; a first insulating layer disposed between the semiconductor layer and the charge accumulation layer; and a second insulating layer disposed between the charge accumulation layer and the control gate electrode, the charge accumulation layer including an insulator that includes silicon and nitrogen, and the insulator further including: a first element or a second element, the second element being different from the first element; and a third element different from the first element and the second element.

Abstract: According to one embodiment, a resistance-change memory includes a memory cell and a control circuit. The memory cell comprises first and second electrodes, and a variable resistance layer disposed between the first electrode and the second electrode. The control circuit applies a voltage between the first electrode and the second electrode to perform writing, erasing, and reading. During the writing, the control circuit applies a first voltage pulse between the first electrode and the second electrode, and then applies a second voltage pulse different in polarity from the first voltage pulse after applying the first voltage pulse.

Abstract: According to one embodiment, a semiconductor device includes a first region having a first conductivity type in a semiconductor region; a second region having a second conductivity type in the semiconductor region; a gate electrode above a first part of the semiconductor region between the first region and the second region; a gate insulating layer between the first part and the gate electrode; a third region having the first conductivity type below the second region; and a fourth region across the second region and the third region and including a first impurity.

Abstract: A spark plug having a center electrode, a ground electrode, and a noble metal tip that is joined to a part of the ground electrode near one end of the ground electrode via a fused portion. The fused portion extends outward beyond an outer shape of the noble metal tip so that a part of the fused portion is present at each of positions that are located inward from and separated from both side edges of the ground electrode in a width direction of the ground electrode. The fused portion includes a fused protrusion that is located near at least one of two side edges of the noble metal tip in the width direction of the ground electrode and that protrudes in a direction away from the one end of the ground electrode.

Abstract: A semiconductor memory device of an embodiment comprises a memory cell. This memory cell comprises: an oxide semiconductor layer; a gate electrode; and a charge accumulation layer disposed between the oxide semiconductor layer and the gate electrode. This oxide semiconductor layer includes a stacked structure of an n type oxide semiconductor layer and a p type oxide semiconductor layer.

Abstract: According to one embodiment, a semiconductor memory device includes a semiconductor layer, a first electrode, first and second oxide layers, and a storage layer. The first oxide layer is provided between the semiconductor layer and the first electrode. The second oxide layer is provided between the first oxide layer and the first electrode. The storage layer is provided between the first and second oxide layers. The storage layer includes a first region including silicon nitride, a second region provided between the first region and the second oxide layer and including silicon nitride, and a third region provided between the first and second regions. The third region includes a plurality of first metal atoms. A first density of bond of the first metal atoms in the third region is lower than a second density of bond of the first metal atom and a nitrogen atom in the third region.

Abstract: According to one embodiment, a semiconductor memory device includes a semiconductor layer, a first electrode, first and second oxide layers, and a storage layer. The first oxide layer is provided between the semiconductor layer and the first electrode. The second oxide layer is provided between the first oxide layer and the first electrode. The storage layer is provided between the first and second oxide layers. The storage layer includes a first region including silicon nitride, a second region provided between the first region and the second oxide layer and including silicon nitride, and a third region provided between the first and second regions. The third region includes a plurality of first metal atoms. A first density of bond of the first metal atoms in the third region is lower than a second density of bond of the first metal atom and a nitrogen atom in the third region.

Abstract: A connector terminal includes first and second arm parts, an interconnection part, a first contactor formed of a piece of sheet which is in a bent shape so as to have the first end laid over on a second end of the sheet with reference to a bent part that is an opposite side to a side where the first end of the sheet and the second end thereof are present, and a second contactor formed of a piece of sheet which is in a bent shape so as to have the first end laid over on a second end of the sheet with reference to a bent part that is an opposite side to a side where the first end of the sheet and the second end thereof are located, and the second contactor facing the first contactor.

Abstract: It is made possible to provide a method for manufacturing a semiconductor device that has a high-quality insulating film in which defects are not easily formed, and experiences less leakage current. A method for manufacturing a semiconductor device, includes: forming an amorphous silicon layer on an insulating layer; introducing oxygen into the amorphous silicon layer; and forming a silicon oxynitride layer by nitriding the amorphous silicon layer having oxygen introduced thereinto.

Abstract: A semiconductor device according to an embodiment includes a first conductive layer, a second conductive layer, and a dielectric film provided between the first and the second conductive layers. The dielectric film including a fluorite-type crystal and a positive ion site includes Hf and/or Zr, and a negative ion site includes O. In the dielectric film, parameters a, b, c, p, x, y, z, u, v and w satisfy a predetermined relation. The axis length of the a-axis, b-axis and c-axis of the original unit cell is a, b, and c, respectively. An axis in a direction with no reversal symmetry is c-axis, a stacking direction of atomic planes of two kinds formed by negative ions disposed at different positions is a-axis, the remainder is b-axis. The parameters x, y, z, u, v and w are values represented using the parameter p.

Abstract: A semiconductor device of an embodiment includes an oxide semiconductor layer including a first region, a second region and the third region provided between the first region and the second region. The oxide semiconductor layer contains indium (In), gallium (Ga), and zinc (Zn). The first and second regions have thinner film thickness and lower indium (In) concentration than the third region. An insulating film is provided on the third region, and an electrode is provided on the insulating film. A first conductive layer is provided under the first region and electrically connected with the first region. A second conductive layer is provided under the second region and electrically connected with the second region.

Abstract: According to one embodiment, a resistance-change memory includes a memory cell and a control circuit. The memory cell comprises first and second electrodes, and a variable resistance layer disposed between the first electrode and the second electrode. The control circuit applies a voltage between the first electrode and the second electrode to perform writing, erasing, and reading. During the writing, the control circuit applies a first voltage pulse between the first electrode and the second electrode, and then applies a second voltage pulse different in polarity from the first voltage pulse after applying the first voltage pulse.

Abstract: A connector terminal includes first and second arm parts, an interconnection part, a first contactor formed of a piece of sheet which is in a bent shape so as to have the first end laid over on a second end of the sheet with reference to a bent part that is an opposite side to a side where the first end of the sheet and the second end thereof are present, and a second contactor formed of a piece of sheet which is in a bent shape so as to have the first end laid over on a second end of the sheet with reference to a bent part that is an opposite side to a side where the first end of the sheet and the second end thereof are located, and the second contactor facing the first contactor.