Patents by Inventor Daisuke Takise

Daisuke Takise has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6393572
    Abstract: In a master-slave configuration wherein a sleepmode activation is effected by the cessation of a clocking signal, the need for an analog device or auxiliary clock for detecting the cessation of the clocking signal is obviated by anticipating the cessation of the clock signal. Upon anticipating the cessation of the clock signal, the remaining clock signaling before cessation is used as required to effect a controlled power-down of the slave device. By eliminating the need for an analog clock cessation detector, the process tolerance constraints associated with analog circuitry can be avoided, the reliability and robustness of the design is improved, and the required testing is simplified, thereby reducing the cost of the device. In like manner, the elimination of an auxiliary clock generator reduces the cost and complexity of the device and system, and improves the device and system's overall reliability and testability.
    Type: Grant
    Filed: April 28, 1999
    Date of Patent: May 21, 2002
    Assignee: Philips Electronics North America Corporation
    Inventors: Dev Datta, Rune H. Jensen, Calto Wong, Daisuke Takise
  • Patent number: 5694444
    Abstract: An integrated circuit counter is capable of implementing a relatively high count while being testable using a relatively low number of clock cycles. A linear-feedback shift register (LFSR) having n bit positions is used as the counter. The feedback path of the shift register includes an exclusive OR (XOR) gate that couples selected bits back to the input of the register, in order to implement a 2.sup.n -1 counter. Combinatorial logic circuitry is included to test the counter in significantly less than 2.sup.n -1 clock cycles. This allows for implementing a testable "watchdog timer" that may be used to detect software runaway conditions in microprocessor systems, among other uses.
    Type: Grant
    Filed: August 27, 1996
    Date of Patent: December 2, 1997
    Assignee: Lucent Technologies Inc.
    Inventors: Sonali Bagchi, Jalil Fadavi-Ardekani, Kenneth Daniel Fitch, Daisuke Takise