Abstract: A controllable delay clock buffer that provides spread spectrum modulation of the output signals with zero cycle slip includes a PLL having a PLL loop filter that comprises an RC network. A clock signal is input to the PLL, and a SS modulation frequency is injected into the capacitor of the PLL loop filter. The SS signal is provided by a secondary charge pump that produces a programmable waveform such as a square wave or a stair case square wave current signal. The programmable waveform is integrated by the loop filter capacitor to form a corresponding triangular or trigonal waveform which varies the input to the VCO of the PLL to define a frequency modulation profile that has a corresponding triangular or trigonal envelope. The bandpass profile of the SS modulation signal is at a higher frequency range than the lowpass profile of the PLL, so that the SS waveform profile is not distorted or cancelled by the PLL.

Abstract: A structure is provided to create a voltage-independent capacitive structure using a typical MOS fabrication process. The capacitive structure includes two FET devices connected in series by having their source, drain, and body terminals all coupled together into a common node. A biasing circuit that includes a current generator and a current mirror biases the common node so that a constant capacitance is maintained across the gate terminals of the two serially connected FET devices, independent of the applied voltage.

Abstract: A transceiver system for high speed, low bit-error rate data communications over a.c. power lines in the presence of repetitive impulse noise includes an a.c. power line coupling network, a power line communications modem, and a microprocessor with a memory and a programmed avoidance algorithm. The a.c. line coupling network includes a zero crossing circuit to detect the start of each a.c. cycle; a transient-voltage limiting front end to detect impluse noises above a threshold and minimize ringing, and a timing circuit to determine the time and duration of each impulse in each sampled a.c. cycle. The microprocessor records the start and stop times of impulses, repetitively scans several a.c. cycles and determines whether or not the impulses are periodic. For periodic impulses, the microprocessor blocks communication on the modem during the impulses, enabling the transceiver to transmit and receive between impulses.