Patents by Inventor Daniel J. Prezioso

Daniel J. Prezioso has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • DESIGNING A PRINTED CIRCUIT BOARD (PCB) TO DETECT SLIVERS OF CONDUCTIVE MATERIAL INCLUDED WITHIN VIAS OF THE PCB
    Publication number: 20230156928
    Abstract: A method may include obtaining a printed circuit board (PCB) that includes a set of vias that include a set of stub regions. The PCB may include a set of layers perpendicular to the set of vias. The set of layers may include a signal layer and a ground layer. The ground layer may be located between the set of stub regions and the signal layer. The method may include drilling to remove at least a portion of a stub region of a via of the set of vias. The method may include performing an electrical test to determine whether a sliver of conductive material is included within the via after drilling to remove the at least a portion of the stub region of the via.
    Type: Application
    Filed: January 20, 2023
    Publication date: May 18, 2023
    Inventors: Steve WILKINSON, Daniel J. PREZIOSO
  • Designing a printed circuit board (PCB) to detect slivers of conductive material included within vias of the PCB
    Patent number: 11570908
    Abstract: A method may include obtaining a printed circuit board (PCB) that includes a set of vias that include a set of stub regions. The PCB may include a set of layers perpendicular to the set of vias. The set of layers may include a signal layer and a ground layer. The ground layer may be located between the set of stub regions and the signal layer. The method may include drilling to remove at least a portion of a stub region of a via of the set of vias. The method may include performing an electrical test to determine whether a sliver of conductive material is included within the via after drilling to remove the at least a portion of the stub region of the via.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: January 31, 2023
    Assignee: Juniper Networks, Inc.
    Inventors: Steve M. Wilkinson, Daniel J. Prezioso
  • DESIGNING A PRINTED CIRCUIT BOARD (PCB) TO DETECT SLIVERS OF CONDUCTIVE MATERIAL INCLUDED WITHIN VIAS OF THE PCB
    Publication number: 20210153359
    Abstract: A method may include obtaining a printed circuit board (PCB) that includes a set of vias that include a set of stub regions. The PCB may include a set of layers perpendicular to the set of vias. The set of layers may include a signal layer and a ground layer. The ground layer may be located between the set of stub regions and the signal layer. The method may include drilling to remove at least a portion of a stub region of a via of the set of vias. The method may include performing an electrical test to determine whether a sliver of conductive material is included within the via after drilling to remove the at least a portion of the stub region of the via.
    Type: Application
    Filed: January 29, 2021
    Publication date: May 20, 2021
    Inventors: Steve M. WILKINSON, Daniel J. PREZIOSO
  • Designing a printed circuit board (PCB) to detect slivers of conductive material included within vias of the PCB
    Patent number: 10917976
    Abstract: A method may include obtaining a printed circuit board (PCB) that includes a set of vias that include a set of stub regions. The PCB may include a set of layers perpendicular to the set of vias. The set of layers may include a signal layer and a ground layer. The ground layer may be located between the set of stub regions and the signal layer. The method may include drilling to remove at least a portion of a stub region of a via of the set of vias. The method may include performing an electrical test to determine whether a sliver of conductive material is included within the via after drilling to remove the at least a portion of the stub region of the via.
    Type: Grant
    Filed: July 12, 2017
    Date of Patent: February 9, 2021
    Assignee: Juniper Networks, Inc.
    Inventors: Steve M. Wilkinson, Daniel J. Prezioso