Abstract: A key-value store supporting GET, PUT and DELETE operations, serializes multiple clients using two locks, and that supports asynchronous resizing. The locking scheme includes an operation of holding two locks, one for the key involved in the operation, one for the page currently searched or updated. The store can either be a single volume holding keys and data or can be organized as a directory volume referencing a number of data volumes organized by data-size ranges. The scheme also supports asynchronous resizing of the directory while continuing to perform operations.

Abstract: A key-value store supporting GET, PUT and DELETE operations, serializes multiple clients using two locks, and that supports asynchronous resizing. The locking scheme includes an operation of holding two locks, one for the key involved in the operation, one for the page currently searched or updated. The store can either be a single volume holding keys and data or can be organized as a directory volume referencing a number of data volumes organized by data-size ranges. The scheme also supports asynchronous resizing of the directory while continuing to perform operations.

Abstract: The apparatus includes: a hardware-side processing section including one or more programmable hardware-implemented chips configured to process request packets, which are received from host computers and relate to access requests to one or more file systems managed by the apparatus, and to generate response packets for the processed request packets; and a software-side processing section including one or more CPUs configured to execute decoding of requests packets sent from a host computer based on one or more computer programs stored in a memory of the software-side; wherein at least one programmable hardware-implemented chip of the hardware-side processing section is configured to process a credit request included in a received request packet, in particular without involvement of the software-side processing section.

Abstract: The apparatus includes: a hardware-side processing section including one or more programmable hardware-implemented chips configured to process request packets, which are received from host computers and relate to access requests to one or more file systems managed by the apparatus, and to generate response packets for the processed request packets; and a software-side processing section including one or more CPUs configured to execute decoding of requests packets sent from a host computer based on one or more computer programs stored in a memory of the software-side; wherein at least one programmable hardware-implemented chip of the hardware-side processing section is configured to process a credit request included in a received request packet, in particular without involvement of the hardware-side processing section.