Abstract: A system and method are provided for five-level non-causal channel equalization in a communications system. The method comprises: receiving a non-return to zero (NRZ) data stream input; establishing a five-level threshold; comparing the first bit estimate to a second bit value received prior to the first bit; comparing the first bit estimate to a third bit value received subsequent to the first bit; and, in response to the comparisons, determining the value of the first bit. Establishing a five-level threshold includes: establishing thresholds to distinguish a first bit value when the second and third bit values are a “1” value, when the second bit value is a “1” and the third bit value is a “0”, when the second bit value is a “0” and the third bit value is a “1”, when the second and third bit values are a “0” value, and an approximate midway threshold.

Abstract: A system and method are provided for coding a frame in a packet communications system using a G.709 Digital Wrapper Frame format. The method comprises: accepting digital information; outer encoding the digital information with a Reed Solomon (RS) encoding scheme; interleaving the outer encoded information; inner encoding the interleaved information using a BCH encoding scheme; and, forming a G.709 Digital Wrapper frame including payload and parity bytes. More specifically, a standard DW superframe is formed with 122,368 bits of payload and 8192 bits of parity. The outer encoding process uses an RS(1023,1007) parent code. In one aspect, 15 groups of RS(781,765) and 1 group of RS(778,762) codewords are formed per superframe. The inner encoding process uses a BCH(2047,1959) parent code. In one aspect, 64 groups of BCH(2040,1952) codewords are formed per superframe.

Abstract: A modified gain system and method are provided for non-causal channel equalization using feed-forward and feedback compensation. The method comprises: receiving a serial data stream first bit (present) input; comparing a second bit (past) value, received prior to the first bit input, to a third bit (future) value received subsequent to the first bit input; modifying the amplitude of the first bit input to compensate for the effect of the second and third bit values being equal; and, determining the value of the first bit input by comparing the amplitude modified first bit input to a Vopt threshold. When only one of the second and third bit values is a “1” value, a unity amplitude modifier is supplied. When the second and third bit values are a “1”, a low amplitude modifier is supplied. When the second and third bit values are a “0”, a high amplitude modifier is supplied.

Abstract: A system and method are provided for five-level non-casual channel equalization in a communications system. The method comprises: receiving a non-return to zero (NRZ) data stream input; establishing a five-level threshold; comparing the first bit estimate to a second bit value received prior to the first bit; comparing the first bit estimate to a third bit value received subsequent to the first bit; and, in response to the comparisons, determining the value of the first bit. Establishing a five-level threshold includes: establishing thresholds to distinguish a first bit value when the second and third bit values are a “1” value, when the second bit value is a “1” and the third bit value is a “0”, when the second bit value is a “0” and the third bit value is a “1”, when the second and third bit values are a “0” value, and an approximate midway threshold.

Abstract: A state machine method and system are provided for determining non-causal channel equalization thresholds. The method comprises: receiving a non-return to zero (NRZ) data stream encoded with forward error correction (FEC); setting x=0; in State 0, adjusting a third threshold (Vopt) in response to corrected bit errors; if x=0, setting a first and second threshold equal to the third threshold; in State 1, if x=0, simultaneously adjusting the first threshold and the second threshold, to minimize the total number of corrected bit errors; in State 2, following State 0, adjusting the first threshold, independent of the second threshold, to minimize the total number of errors; in State 3, following State 0, adjusting the second threshold, independent of the first threshold, to minimize the total number of errors; and, adding 1 to x and returning to State 0.

Abstract: A system and method are provided for non-causal channel equalization in a communications system. The method comprises: establishing a first threshold (V1) to distinguish a high probability “1” first bit estimate; establishing a second threshold (V0) to distinguish a high probability “0” first bit estimate; establishing a third threshold (Vopt) to distinguish first bit estimates between the first and second thresholds; receiving a non-return to zero (NRZ) data stream; comparing the first bit estimate in the data stream to a second bit value received prior to the first bit; comparing the first bit estimate to a third bit value received subsequent to the first bit; in response to the comparisons, determining the value of the first bit.

Abstract: A system and method are provided for feed-forward/feedback non-causal channel equalization in a communications system. The method comprises: receiving a non-return to zero (NRZ) data stream input; using three thresholds, estimating a first bit in the data stream; using two thresholds, determining a third bit value received subsequent to the first bit; comparing the first bit estimate to the third bit value; comparing the first bit estimate to a second bit value received prior to the first bit; and, in response to the comparisons, determining the value of the first bit. In some aspects of the method, the third bit value is determined in response to a prior third bit value determination. Determining a third bit value includes: distinguishing NRZ data stream inputs between fourth and fifth thresholds as a “0” if the prior third bit value was a “1”, and as a “1” if the prior third bit value was a “0”.

Abstract: A method is provided for organizing a communications frame structure with selectable synchronization words. The frame structure includes a header section for overhead bits. The number of bits, position of those bits, and the content of the bits used for synchronization of the frame structure are selected from the header section for use in transmitting information. On the receiving end of the transmission, the same number, position, and content of bits are selected to synchronize the received information stream. A communications repeater and system using the above-described selectable frame synchronization structure method is also provided.

Abstract: A system and method are provided for non-causal channel equalization in a communications system. The method comprises: receiving a non-return to zero (NRZ) data stream input; establishing thresholds to distinguish a first bit estimate; comparing the first bit estimate in the NRZ data stream to a second bit value received prior to the first bit, and a third bit received subsequent to the first bit; in response to the comparisons, determining the value of the first bit; tracking the NRZ data stream inputs in response to sequential bit value combinations; maintaining long-term averages of the tracked NRZ data stream inputs; adjusting the thresholds in response to the long-term averages; and, offsetting the threshold adjustments to account for the asymmetric noise distribution. Two methods are used to offset the threshold adjustments to account for the asymmetric noise distribution: forward error correction (FEC) decoding and tracking the ratio of bit values.

Abstract: A system and method are provided for non-causal channel equalization in a communications system. The method comprises: receiving a non-return to zero (NRZ) data stream input; establishing thresholds to distinguish a first bit estimate; comparing the first bit estimate in the NRZ data stream to a second bit value received prior to the first bit, and a third bit received subsequent to the first bit; in response to the comparisons, determining the value of the first bit; tracking the NRZ data stream inputs in response to sequential bit value combinations; maintaining long-term averages of the tracked NRZ data stream inputs; adjusting the thresholds in response to the long-term averages; and, offsetting the threshold adjustments to account for the asymmetric noise distribution. Two methods are used to offset the threshold adjustments to account for the asymmetric noise distribution: forward error correction (FEC) decoding and tracking the ratio of bit values.

Abstract: A system and a method are provided for non-causal channel equalization using error statistics. The method comprises: receiving a non-return to zero (NRZ) data stream input encoded with forward error correction (FEC); establishing a plurality of thresholds to generate a first bit estimate; comparing the first bit estimate in the data stream to a second bit value received prior to the first bit; comparing the first bit estimate to a third bit value received subsequent to the first bit; in response to the comparisons, determining the value of the first bit; FEC decoding the determined first bit value; and, using FEC error statistics to adjust the thresholds by evaluating the number of errors associated with a plurality of three-bit sequence combinations.

Abstract: A method for analyzing Gigabit Ethernet (GBE) and fiber channel protocol communications is provided which provides a more detailed understanding of the errors, than that provided under the IEEE 802.3z standard. The method creates an additional parity error signal which is not specified under the IEEE 802.3z standard. The parity error signals and IEEE 802.3z invalid code word signals are used to provide an analysis of whether the underlying communication errors are a result of 8B/10B coding word errors or running disparity errors. A system and apparatus to monitor performance in accordance with the above-mentioned method is also provided.

Abstract: A method is provided for creating an auxiliary link embedded in the overhead structure of a primary data link. The primary data link is organized in a frame structure which includes data sections and header sections. Information in the header sections is used to synchronize and capture transmitted messages. However, not all the overhead bits need be used for synchronization. Bits may be selectively “robbed” from the header section and used to transfer information in an auxiliary data link. The number of bits that are used to support the auxiliary data link, as well as the placement of these bits in the header section are both selectable. An apparatus, specifically the AMCC 3062 Performance Monitor IC, has also been described which supports the establishment of an auxiliary data link in accordance with the above-mentioned method.

Abstract: A method for monitoring the performance of digital communications has been provided which selectively performs Forward Error Corrections (FEC)s on the monitored data. In addition to selectively performing FEC, the process selectively decodes input data, and selectively encodes data for transmission. The decoding, FEC, and encoding operations can also be combined. Further, the process selectively performs evaluations of SONET/SDH protocol communications, Gigabit Ethernet (GBE), and other fiber channel communications, in addition to the selective decode/FEC/encode processes. An apparatus and system to enable the above-mentioned selective monitoring process has also been provided.

Abstract: A system and method are provided for using an analysis of forward error corrections (FEC) in a digital communications signal as feedback information to improve the performance of an analog receiver system. The FEC decoder supplies the number of “1” bit and “0” bit corrections made to a control unit. In response to the FEC corrections, the control unit changes receiver control parameters. The control signal modifies processing in the receiver front end to achieve the fewest number of FEC corrections.

Abstract: A system and method are provided for feed-forward/feedback non-causal channel equalization in a communications system. The method comprises: receiving a non-return to zero (NRZ) data stream input; using three thresholds, estimating a first bit in the data stream; using two thresholds, determining a third bit value received subsequent to the first bit; comparing the first bit estimate to the third bit value; comparing the first bit estimate to a second bit value received prior to the first bit; and, in response to the comparisons, determining the value of the first bit. In some aspects of the method, the third bit value is determined in response to a prior third bit value determination. Determining a third bit value includes: distinguishing NRZ data stream inputs between fourth and fifth thresholds as a “0” if the prior third bit value was a “1”, and as a “1” if the prior third bit value was a “0”.

Abstract: A system and method are provided for non-casual channel equalization in a communications system. The method comprises: establishing a first threshold (V1) to distinguish a high probability “1” first bit estimate; establishing a second threshold (V0) to distinguish a high probability “0” first bit estimate; establishing a third threshold (Vopt) to distinguish first bit estimates between the first and second thresholds; receiving a non-return to zero (NRZ) data stream; comparing the first bit estimate in the data stream to a second bit value received prior to the first bit; comparing the first bit estimate to a third bit value received subsequent to the first bit; in response to the comparisons, determining the value of the first bit.

Abstract: A digital trigger for a digitizing instrument having multiple analog-to-digital converters employed in interleaved fashion and in which the clock phase and period of a trigger point can be accurately determined. The digital trigger includes a digital comparator for comparing the output signals of each analog-to-digital converter to a trigger threshold level to generate a trigger signal at the output of the comparator if a trigger point occurs on the output signal. The outputs of the collective digital comparators are routed to decoding logic which generates a digital signal that indicates the phase of the clock period in which the trigger point occurred. The outputs of collective digital comparators are also logically ORed together for detecting if a trigger point occurred during a clock period.