Patents by Inventor Daniel Mark Dinneen
Daniel Mark Dinneen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10711364Abstract: Apparatuses and methods are provided for depositing a metal layer on a wafer. A secondary weir is positioned at a region below the primary weir such that overflowed plating solution over the primary weir during electroplating flows in a substantially azimuthally uniform manner. Methods are provided for electroplating wafers by increasing flow rate between wafer processes while plating solution flows over a primary weir, remains in contact with the overflowing plating solution, and flows onto the secondary weir such that overflow is substantially azimuthally uniform.Type: GrantFiled: March 16, 2018Date of Patent: July 14, 2020Assignee: Lam Research CorporationInventors: Daniel Mark Dinneen, Jingbin Feng
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Patent number: 10669644Abstract: Disclosed herein are methods for electroplating which employ seed layer detection. Such methods may operate by selecting a wafer, illuminating one or more points within an interior region of the wafer surface, measuring a first set of one or more in-process color signals from the one or more points within the interior region, illuminating one or more points within an edge region of the wafer surface, measuring a second set of one or more in-process color signals from the one or more points within the edge region, each color signal having one or more color components, calculating a metric indicative of a difference between the color signals in the first and second sets of in-process color signals, determining whether an acceptable seed layer is present on the wafer based on whether the metric is within a predetermined range, and repeating the foregoing for one or more additional wafers.Type: GrantFiled: July 30, 2019Date of Patent: June 2, 2020Assignee: Lam Research CorporationInventors: Daniel Mark Dinneen, Steven T. Mayer
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Publication number: 20190352792Abstract: Disclosed herein are methods for electroplating which employ seed layer detection. Such methods may operate by selecting a wafer, illuminating one or more points within an interior region of the wafer surface, measuring a first set of one or more in-process color signals from the one or more points within the interior region, illuminating one or more points within an edge region of the wafer surface, measuring a second set of one or more in-process color signals from the one or more points within the edge region, each color signal having one or more color components, calculating a metric indicative of a difference between the color signals in the first and second sets of in-process color signals, determining whether an acceptable seed layer is present on the wafer based on whether the metric is within a predetermined range, and repeating the foregoing for one or more additional wafers.Type: ApplicationFiled: July 30, 2019Publication date: November 21, 2019Inventors: Daniel Mark Dinneen, Steven T. Mayer
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Patent number: 10407794Abstract: Disclosed herein are methods for electroplating which employ seed layer detection. Such methods may operate by selecting a wafer, illuminating one or more points within an interior region of the wafer surface, measuring a first set of one or more in-process color signals from the one or more points within the interior region, illuminating one or more points within an edge region of the wafer surface, measuring a second set of one or more in-process color signals from the one or more points within the edge region, each color signal having one or more color components, calculating a metric indicative of a difference between the color signals in the first and second sets of in-process color signals, determining whether an acceptable seed layer is present on the wafer based on whether the metric is within a predetermined range, and repeating the foregoing for one or more additional wafers.Type: GrantFiled: December 20, 2018Date of Patent: September 10, 2019Assignee: Lam Research CorporationInventors: Daniel Mark Dinneen, Steven T. Mayer
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Publication number: 20190127873Abstract: Disclosed herein are methods for electroplating which employ seed layer detection. Such methods may operate by selecting a wafer, illuminating one or more points within an interior region of the wafer surface, measuring a first set of one or more in-process color signals from the one or more points within the interior region, illuminating one or more points within an edge region of the wafer surface, measuring a second set of one or more in-process color signals from the one or more points within the edge region, each color signal having one or more color components, calculating a metric indicative of a difference between the color signals in the first and second sets of in-process color signals, determining whether an acceptable seed layer is present on the wafer based on whether the metric is within a predetermined range, and repeating the foregoing for one or more additional wafers.Type: ApplicationFiled: December 20, 2018Publication date: May 2, 2019Inventors: Daniel Mark Dinneen, Steven T. Mayer
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Patent number: 10196753Abstract: Disclosed herein are methods and apparatuses for electroplating which employ seed layer detection. Such methods and related apparatuses may operate by selecting a wafer for processing, measuring from its surface one or more in-process color signals having one or more color components, calculating one or more metrics, each metric indicative of the difference between one of the in-process color signals and a corresponding set of reference color signals, determining whether an acceptable seed layer is present on the wafer surface based on whether a predetermined number of the one or more metrics are within an associated predetermined range which individually corresponds to that metric, and either electroplating the wafer when an acceptable seed layer is present or otherwise designating the wafer unacceptable for electroplating. The foregoing may then be repeated for one or more additional wafers to electroplate multiple wafers from a set of wafers.Type: GrantFiled: October 12, 2017Date of Patent: February 5, 2019Assignee: Lam Research CorporationInventors: Daniel Mark Dinneen, Steven T. Mayer
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Publication number: 20180202062Abstract: Apparatuses and methods are provided for depositing a metal layer on a wafer. A secondary weir is positioned at a region below the primary weir such that overflowed plating solution over the primary weir during electroplating flows in a substantially azimuthally uniform manner. Methods are provided for electroplating wafers by increasing flow rate between wafer processes while plating solution flows over a primary weir, remains in contact with the overflowing plating solution, and flows onto the secondary weir such that overflow is substantially azimuthally uniform.Type: ApplicationFiled: March 16, 2018Publication date: July 19, 2018Inventors: Daniel Mark Dinneen, Jingbin Feng
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Patent number: 9945044Abstract: Apparatuses and methods are provided for depositing a metal layer on a wafer. A secondary weir is positioned at a region below the primary weir such that overflowed plating solution over the primary weir during electroplating flows in a substantially azimuthally uniform manner. Methods are provided for electroplating wafers by increasing flow rate between wafer processes while plating solution flows over a primary weir, remains in contact with the overflowing plating solution, and flows onto the secondary weir such that overflow is substantially azimuthally uniform.Type: GrantFiled: November 6, 2013Date of Patent: April 17, 2018Assignee: Lam Research CorporationInventors: Daniel Mark Dinneen, Jingbin Feng
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Publication number: 20180038009Abstract: Disclosed herein are methods and apparatuses for electroplating which employ seed layer detection. Such methods and related apparatuses may operate by selecting a wafer for processing, measuring from its surface one or more in-process color signals having one or more color components, calculating one or more metrics, each metric indicative of the difference between one of the in-process color signals and a corresponding set of reference color signals, determining whether an acceptable seed layer is present on the wafer surface based on whether a predetermined number of the one or more metrics are within an associated predetermined range which individually corresponds to that metric, and either electroplating the wafer when an acceptable seed layer is present or otherwise designating the wafer unacceptable for electroplating. The foregoing may then be repeated for one or more additional wafers to electroplate multiple wafers from a set of wafers.Type: ApplicationFiled: October 12, 2017Publication date: February 8, 2018Inventors: Daniel Mark Dinneen, Steven T. Mayer
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Patent number: 9822460Abstract: Disclosed herein are methods and apparatuses for electroplating which employ seed layer detection. Such methods and related apparatuses may operate by selecting a wafer for processing, measuring from its surface one or more in-process color signals having one or more color components, calculating one or more metrics, each metric indicative of the difference between one of the in-process color signals and a corresponding set of reference color signals, determining whether an acceptable seed layer is present on the wafer surface based on whether a predetermined number of the one or more metrics are within an associated predetermined range which individually corresponds to that metric, and either electroplating the wafer when an acceptable seed layer is present or otherwise designating the wafer unacceptable for electroplating. The foregoing may then be repeated for one or more additional wafers to electroplate multiple wafers from a set of wafers.Type: GrantFiled: January 21, 2014Date of Patent: November 21, 2017Assignee: Lam Research CorporationInventors: Daniel Mark Dinneen, Steven T. Mayer
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Patent number: 9809898Abstract: Disclosed herein are electroplating systems for forming a layer of metal on a wafer which include an electroplating module and a wafer edge imaging system. The electroplating module may include a cell for containing an anode and an electroplating solution during electroplating, and a wafer holder for holding the wafer in the electroplating solution and rotating the wafer during electroplating. The wafer edge imaging system may include a wafer holder for holding and rotating the wafer through different azimuthal orientations, a camera oriented for obtaining multiple azimuthally separated images of a process edge of the wafer while it is held and rotated (the process edge corresponding to the outer edge of the layer of metal formed on the wafer), and image analysis logic for determining an edge exclusion distance, wherein the edge exclusion distance is a distance between the wafer's edge and the process edge.Type: GrantFiled: June 26, 2013Date of Patent: November 7, 2017Assignee: Lam Research CorporationInventors: Daniel Mark Dinneen, James E. Duncan
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Publication number: 20150206770Abstract: Disclosed herein are methods and apparatuses for electroplating which employ seed layer detection. Such methods and related apparatuses may operate by selecting a wafer for processing, measuring from its surface one or more in-process color signals having one or more color components, calculating one or more metrics, each metric indicative of the difference between one of the in-process color signals and a corresponding set of reference color signals, determining whether an acceptable seed layer is present on the wafer surface based on whether a predetermined number of the one or more metrics are within an associated predetermined range which individually corresponds to that metric, and either electroplating the wafer when an acceptable seed layer is present or otherwise designating the wafer unacceptable for electroplating. The foregoing may then be repeated for one or more additional wafers to electroplate multiple wafers from a set of wafers.Type: ApplicationFiled: January 21, 2014Publication date: July 23, 2015Inventors: Daniel Mark Dinneen, Steven T. Mayer
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Publication number: 20150122638Abstract: Apparatuses and methods are provided for depositing a metal layer on a wafer. A secondary weir is positioned at a region below the primary weir such that overflowed plating solution over the primary weir during electroplating flows in a substantially azimuthally uniform manner. Methods are provided for electroplating wafers by increasing flow rate between wafer processes while plating solution flows over a primary weir, remains in contact with the overflowing plating solution, and flows onto the secondary weir such that overflow is substantially azimuthally uniform.Type: ApplicationFiled: November 6, 2013Publication date: May 7, 2015Applicant: Lam Research CorporationInventors: Daniel Mark Dinneen, Jingbin Feng
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Publication number: 20150001087Abstract: Disclosed herein are electroplating systems for forming a layer of metal on a wafer which include an electroplating module and a wafer edge imaging system. The electroplating module may include a cell for containing an anode and an electroplating solution during electroplating, and a wafer holder for holding the wafer in the electroplating solution and rotating the wafer during electroplating. The wafer edge imaging system may include a wafer holder for holding and rotating the wafer through different azimuthal orientations, a camera oriented for obtaining multiple azimuthally separated images of a process edge of the wafer while it is held and rotated (the process edge corresponding to the outer edge of the layer of metal formed on the wafer), and image analysis logic for determining an edge exclusion distance, wherein the edge exclusion distance is a distance between the wafer's edge and the process edge.Type: ApplicationFiled: June 26, 2013Publication date: January 1, 2015Inventors: Daniel Mark Dinneen, James E. Duncan
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Patent number: 7690324Abstract: During fluid treatment of a substrate surface, a carrier/wafer assembly containing a substrate wafer closes the top of a microcell container. The carrier/wafer assembly and the container walls define a thin enclosed treatment volume that is filled with treating fluid, such as electroless plating solution. The thin fluid-treatment volume typically has a volume in a range of about from 100 ml to 500 ml. Preferably a container is heated and the treating fluid is pre-heated before being injected into the container. Preferably, the chemical composition, temperature, and other properties of fluid in the thin enclosed fluid-treatment volume are dynamically variable. A rinse shield and a rinse nozzle are located above the container. A carrier/wafer assembly in a rinse position substantially closes the top of the rinse shield.Type: GrantFiled: August 9, 2005Date of Patent: April 6, 2010Assignee: Novellus Systems, Inc.Inventors: Jingbin Feng, Steven T. Mayer, Daniel Mark Dinneen, Edmund B. Minshall, Christopher M. Bartlett, Eric G. Webb, R. Marshall Stowell, Mark T. Winslow, Avishai Kepten, Norman D. Kaplan, Richard K. Lyons, John B. Alexy