Patents by Inventor Daniel Porwol

Daniel Porwol has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210335687
    Abstract: An electronic component includes a mold layer and a semiconductor die including a low ohmic first portion and a high ohmic second portion. The low ohmic first portion has an active area. The high ohmic second portion is arranged on the mold layer.
    Type: Application
    Filed: April 22, 2021
    Publication date: October 28, 2021
    Inventors: Daniel Porwol, Thomas Fischer, Uwe Seidel, Anton Steltenpohl
  • Patent number: 10694584
    Abstract: A method for producing an infrared emitter arrangement is provided. The method includes providing a carrier. The carrier includes at least one infrared emitter structure at a first side of the carrier and at least one cutout at a second side of the carrier, said second side being situated opposite the first side of the carrier, wherein the at least one cutout extends from the second side of the carrier in the direction of the at least one infrared emitter structure. The method further includes securing an infrared filter layer structure at the second side of the carrier in such a way that the at least one cutout separates the at least one infrared emitter structure from the infrared filter layer structure.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: June 23, 2020
    Assignee: Infineon Technologies AG
    Inventors: Stephan Pindl, Daniel Porwol, Johann Strasser
  • Patent number: 10600690
    Abstract: A method for handling a product substrate includes bonding a carrier to the product substrate by: applying a layer of a temporary adhesive having a first coefficient of thermal expansion onto a surface of the carrier; and bonding the carrier to the product substrate using the applied temporary adhesive. A surface of the temporary adhesive is in direct contact to a surface of the product substrate. The temporary adhesive includes or is adjacent a filler material having a second coefficient of thermal expansion which is smaller than the first coefficient of thermal expansion, so that stress occurs inside the temporary adhesive layer or at an interface to the product substrate or the carrier during cooling down of the temporary adhesive layer.
    Type: Grant
    Filed: August 13, 2018
    Date of Patent: March 24, 2020
    Assignee: Infineon Technologies AG
    Inventors: Georg Meyer-Berg, Claus von Waechter, Michael Bauer, Holger Doepke, Dominic Maier, Daniel Porwol, Tobias Schmidt
  • Publication number: 20200023630
    Abstract: A device for debonding a structure from a main surface region of a carrier includes a tape for laminating to the structure, a first holder and a second holder for spanning the tape and to keep a tension of the tape. The second holder can be movable into a lifted position vertically offset to the main surface region of the carrier. The device can also include a deflecting-element for providing a deflection-line between the first holder and the second holder for deflecting the tape in response to moving the second holder into the lifted position. The deflecting-element can be moveable parallel to the carrier for moving the deflection-line parallel to the carrier and for debonding the structure, laminated to the tape, from the carrier.
    Type: Application
    Filed: July 8, 2019
    Publication date: January 23, 2020
    Inventors: Alfred Sigl, Dominic Maier, Daniel Porwol
  • Patent number: 10483133
    Abstract: A method for fabricating a semiconductor chip is disclosed. In an embodiment, the method includes providing a plurality of semiconductor chips, wherein each semiconductor chip comprises a first main face, a second main face opposite to the first main face and side faces connecting the first and second main faces, placing the semiconductor chips on a carrier with the second main faces facing the carrier and applying an encapsulation material by transfer molding thereby forming the semiconductor chip panel, wherein the encapsulation material is applied so that the side faces of the semiconductor chips are covered with the encapsulation material while the first main faces are not.
    Type: Grant
    Filed: April 3, 2018
    Date of Patent: November 19, 2019
    Assignee: Infineon Technologies AG
    Inventors: Daniel Porwol, Edward Fuergut
  • Patent number: 10332814
    Abstract: A bonded system includes a reconstituted wafer including a hygroscopic material. A moisture barrier layer is arranged over a surface of the reconstituted wafer. An adhesive layer is arranged over a surface of the moisture barrier opposite the reconstituted wafer. A carrier is arranged over a surface of the adhesive layer opposite the moisture barrier. The adhesive layer adhesively bonds the reconstituted wafer and the carrier together.
    Type: Grant
    Filed: February 18, 2016
    Date of Patent: June 25, 2019
    Assignee: Infineon Technologies AG
    Inventors: Claus Von Waechter, Christian Altschaeffl, Holger Doepke, Uwe Hoeckele, Franz Xaver Muehlbauer, Daniel Porwol, Tobias Schmidt, Christian Schweiger, Carsten Von Koblinski
  • Publication number: 20180350683
    Abstract: A method for handling a product substrate includes bonding a carrier to the product substrate by: applying a layer of a temporary adhesive having a first coefficient of thermal expansion onto a surface of the carrier; and bonding the carrier to the product substrate using the applied temporary adhesive. A surface of the temporary adhesive is in direct contact to a surface of the product substrate. The temporary adhesive includes or is adjacent a filler material having a second coefficient of thermal expansion which is smaller than the first coefficient of thermal expansion, so that stress occurs inside the temporary adhesive layer or at an interface to the product substrate or the carrier during cooling down of the temporary adhesive layer.
    Type: Application
    Filed: August 13, 2018
    Publication date: December 6, 2018
    Inventors: Georg Meyer-Berg, Claus von Waechter, Michael Bauer, Holger Doepke, Dominic Maier, Daniel Porwol, Tobias Schmidt
  • Patent number: 10056295
    Abstract: A method for handling a product substrate includes bonding a carrier to the product substrate. A layer of a permanent adhesive is applied onto a surface of the carrier. A structured intermediate layer is provided. The applied permanent adhesive bonds the carrier to the product substrate. The structured intermediate layer is arranged between the product substrate and the carrier. A surface of the structured intermediate layer and a surface of the permanent adhesive are in direct contact to a surface of the product substrate. The structured intermediate layer decreases a bonding strength between the product substrate and the carrier.
    Type: Grant
    Filed: January 20, 2016
    Date of Patent: August 21, 2018
    Assignee: Infineon Technologies AG
    Inventors: Georg Meyer-Berg, Claus von Waechter, Michael Bauer, Holger Doepke, Dominic Maier, Daniel Porwol, Tobias Schmidt
  • Publication number: 20180226276
    Abstract: A method for fabricating a semiconductor chip is disclosed. In an embodiment, the method includes providing a plurality of semiconductor chips, wherein each semiconductor chip comprises a first main face, a second main face opposite to the first main face and side faces connecting the first and second main faces, placing the semiconductor chips on a carrier with the second main faces facing the carrier and applying an encapsulation material by transfer molding thereby forming the semiconductor chip panel, wherein the encapsulation material is applied so that the side faces of the semiconductor chips are covered with the encapsulation material while the first main faces are not.
    Type: Application
    Filed: April 3, 2018
    Publication date: August 9, 2018
    Inventors: Daniel Porwol, Edward Fuergut
  • Patent number: 9988262
    Abstract: A method for fabricating an electronic device is disclosed. In one example, the method comprises providing a semiconductor wafer, forming a plurality of cavities into the semiconductor wafer, filling a stabilization material into the cavities, fabricating a temporary panel by applying a cap sheet onto the semiconductor wafer, the cap sheet covering the cavities, singulating the temporary panel into a plurality of semiconductor devices, fabricating an embedded wafer by embedding the semiconductor devices in an encapsulant, removing the cap sheet of each one of the semiconductor devices, and singulating the embedded wafer into a plurality of electronic devices.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: June 5, 2018
    Assignee: Infineon Technologies AG
    Inventors: Dominic Maier, Joachim Mahler, Daniel Porwol, Alfred Sigl
  • Patent number: 9981843
    Abstract: A method of producing a chip package is described. A plurality of chips is provided on a first wafer. Each chip has a cavity which opens to a first main face of the chip. The cavities are filled or covered temporarily. The chips are then singulated. The singulated chips are embedded in an encapsulation material, and then the cavities are re-exposed.
    Type: Grant
    Filed: April 26, 2016
    Date of Patent: May 29, 2018
    Assignee: Infineon Technologies AG
    Inventors: Dominic Maier, Alfons Dehe, Thomas Kilger, Markus Menath, Franz Xaver Muehlbauer, Daniel Porwol, Juergen Wagner
  • Publication number: 20180146512
    Abstract: A method for producing an infrared emitter arrangement is provided. The method includes providing a carrier. The carrier includes at least one infrared emitter structure at a first side of the carrier and at least one cutout at a second side of the carrier, said second side being situated opposite the first side of the carrier, wherein the at least one cutout extends from the second side of the carrier in the direction of the at least one infrared emitter structure. The method further includes securing an infrared filter layer structure at the second side of the carrier in such a way that the at least one cutout separates the at least one infrared emitter structure from the infrared filter layer structure.
    Type: Application
    Filed: November 21, 2017
    Publication date: May 24, 2018
    Inventors: Stephan Pindl, Daniel Porwol, Johann Strasser
  • Patent number: 9953846
    Abstract: A method for fabricating a semiconductor chip is disclosed. In an embodiment, the method includes providing a carrier, providing a plurality of semiconductor chips, the semiconductor chips each including a first main face and a second main face opposite to the first main face and side faces connecting the first and second main faces, placing the semiconductor chips on the carrier with the second main faces facing the carrier, and applying an encapsulation material to the side faces of the semiconductor chips.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: April 24, 2018
    Assignee: Infineon Technologies AG
    Inventors: Daniel Porwol, Edward Fuergut
  • Publication number: 20180086632
    Abstract: A method for fabricating an electronic device is disclosed. In one example, the method comprises providing a semiconductor wafer, forming a plurality of cavities into the semiconductor wafer, filling a stabilization material into the cavities, fabricating a temporary panel by applying a cap sheet onto the semiconductor wafer, the cap sheet covering the cavities, singulating the temporary panel into a plurality of semiconductor devices, fabricating an embedded wafer by embedding the semiconductor devices in an encapsulant, removing the cap sheet of each one of the semiconductor devices, and singulating the embedded wafer into a plurality of electronic devices.
    Type: Application
    Filed: September 14, 2017
    Publication date: March 29, 2018
    Applicant: Infineon Technologies AG
    Inventors: Dominic Maier, Joachim Mahler, Daniel Porwol, Alfred Sigl
  • Publication number: 20160379847
    Abstract: A method for fabricating a semiconductor chip is disclosed. In an embodiment, the method includes providing a carrier, providing a plurality of semiconductor chips, the semiconductor chips each including a first main face and a second main face opposite to the first main face and side faces connecting the first and second main faces, placing the semiconductor chips on the carrier with the second main faces facing the carrier, and applying an encapsulation material to the side faces of the semiconductor chips.
    Type: Application
    Filed: September 9, 2016
    Publication date: December 29, 2016
    Inventors: Daniel Porwol, Edward Fuergut
  • Publication number: 20160311679
    Abstract: A method of producing a chip package is described. A plurality of chips is provided on a first wafer. Each chip has a cavity which opens to a first main face of the chip. The cavities are filled or covered temporarily. The chips are then singulated. The singulated chips are embedded in an encapsulation material, and then the cavities are re-exposed.
    Type: Application
    Filed: April 26, 2016
    Publication date: October 27, 2016
    Inventors: Dominic Maier, Alfons Dehe, Thomas Kilger, Markus Menath, Franz Xaver Muehlbauer, Daniel Porwol, Juergen Wagner
  • Patent number: 9455160
    Abstract: The method comprises providing a carrier, providing a plurality of semiconductor chips, the semiconductor chips each comprising a first main face and a second main face opposite to the first main face and side faces connecting the first and second main faces, placing the semiconductor chips on the carrier with the second main faces facing the carrier, and applying an encapsulation material to the side faces of the semiconductor chips.
    Type: Grant
    Filed: January 14, 2013
    Date of Patent: September 27, 2016
    Assignee: Infineon Technologies AG
    Inventors: Daniel Porwol, Edward Fuergut
  • Publication number: 20160247739
    Abstract: A bonded system includes a reconstituted wafer including a hygroscopic material. A moisture barrier layer is arranged over a surface of the reconstituted wafer. An adhesive layer is arranged over a surface of the moisture barrier opposite the reconstituted wafer. A carrier is arranged over a surface of the adhesive layer opposite the moisture barrier. The adhesive layer adhesively bonds the reconstituted wafer and the carrier together.
    Type: Application
    Filed: February 18, 2016
    Publication date: August 25, 2016
    Applicant: Infineon Technologies AG
    Inventors: Claus Von Waechter, Christian Altschaeffl, Holger Doepke, Uwe Hoeckele, Franz Xaver Muehlbauer, Daniel Porwol, Tobias Schmidt, Christian Schweiger, Carsten Von Koblinski
  • Publication number: 20160218039
    Abstract: A method for handling a product substrate includes bonding a carrier to the product substrate. A layer of a permanent adhesive is applied onto a surface of the carrier. A structured intermediate layer is provided. The applied permanent adhesive bonds the carrier to the product substrate. The structured intermediate layer is arranged between the product substrate and the carrier. A surface of the structured intermediate layer and a surface of the permanent adhesive are in direct contact to a surface of the product substrate. The structured intermediate layer decreases a bonding strength between the product substrate and the carrier.
    Type: Application
    Filed: January 20, 2016
    Publication date: July 28, 2016
    Inventors: Georg Meyer-Berg, Claus von Waechter, Michael Bauer, Holger Doepke, Dominic Maier, Daniel Porwol, Tobias Schmidt
  • Publication number: 20160155680
    Abstract: A semiconductor package includes a semiconductor chip having a first main face and side faces, an encapsulation covering at least the side faces of the semiconductor chip, and an electrical redistribution structure arranged over the first main face of the semiconductor chip. A first main surface of the semiconductor package includes a surface of the electrical redistribution structure and a surface of the encapsulation.
    Type: Application
    Filed: November 30, 2015
    Publication date: June 2, 2016
    Inventors: Andreas Stueckjuergen, Rainer Leuschner, Daniel Porwol