Patents by Inventor Daniel Wayne Levesque, JR.

Daniel Wayne Levesque, JR. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230402337
    Abstract: In some embodiments, a method comprises forming a pilot hole or damage track through a laminate glass structure using a laser. The laminate glass structure comprising a first layer and a second layer adjacent to the first layer. The first layer is formed from a first glass composition. The second layer is formed from a second glass composition different from the first glass composition. After forming the pilot hole, the laminate glass structure is exposed to etching conditions that etch the first glass composition at a first etching rate and the second glass composition at a second etching rate, wherein the first etch rate is different from the second etch rate, to form an etched hole.
    Type: Application
    Filed: November 9, 2021
    Publication date: December 14, 2023
    Inventors: Jin Su Kim, Daniel Wayne Levesque, Jr., Aize Li, Heather Nicole Vanselous
  • Publication number: 20230341986
    Abstract: Embodiments are related generally to display devices, and more particularly to displays or display tiles having electrodes that extend from a first surface to a second surface of a substrate.
    Type: Application
    Filed: September 23, 2020
    Publication date: October 26, 2023
    Inventors: Ya-Huei Chang, Daniel Wayne Levesque, JR., Jen-Chieh Lin, Lu Zhang
  • Patent number: 11608291
    Abstract: The described embodiments relate generally to a micro-perforated panel systems and methods for noise abatement and method of making a micro-perforated panel system. In particular, embodiments relate to glass micro-perforated panel systems and methods for their construction.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: March 21, 2023
    Assignee: CORNING INCORPORATED
    Inventors: Andres Covarrubias Jaramillo, Daniel Wayne Levesque, Jr., Johannes Moll, Michael S Pambianchi, Prashanth Abraham Vanniamparambil
  • Patent number: 10756003
    Abstract: A process comprises bonding a semiconductor wafer to an inorganic wafer. The semiconductor wafer is opaque to a wavelength of light to which the inorganic wafer is transparent. After the bonding, a damage track is formed in the inorganic wafer using a laser that emits the wavelength of light. The damage track in the inorganic wafer is enlarged to form a hole through the inorganic wafer by etching. The hole terminates at an interface between the semiconductor wafer and the inorganic wafer. An article is also provided, comprising a semiconductor wafer bonded to an inorganic wafer. The semiconductor wafer is opaque to a wavelength of light to which the inorganic wafer is transparent. The inorganic wafer has a hole formed through the inorganic wafer. The hole terminates at an interface between the semiconductor wafer and the inorganic wafer.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: August 25, 2020
    Assignee: Corning Incorporated
    Inventors: Daniel Wayne Levesque, Jr., Garrett Andrew Piech, Aric Bruce Shorey
  • Publication number: 20200262742
    Abstract: The described embodiments relate generally to a micro-perforated panel systems and methods for noise abatement and method of making a micro-perforated panel system. In particular, embodiments relate to glass micro-perforated panel systems and methods for their construction.
    Type: Application
    Filed: October 31, 2017
    Publication date: August 20, 2020
    Inventors: Andres Covarrubias Jaramillo, Daniel Wayne Levesque, Jr., Johannes Moll, Michael S Pambianchi, Prashanth Abraham Vanniamparambil
  • Publication number: 20190312067
    Abstract: Embodiments are related to systems and methods for forming vias in a substrate, and more particularly to systems and methods for reducing substrate surface disruption during via formation.
    Type: Application
    Filed: May 7, 2018
    Publication date: October 10, 2019
    Inventors: Sean Matthew Garner, Daniel Wayne Levesque, JR., Robert George Manley, Garrett Andrew Piech, Rajesh Vaddi, Heather Nicole Vanselous
  • Patent number: 10424606
    Abstract: Embodiments are related to systems and methods for forming vias in a substrate, and more particularly to systems and methods for reducing substrate surface disruption during via formation.
    Type: Grant
    Filed: May 7, 2018
    Date of Patent: September 24, 2019
    Assignee: Corning Incorporated
    Inventors: Sean Matthew Garner, Daniel Wayne Levesque, Jr., Robert George Manley, Garrett Andrew Piech, Rajesh Vaddi, Heather Nicole Vanselous
  • Patent number: 10366904
    Abstract: Articles including a glass-based substrate with holes, semiconductor packages including an article with holes, and methods of fabricating holes in a substrate are disclosed. In one embodiment, an article includes a glass-based substrate having a first surface, a second surface, and at least one hole extending from the first surface. The at least one hole has an interior wall having a surface roughness Ra that is less than or equal to 1 ?m. The at least one hole has a first opening having a first diameter that is present the first surface. A first plane is defined by the first surface of the glass-based substrate based on an average thickness of the glass-based substrate. A ratio of a depression depth to the first diameter of the at least one hole is less than or equal to 0.007.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: July 30, 2019
    Assignee: Corning Incorporated
    Inventors: Andres Covarrubias Jaramillo, Yuhui Jin, Frank Andrew Kramer, IV, Ekaterina Aleksandrovna Kuksenkova, Daniel Wayne Levesque, Jr., Garrett Andrew Piech, Aric Bruce Shorey, Robert Stephen Wagner
  • Publication number: 20190119150
    Abstract: A method for processing a transparent workpiece includes forming a closed contour line having a plurality of defects in the transparent workpiece such that the closed contour line defines a closed contour. Forming the closed contour line includes directing a pulsed laser beam through an aspheric optical element and into the transparent workpiece such that a portion of the pulsed laser beam directed into the transparent workpiece generates an induced absorption within the transparent workpiece, the induced absorption producing a defect within the transparent workpiece, and translating the transparent workpiece and the pulsed laser beam relative to each other along the closed contour line. The method further includes etching the transparent workpiece with a chemical etching solution at an etching rate of about 2.
    Type: Application
    Filed: October 17, 2018
    Publication date: April 25, 2019
    Inventors: Robert Carl Burket, Daniel Wayne Levesque, JR., Sasha Marjanovic, Garrett Andrew Piech, Heather Nicole Vanselous, Kristopher Allen Wieland
  • Publication number: 20190074240
    Abstract: A process comprises bonding a semiconductor wafer to an inorganic wafer. The semiconductor wafer is opaque to a wavelength of light to which the inorganic wafer is transparent. After the bonding, a damage track is formed in the inorganic wafer using a laser that emits the wavelength of light. The damage track in the inorganic wafer is enlarged to form a hole through the inorganic wafer by etching. The hole terminates at an interface between the semiconductor wafer and the inorganic wafer. An article is also provided, comprising a semiconductor wafer bonded to an inorganic wafer. The semiconductor wafer is opaque to a wavelength of light to which the inorganic wafer is transparent. The inorganic wafer has a hole formed through the inorganic wafer. The hole terminates at an interface between the semiconductor wafer and the inorganic wafer.
    Type: Application
    Filed: November 2, 2018
    Publication date: March 7, 2019
    Inventors: Daniel Wayne Levesque, JR., Garrett Andrew Piech, Aric Bruce Shorey
  • Patent number: 10134657
    Abstract: A process comprises bonding a semiconductor wafer to an inorganic wafer. The semiconductor wafer is opaque to a wavelength of light to which the inorganic wafer is transparent. After the bonding, a damage track is formed in the inorganic wafer using a laser that emits the wavelength of light. The damage track in the inorganic wafer is enlarged to form a hole through the inorganic wafer by etching. The hole terminates at an interface between the semiconductor wafer and the inorganic wafer. An article is also provided, comprising a semiconductor wafer bonded to an inorganic wafer. The semiconductor wafer is opaque to a wavelength of light to which the inorganic wafer is transparent. The inorganic wafer has a hole formed through the inorganic wafer. The hole terminates at an interface between the semiconductor wafer and the inorganic wafer.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: November 20, 2018
    Assignee: Corning Incorporated
    Inventors: Daniel Wayne Levesque, Jr., Garrett Andrew Piech, Aric Bruce Shorey
  • Patent number: 10077206
    Abstract: A method of forming a glass substrate includes providing a glass substrate having alumina, translating a pulsed laser beam on the glass substrate to form one or more pilot holes, contacting the glass substrate with an etching solution, and providing agitation. The etching solution has a pH from about 0 to about 2.0, and an etch rate is less than about 3 ?m/min. A glass substrate is disclosed having a first surface and a second surface opposite the first surface in a thickness direction, and at least one hole penetrating the first surface, wherein the at least one hole has been etched by an etching solution. A greatest distance d1 between (1) a first plane that contacts the first surface in regions that do not have the at least one hole or a deviation in a thickness of the substrate surrounding the at least one hole and (2) a surface of the deviation recessed from the first plane is less than or equal to about 0.2 ?m.
    Type: Grant
    Filed: June 9, 2016
    Date of Patent: September 18, 2018
    Assignee: Corning Incorporated
    Inventors: Thomas Michael Castle, Tian Huang, Yuhui Jin, Daniel Wayne Levesque, Jr., Tammy Lynn Petriwsky
  • Publication number: 20180105455
    Abstract: A device includes a sheet of high purity fused silica that has a thickness of less than 500 ?m, where the sheet includes features in the sheet, wherein the features have a cross-sectional dimension of less than 50 ?m and a depth of at least 100 nm, wherein the features are spaced apart from one another by a distance of less than 50 ?m, and wherein the silica is free of indicia of grinding and polishing.
    Type: Application
    Filed: October 13, 2017
    Publication date: April 19, 2018
    Inventors: Daniel Wayne Levesque, JR., Barada Kanta Nayak, Kristopher Allen Wieland
  • Publication number: 20180068868
    Abstract: Articles including a glass-based substrate with holes, semiconductor packages including an article with holes, and methods of fabricating holes in a substrate are disclosed. In one embodiment, an article includes a glass-based substrate having a first surface, a second surface, and at least one hole extending from the first surface. The at least one hole has an interior wall having a surface roughness Ra that is less than or equal to 1 ?m. The at least one hole has a first opening having a first diameter that is present the first surface. A first plane is defined by the first surface of the glass-based substrate based on an average thickness of the glass-based substrate. A ratio of a depression depth to the first diameter of the at least one hole is less than or equal to 0.007.
    Type: Application
    Filed: September 6, 2017
    Publication date: March 8, 2018
    Inventors: Andres Covarrubias Jaramillo, Yuhui Jin, Frank Andrew Kramer, IV, Ekaterina Aleksandrovna Kuksenkova, Daniel Wayne Levesque, JR., Garrett Andrew Piech, Aric Bruce Shorey, Robert Stephen Wagner
  • Publication number: 20180005922
    Abstract: A process comprises bonding a semiconductor wafer to an inorganic wafer. The semiconductor wafer is opaque to a wavelength of light to which the inorganic wafer is transparent. After the bonding, a damage track is formed in the inorganic wafer using a laser that emits the wavelength of light. The damage track in the inorganic wafer is enlarged to form a hole through the inorganic wafer by etching. The hole terminates at an interface between the semiconductor wafer and the inorganic wafer. An article is also provided, comprising a semiconductor wafer bonded to an inorganic wafer. The semiconductor wafer is opaque to a wavelength of light to which the inorganic wafer is transparent. The inorganic wafer has a hole formed through the inorganic wafer. The hole terminates at an interface between the semiconductor wafer and the inorganic wafer.
    Type: Application
    Filed: June 22, 2017
    Publication date: January 4, 2018
    Inventors: Daniel Wayne Levesque, JR., Garrett Andrew Piech, Aric Bruce Shorey