Patents by Inventor David Kahler

David Kahler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11915198
    Abstract: A system for patient data exchange is provided and includes a plurality of sensors monitoring a patient according to a default sensor configuration, and a patient data exchange engine that receives a request comprising one or more parameters, identifies at least one applicable sensor from the plurality of sensors based on the one or more parameters, and reconfigures the at least one applicable sensor from the default sensor configuration to a different sensor configuration in accordance with the one or more parameters to generate applicable sensor data responsive to the request. In specific embodiments, the patient data exchange engine further computes a monetary value for the generated sensor data based at least on an attribute of the patient and an attribute of the sensor data.
    Type: Grant
    Filed: October 31, 2022
    Date of Patent: February 27, 2024
    Assignee: NANTHEALTH, INC.
    Inventors: David Dyell, Christopher Rogowski, Scott Kahler, Jennifer Milan
  • Patent number: 10629767
    Abstract: An integrated circuit includes a substrate material that includes an epitaxial layer, wherein the substrate material and the epitaxial layer form a first semiconductor material with the epitaxial layer having a first conductivity type. At least one nanowire comprising a second semiconductor material having a second conductivity type doped differently than the first conductivity type of the first semiconductor material forms a junction crossing region with the first semiconductor material. The nanowire and the first semiconductor material form an avalanche photodiode (APD) in the junction crossing region to enable single photon detection. In an alternative configuration, the APD is formed as a p-i-n crossing region where n represents an n-type material, i represents an intrinsic layer, and p represents a p-type material.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: April 21, 2020
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Narsingh B. Singh, John V. Veliadis, Bettina Nechay, Andre Berghmans, David J. Knuteson, David Kahler, Brian Wagner, Marc Sherwin
  • Publication number: 20190131480
    Abstract: An integrated circuit includes a substrate material that includes an epitaxial layer, wherein the substrate material and the epitaxial layer form a first semiconductor material with the epitaxial layer having a first conductivity type. At least one nanowire comprising a second semiconductor material having a second conductivity type doped differently than the first conductivity type of the first semiconductor material forms a junction crossing region with the first semiconductor material. The nanowire and the first semiconductor material form an avalanche photodiode (APD) in the junction crossing region to enable single photon detection. In an alternative configuration, the APD is formed as a p-i-n crossing region where n represents an n-type material, i represents an intrinsic layer, and p represents a p-type material.
    Type: Application
    Filed: December 27, 2018
    Publication date: May 2, 2019
    Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: NARSINGH B. SINGH, JOHN V. VELIADIS, BETTINA NECHAY, ANDRE BERGHMANS, DAVID J. KNUTESON, DAVID KAHLER, BRIAN WAGNER, MARC SHERWIN
  • Patent number: 10211359
    Abstract: An integrated circuit includes a substrate material that includes an epitaxial layer, wherein the substrate material and the epitaxial layer form a first semiconductor material with the epitaxial layer having a first conductivity type. At least one nanowire comprising a second semiconductor material having a second conductivity type doped differently than the first conductivity type of the first semiconductor material forms a junction crossing region with the first semiconductor material. The nanowire and the first semiconductor material form an avalanche photodiode (APD) in the junction crossing region to enable single photon detection. In an alternative configuration, the APD is formed as a p-i-n crossing region where n represents an n-type material, i represents an intrinsic layer, and p represents a p-type material.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: February 19, 2019
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Narsingh B. Singh, John V. Veliadis, Bettina Nechay, Andre Berghmans, David J. Knuteson, David Kahler, Brian Wagner, Marc Sherwin
  • Publication number: 20170194527
    Abstract: An integrated circuit includes a substrate material that includes an epitaxial layer, wherein the substrate material and the epitaxial layer form a first semiconductor material with the epitaxial layer having a first conductivity type. At least one nanowire comprising a second semiconductor material having a second conductivity type doped differently than the first conductivity type of the first semiconductor material forms a junction crossing region with the first semiconductor material. The nanowire and the first semiconductor material form an avalanche photodiode (APD) in the junction crossing region to enable single photon detection. In an alternative configuration, the APD is formed as a p-i-n crossing region where n represents an n-type material, i represents an intrinsic layer, and p represents a p-type material.
    Type: Application
    Filed: November 18, 2016
    Publication date: July 6, 2017
    Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: NARSINGH B. SINGH, JOHN V. VELIADIS, BETTINA NECHAY, ANDRE BERGHMANS, DAVID J. KNUTESON, DAVID KAHLER, BRIAN WAGNER, MARC SHERWIN
  • Patent number: 9570646
    Abstract: An integrated circuit includes a substrate material that includes an epitaxial layer, wherein the substrate material and the epitaxial layer form a first semiconductor material with the epitaxial layer having a first conductivity type. At least one nanowire comprising a second semiconductor material having a second conductivity type doped differently than the first conductivity type of the first semiconductor material forms a junction crossing region with the first semiconductor material. The nanowire and the first semiconductor material form an avalanche photodiode (APD) in the junction crossing region to enable single photon detection. In an alternative configuration, the APD is formed as a p-i-n crossing region where n represents an n-type material, i represents an intrinsic layer, and p represents a p-type material.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: February 14, 2017
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Narsingh B. Singh, John V. Veliadis, Bettina Nechay, Andre Berghmans, David J. Knuteson, David Kahler, Brian Wagner, Marc Sherwin
  • Publication number: 20150236186
    Abstract: An integrated circuit includes a substrate material that includes an epitaxial layer, wherein the substrate material and the epitaxial layer form a first semiconductor material with the epitaxial layer having a first conductivity type. At least one nanowire comprising a second semiconductor material having a second conductivity type doped differently than the first conductivity type of the first semiconductor material forms a junction crossing region with the first semiconductor material. The nanowire and the first semiconductor material form an avalanche photodiode (APD) in the junction crossing region to enable single photon detection. In an alternative configuration, the APD is formed as a p-i-n crossing region where n represents an n-type material, i represents an intrinsic layer, and p represents a p-type material.
    Type: Application
    Filed: February 20, 2014
    Publication date: August 20, 2015
    Applicant: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: NARSINGH B. SINGH, John V. Veliadis, Bettina Nechay, Andre Berghmans, David J. Knuteson, David Kahler, Brian Wagner, Marc Sherwin
  • Patent number: 8278666
    Abstract: The disclosure relates to a high purity 2H-SiC composition and methods for making same. The embodiments represented herein apply to both thin film and bulk growth of 2H-SiC. According to one embodiment, the disclosure relates to doping an underlying substrate or support layer with one or more surfactants to nucleate and grow high purity 2H-SiC. In another embodiment, the disclosure relates to a method for preparing 2H-SiC compositions by nucleating 2H-SiC on another SiC polytype using one or more surfactants. The surfactants can include AlN, Te, Sb and similar compositions. These nucleate SiC into disc form which changes to hexagonal 2H-SiC material.
    Type: Grant
    Filed: June 23, 2010
    Date of Patent: October 2, 2012
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Narsingh B. Singh, Sean R. McLaughlin, Thomas J. Knight, Robert M. Young, Brian P. Wagner, David A. Kahler, Andre E. Berghmans, David J. Knuteson, Ty R. McNutt, Jerry W. Hedrick, Jr., George M. Bates, Kenneth Petrosky
  • Patent number: 7888248
    Abstract: A method for growing a SiC-containing film on a Si substrate is disclosed. The SiC-containing film can be formed on a Si substrate by, for example, plasma sputtering, chemical vapor deposition, or atomic layer deposition. The thus-grown SiC-containing film provides an alternative to expensive SiC wafers for growing semiconductor crystals.
    Type: Grant
    Filed: July 13, 2007
    Date of Patent: February 15, 2011
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Narsingh Bahadur Singh, Brian P. Wagner, David J. Knuteson, David Kahler, Andre E. Berghmans, Michael Aumer, Jerry W. Hedrick, Marc E. Sherwin, Michael M. Fitelson, Mark S. Usefara, Sean McLaughlin, Travis Randall, Thomas J. Knight
  • Patent number: 7855108
    Abstract: A Si(1-x)MxC material for heterostructures on SiC can be grown by CVD, PVD and MOCVD. SIC doped with a metal such as Al modifies the bandgap and hence the heterostructure. Growth of SiC Si(1-x)MxC heterojunctions using SiC and metal sources permits the fabrication of improved HFMTs (high frequency mobility transistors), HBTs (heterojunction bipolar transistors), and HEMTs (high electron mobility transistors).
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: December 21, 2010
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Narsingh B. Singh, Brian P. Wagner, David J. Knuteson, Michael E. Aumer, Andre Berghmans, Darren Thomson, David Kahler
  • Patent number: 7830644
    Abstract: Methods of producing polycrystalline and single crystal dielectrics are disclosed, including dielectrics comprising CaCu3Ti4O12 or La3Ga5SiO4. Superior single crystals are manufactured with improved crystallinity by atomic lattice constant adjustments to the dielectric and to the substrate on which it is grown. Dielectric materials made according to the disclosed methods are useful for manufacture of energy storage devices, e.g. capacitors.
    Type: Grant
    Filed: March 5, 2007
    Date of Patent: November 9, 2010
    Assignee: Northop Grumman Systems Corporation
    Inventors: Narsingh B. Singh, John J. Talvacchio, Marc Sherwin, Andre Berghmans, David J. Knuteson, David Kahler, Brian Wagner, John D. Adam
  • Publication number: 20100192840
    Abstract: A Si(1-x)MxC material for heterostructures on SiC can be grown by CVD, PVD and MOCVD. SIC doped with a metal such as Al modifies the bandgap and hence the heterostructure. Growth of SiC Si(1-x)MxC heterojunctions using SiC and metal sources permits the fabrication of improved HFMTs (high frequency mobility transistors), HBTs (heterojunction bipolar transistors), and HEMTs (high electron mobility transistors).
    Type: Application
    Filed: February 26, 2010
    Publication date: August 5, 2010
    Applicant: Northrop Grumman Systems Corporation
    Inventors: Narsingh B. Singh, Brian P. Wagner, David J. Knuteson, Michael E. Aumer, Andre Berghmans, Darren Thomson, David Kahler
  • Patent number: 7737534
    Abstract: A process is provided for fabricating a semiconductor device having a germanium nanofilm layer that is selectively deposited on a silicon substrate in discrete regions or patterns. A semiconductor device is also provided having a germanium film layer that is disposed in desired regions or having desired patterns that can be prepared in the absence of etching and patterning the germanium film layer. A process is also provided for preparing a semiconductor device having a silicon substrate having one conductivity type and a germanium nanofilm layer of a different conductivity type. Semiconductor devices are provided having selectively grown germanium nanofilm layer, such as diodes including light emitting diodes, photodetectors, and like. The method can also be used to make advanced semiconductor devices such as CMOS devices, MOSFET devices, and the like.
    Type: Grant
    Filed: June 10, 2008
    Date of Patent: June 15, 2010
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Sean R. McLaughlin, Narsingh Bahadur Singh, Brian Wagner, Andre Berghmans, David J. Knuteson, David Kahler, Anthony A. Margarella
  • Patent number: 7683400
    Abstract: A Si(1-x)MxC material for heterostructures on SiC can be grown by CVD, PVD and MOCVD. SIC doped with a metal such as Al modifies the bandgap and hence the heterostructure. Growth of SiC Si(1-x)MxC heterojunctions using SiC and metal sources permits the fabrication of improved HFMTs (high frequency mobility transistors), HBTs (heterojunction bipolar transistors), and HEMTs (high electron mobility transistors).
    Type: Grant
    Filed: June 26, 2006
    Date of Patent: March 23, 2010
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Narsingh B. Singh, Brian P. Wagner, David J. Knuteson, Michael E. Aumer, Andre Berghmans, Darren Thomson, David Kahler
  • Publication number: 20090302426
    Abstract: A process is provided for fabricating a semiconductor device having a germanium nanofilm layer that is selectively deposited on a silicon substrate in discrete regions or patterns. A semiconductor device is also provided having a germanium film layer that is disposed in desired regions or having desired patterns that can be prepared in the absence of etching and patterning the germanium film layer. A process is also provided for preparing a semiconductor device having a silicon substrate having one conductivity type and a germanium nanofilm layer of a different conductivity type. Semiconductor devices are provided having selectively grown germanium nanofilm layer, such as diodes including light emitting diodes, photodetectors, and like. The method can also be used to make advanced semiconductor devices such as CMOS devices, MOSFET devices, and the like.
    Type: Application
    Filed: June 10, 2008
    Publication date: December 10, 2009
    Inventors: Sean R. McLaughlin, Narsingh Bahadur Singh, Brian Wagner, Andre Berghmans, David J. Knuteson, David Kahler, Anthony A. Margarella
  • Publication number: 20090220801
    Abstract: The disclosure relates to a method and apparatus for growth of high-purity 6H SiC single crystal using a sputtering technique. In one embodiment, the disclosure relates to a method for depositing a high purity 6H-SiC single crystal film on a substrate, the method including: providing a silicon substrate having an etched surface; placing the substrate and an SiC source in a deposition chamber; achieving a first vacuum level in the deposition chamber; pressurizing the chamber with a gas; depositing the SiC film directly on the etched silicon substrate from a sputtering source by: heating the substrate to a temperature below silicon melting point, using a low energy plasma in the deposition chamber; and depositing a layer of hexagonal SiC film on the etched surface of the substrate.
    Type: Application
    Filed: February 29, 2008
    Publication date: September 3, 2009
    Inventors: Brian Wagner, Travis J. Randall, Thomas J. Knight, David J. Knuteson, David Kahler, Andre E. Berghmans, Sean R. McLaughlin, Narsingh B. Singh, Mark Usefara
  • Patent number: 7525099
    Abstract: A nuclear radiation detection system using narrowband UV crystal filters is disclosed. Since the photons produced during the decay of ?- and ?-radiation can be detected in the spectral range of about 200-350 nm (the ultraviolet range), UV filter based photo sensors are utilized for detection. The nuclear radiation detection system comprises an optical assembly capable of focusing on a source of radiation, a UV filter assembly having a narrowband UV crystal filter and positioned to receive light transmitted through the optical assembly, and a light detector positioned to receive light transmitted through the UV filter assembly. The narrowband UV crystal filter is fabricated from crystals selected from the group consisting of nickel fluorosilicate, nickel fluoroborate, and potassium nickel sulfate. The nickel fluorosilicate, nickel fluoroborate, and potassium nickel sulfate may be doped to achieve even narrower band filter.
    Type: Grant
    Filed: January 30, 2007
    Date of Patent: April 28, 2009
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Narsingh Bahadur Singh, Aaron A. Pesetski, Andre Berghmans, Brian P. Wagner, David Kahler, David J. Knuteson, Darren Thomson
  • Publication number: 20090014756
    Abstract: A method for growing a SiC-containing film on a Si substrate is disclosed. The SiC-containing film can be formed on a Si substrate by, for example, plasma sputtering, chemical vapor deposition, or atomic layer deposition. The thus-grown SiC-containing film provides an alternative to expensive SiC wafers for growing semiconductor crystals.
    Type: Application
    Filed: July 13, 2007
    Publication date: January 15, 2009
    Inventors: Narsingh Bahadur Singh, Brian P. Wagner, David J. Knuteson, David Kahler, Andre E. Berghmans, Michael Aumer, Jerry W. Hedrick, Marc E. Sherwin, Michael M. Fitelson, Mark S. Usefara, Sean McLaughlin, Travis Randall, Thomas J. Knight
  • Publication number: 20080218940
    Abstract: Methods of producing polycrystalline and single crystal dielectrics are disclosed, including dielectrics comprising CaCu3Ti4O12 or La3Ga5SiO4. Superior single crystals are manufactured with improved crystallinity by atomic lattice constant adjustments to the dielectric and to the substrate on which it is grown. Dielectric materials made according to the disclosed methods are useful for manufacture of energy storage devices, e.g. capacitors.
    Type: Application
    Filed: March 5, 2007
    Publication date: September 11, 2008
    Applicant: Northrop Grumman Systems Corporation
    Inventors: Narsingh B. Singh, John J. Talvacchio, Marc Sherwin, Andre Berghmans, David J. Knuteson, David Kahler, Brian Wagner, John D. Adam
  • Publication number: 20080206121
    Abstract: A substrate and method for growing a semi-conductive crystal on an alloy film such as (AIN)x(SiC)(1-x) without any buffer layer is disclosed. The (AIN)x(SiC)(1-x) alloy film can be formed on a SiC substrate by a vapor deposition process using AIN and SiC powder as starting materials. The (AIN)x(SiC)(1-x) alloy film provides a better lattice match for GaN or SiC epitaxial growth and reduces defects in epitaxially grown GaN with better lattice match and chemistry.
    Type: Application
    Filed: April 18, 2008
    Publication date: August 28, 2008
    Inventors: Narsingh Bahadur Singh, Brian Wagner, Mike Aumer, Darren Thomson, David Kahler, Andre Berghmans, David J. Knuteson