Patents by Inventor David Russell Hoag
David Russell Hoag has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230402549Abstract: A number of Monolithic Microwave Integrated Circuit (MMIC) devices including combinations of PIN and Schottky diodes, with integrated passive electrical components fabricated and electrically connected among them, are described herein, along with new process techniques for forming the MMIC devices. In one example, a monolithic semiconductor includes a substrate, a plurality of layers of semiconductor materials over the substrate, Schottky and Ohmic contacts on a first subset of the plurality of layers for a Schottky diode, and PIN diode Ohmic contacts on a second subset of the plurality of layers for a PIN diode. The device can also include an etch stop layer between the first subset of the plurality of layers and the second subset of the plurality of layers. The etch stop layer facilitates selective etching and isolation of the Schottky diode from the PIN diode by consecutive etchings.Type: ApplicationFiled: June 9, 2022Publication date: December 14, 2023Inventors: Belinda Simone Edmee Piernas, David Russell Hoag
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Publication number: 20220165645Abstract: Semiconductor devices are described. In one example, the semiconductor device includes a substrate, a layer of first semiconductor material over the substrate, a layer of second semiconductor material over the layer of first semiconductor material, a first metal contact formed on the layer of first semiconductor material, a second metal contact formed on the layer of second semiconductor material, and a metal via that extends from a backside of the substrate, through the substrate, through the layer of first semiconductor material, and contacts a bottom surface of the first metal contact. In this configuration, a direct electrical connection can be achieved between the backside of the substrate and the metal contact on the layer of first semiconductor material without the need for an additional metal connection, such as a metal air bridge, to the metal contact.Type: ApplicationFiled: February 8, 2022Publication date: May 26, 2022Inventors: Andrzej Rozbicki, Belinda Simone Edmee Piernas, David Russell Hoag, James Joseph Brogle, Timothy Edward Boles
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Patent number: 11270928Abstract: A diode semiconductor structure is described. In one example, a diode device includes a substrate, a layer of first semiconductor material of a first doping type, a layer of intrinsic semiconductor material, and a layer of second semiconductor material of a second doping type. The diode device also includes a metal contact formed on the layer of first semiconductor material and a metal via formed from a backside of the substrate, through the substrate, and through the layer of first semiconductor material, where the metal via contacts a bottom surface of the metal contact on the layer of first semiconductor material. In this configuration, a direct electrical connection can be achieved between the backside of the substrate and the metal contact on the layer of first semiconductor material without the need for an additional metal connection, such as a metal air bridge, to the metal contact.Type: GrantFiled: April 2, 2020Date of Patent: March 8, 2022Assignee: MACOM TECHNOLOGY SOLUTIONS HOLDINGS, INC.Inventors: Andrzej Rozbicki, Belinda Simone Edmee Piernas, David Russell Hoag, James Joseph Brogle, Timothy Edward Boles
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Publication number: 20210367084Abstract: A diode structure and a method of fabrication of the diode structure is described. In one example, the diode structure is a PIN diode structure and includes an N-type layer formed on a substrate, an intrinsic layer formed on the N-type layer, and a P-type layer formed on the intrinsic layer. The P-type layer forms an anode of the diode structure, and the anode is formed as a quadrilateral-shaped anode. According to the embodiments, a top surface of the anode can be formed with one or more straight segments, such as a quadrilateral-shaped anode, to reduce at least one of a thermal resistance or an electrical on-resistance. These changes, among others, can improve the overall power handling capability of the PIN diode structure.Type: ApplicationFiled: August 6, 2021Publication date: November 25, 2021Inventors: Timothy Edward Boles, James Joseph Brogle, Andrzej Rozbicki, Belinda Simone Edmee Piernas, Daniel Gustavo Curcio, David Russell Hoag
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Publication number: 20210313250Abstract: A diode semiconductor structure is described. In one example, a diode device includes a substrate, a layer of first semiconductor material of a first doping type, a layer of intrinsic semiconductor material, and a layer of second semiconductor material of a second doping type. The diode device also includes a metal contact formed on the layer of first semiconductor material and a metal via formed from a backside of the substrate, through the substrate, and through the layer of first semiconductor material, where the metal via contacts a bottom surface of the metal contact on the layer of first semiconductor material. In this configuration, a direct electrical connection can be achieved between the backside of the substrate and the metal contact on the layer of first semiconductor material without the need for an additional metal connection, such as a metal air bridge, to the metal contact.Type: ApplicationFiled: April 2, 2020Publication date: October 7, 2021Inventors: Andrzej Rozbicki, Belinda Simone Edmee Piernas, David Russell Hoag, James Joseph Brogle, Timothy Edward Boles
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Patent number: 7049181Abstract: A heterojunction P-I-N diode switch comprises a first layer of doped semiconductor material of a first doping type, a second layer of doped semiconductor material of a second doping type and a substrate on which is disposed the first and second layers. An intrinsic layer of semiconductor material is disposed between the first layer and second layer. The semiconductor material composition of at least one of the first layer and second layer is sufficiently different from that of the intrinsic layer so as to form a heterojunction therebetween, creating an energy barrier in which injected carriers from the junction are confined by the barrier, effectively reducing the series resistance within the I region of the P-I-N diode and the insertion loss relative to that of homojunction P-I-N diodes.Type: GrantFiled: August 10, 2004Date of Patent: May 23, 2006Assignee: M/A-ComInventors: David Russell Hoag, Timothy Edward Boles, James Joseph Brogle
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Patent number: 6946717Abstract: A compound semiconductor device is comprising a compound semiconductor substrate (219) having a ground plane (205); an active element (201) disposed on the substrate; a passive element (211) disposed on the substrate and electrically coupled to the active element; and an insulating layer (202) adjacent the substrate and interposed between the passive device and ground surface such that there is no resistive ground path from the passive device to the ground surface.Type: GrantFiled: January 30, 2002Date of Patent: September 20, 2005Assignee: M/A-Com, Inc.Inventors: David Russell Hoag, Timothy Edward Boles, Daniel G. Curcio
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Patent number: 6794734Abstract: A heterojunction P-I-N diode switch comprises a first layer of doped semiconductor material of a first doping type, a second layer of doped semiconductor material of a second doping type and a substrate on which is disposed the first and second layers. An intrinsic layer of semiconductor material is disposed between the first layer and second layer. The semiconductor material composition of at least one of the first layer and second layer is sufficiently different from that of the intrinsic layer so as to form a heterojunction therebetween, creating an energy barrier in which injected carriers from the junction are confined by the barrier, effectively reducing the series resistance within the I region of the P-I-N diode and the insertion loss relative to that of homojunction P-I-N diodes.Type: GrantFiled: May 3, 2002Date of Patent: September 21, 2004Assignee: MIA-COMInventors: David Russell Hoag, Timothy Edward Boles, James Joseph Brogle
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Publication number: 20040113231Abstract: A compound semiconductor device is comprising a compound semiconductor substrate (219) having a ground plane (205); an active element (201) disposed on the substrate; a passive element (211) disposed on the substrate and electrically coupled to the active element; and an insulating layer (202) adjacent the substrate and interposed between the passive device and ground surface such that there is no resistive ground path from the passive device to the ground surface.Type: ApplicationFiled: July 25, 2003Publication date: June 17, 2004Inventors: David Russell Hoag, Timothy Edward Boles, Daniel G. Curcio
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Publication number: 20030205715Abstract: A heterojunction P-I-N diode switch comprises a first layer of doped semiconductor material of a first doping type, a second layer of doped semiconductor material of a second doping type and a substrate on which is disposed the first and second layers. An intrinsic layer of semiconductor material is disposed between the first layer and second layer. The semiconductor material composition of at least one of the first layer and second layer is sufficiently different from that of the intrinsic layer so as to form a heterojunction therebetween, creating an energy barrier in which injected carriers from the junction are confined by the barrier, effectively reducing the series resistance within the I region of the P-I-N diode and the insertion loss relative to that of homojunction P-I-N diodes.Type: ApplicationFiled: May 3, 2002Publication date: November 6, 2003Inventors: David Russell Hoag, Timothy Edward Boles, James Joseph Brogle