Patents by Inventor David S. L. Mui

David S. L. Mui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230207328
    Abstract: Various embodiments described herein relate to methods and apparatus for etching a semiconductor substrate to remove a target material from a surface of the substrate. Generally, the techniques described herein are thermal techniques that do not rely on the use of plasma. In a number of embodiments, a particular gas mixture is provided to the reaction chamber to react with the target material. The gas mixture may include a combination of a halogen source such as hydrogen fluoride (HF), an organic solvent and/or water, an additive, and a carrier gas. A number of different materials may be used for the organic solvent and/or for the additive.
    Type: Application
    Filed: March 29, 2021
    Publication date: June 29, 2023
    Inventors: Nathan MUSSELWHITE, Ji ZHU, Gerome Michel Dominique MELAET, David S. L. MUI, Mark Naoshi KAWAGUCHI, Adrien LAVOIE
  • Patent number: 8617993
    Abstract: A method is provided for treating the surface of high aspect ratio nanostructures to help protect the delicate nanostructures during some of the rigorous processing involved in fabrication of semiconductor devices. A wafer containing high aspect ratio nanostructures is treated to make the surfaces of the nanostructures more hydrophobic. The treatment may include the application of a primer that chemically alters the surfaces of the nanostructures preventing them from getting damaged during subsequent wet clean processes. The wafer may then be further processed, for example a wet cleaning process followed by a drying process. The increased hydrophobicity of the nanostructures helps to reduce or prevent collapse of the nanostructures.
    Type: Grant
    Filed: February 1, 2010
    Date of Patent: December 31, 2013
    Assignee: Lam Research Corporation
    Inventors: Amir A. Yasseri, Ji Zhu, Seokmin Yun, David S. L. Mui, Katrina Mikhaylichenko
  • Patent number: 8314055
    Abstract: The embodiments of the present invention provide improved materials, apparatus, and methods for cleaning wafer surfaces, especially surfaces of patterned wafers (or substrates). The cleaning materials, apparatus, and methods discussed have advantages in cleaning patterned substrates with fine features without substantially damaging the features. The cleaning material includes polymers of one or more polymeric compounds. The cleaning materials can be used in a wide range of viscosity and pH to clean different types of surfaces. The cleaning materials are in liquid phase, and deform around device features to capture the contaminants on the substrate. The polymers entrap the contaminants preventing their return to the substrate surface. The cleaning apparatus is designed to dispense and rinse cleaning materials with a range of viscosities.
    Type: Grant
    Filed: July 15, 2009
    Date of Patent: November 20, 2012
    Assignee: Lam Research Corporation
    Inventors: David S. L. Mui, Ji Zhu, Arjun Mendiratta
  • Patent number: 8226775
    Abstract: The embodiments of the present invention provide methods for cleaning patterned substrates with fine features. The methods for cleaning patterned substrate have advantages in cleaning patterned substrates with fine features without substantially damaging the features by using the cleaning materials described. The cleaning materials are fluid, either in liquid phase, or in liquid/gas phase, and deform around device features; therefore, the cleaning materials do not substantially damage the device features or reduce damage all together. The cleaning materials containing polymers of a polymeric compound with large molecular weight capture the contaminants on the substrate. In addition, the cleaning materials entrap the contaminants and do not return the contaminants to the substrate surface. The polymers of one or more polymeric compounds with large molecular weight form long polymer chains, which can also be cross-linked to form a network (or polymeric network).
    Type: Grant
    Filed: June 2, 2008
    Date of Patent: July 24, 2012
    Assignee: Lam Research Corporation
    Inventors: David S. L. Mui, Satish Srinivasan, Grant Peng, Ji Zhu, Shih-Chung Kon, Dragan Podlesnik, Arjun Mendiratta
  • Patent number: 8211846
    Abstract: The embodiments of the present invention provide improved materials for cleaning patterned substrates with fine features. The cleaning materials have advantages in cleaning patterned substrates with fine features without substantially damaging the features. The cleaning materials are fluid, either in liquid phase, or in liquid/gas phase, and deform around device features; therefore, the cleaning materials do not substantially damage the device features or reduce damage all together. The cleaning materials containing polymers of a polymeric compound with large molecular weight capture the contaminants on the substrate. In addition, the cleaning materials entrap the contaminants and do not return the contaminants to the substrate surface. The polymers of one or more polymeric compounds with large molecular weight form long polymer chains, which can also be cross-linked to form a network (or polymeric network).
    Type: Grant
    Filed: June 2, 2008
    Date of Patent: July 3, 2012
    Assignee: Lam Research Group
    Inventors: David S. L. Mui, Satish Srinivasan, Grant Peng, Ji Zhu, Shih-Chung Kon, Dragan Podlesnik, Arjun Mendiratta
  • Publication number: 20120132234
    Abstract: A cleaning system for removing contaminants on a surface of a patterned substrate for defining integrated circuit devices is provided. The system includes a substrate carrier for supporting edges of the patterned substrate, and a cleaning head positioned over the patterned substrate. The cleaning head includes a plurality of dispensing holes to dispense a cleaning material on the surface the patterned substrate for defining integrated circuit devices, wherein the cleaning material includes polymers of a polymeric compound. The cleaning head is coupled to a storage of the cleaning material, which is coupled to the cleaning material preparation system. A support structure holds the cleaning head in proximity to the surface of the patterned substrate.
    Type: Application
    Filed: December 1, 2011
    Publication date: May 31, 2012
    Inventors: David S.L. Mui, Satish Srinivasan, Grant Peng, Ji Zhu, Shih-Chung Kon, Dragan Podlesnik, Arjun Mendiratta
  • Patent number: 8084406
    Abstract: The embodiments of the present invention provide apparatus for cleaning patterned substrates with fine features with cleaning materials. The apparatus using the cleaning materials has advantages in cleaning patterned substrates with fine features without substantially damaging the features. The cleaning materials are fluid, either in liquid phase, or in liquid/gas phase, and deform around device features; therefore, the cleaning materials do not substantially damage the device features or reduce damage all together. The cleaning materials containing polymers of a polymeric compound with large molecular weight capture the contaminants on the substrate. In addition, the cleaning materials entrap the contaminants and do not return the contaminants to the substrate surface. The polymers of one or more polymeric compounds with large molecular weight form long polymer chains, which can also be cross-linked to form a network (or polymeric network).
    Type: Grant
    Filed: June 2, 2008
    Date of Patent: December 27, 2011
    Assignee: Lam Research Corporation
    Inventors: David S. L. Mui, Satish Srinivasan, Grant Peng, Ji Zhu, Shih-Chung Kon, Dragan Podlesnik, Arjun Mendiratta
  • Publication number: 20110189858
    Abstract: A method is provided for treating the surface of high aspect ratio nanostructures to help protect the delicate nanostructures during some of the rigorous processing involved in fabrication of semiconductor devices. A wafer containing high aspect ratio nanostructures is treated to make the surfaces of the nanostructures more hydrophobic. The treatment may include the application of a primer that chemically alters the surfaces of the nanostructures preventing them from getting damaged during subsequent wet clean processes. The wafer may then be further processed, for example a wet cleaning process followed by a drying process. The increased hydrophobicity of the nanostructures helps to reduce or prevent collapse of the nanostructures.
    Type: Application
    Filed: February 1, 2010
    Publication date: August 4, 2011
    Applicant: LAM RESEARCH CORPORATION
    Inventors: Amir A. Yasseri, Ji Zhu, Seokmin Yun, David S.L. Mui, Katrina Mikhaylichenko
  • Publication number: 20100016202
    Abstract: The embodiments of the present invention provide improved materials, apparatus, and methods for cleaning wafer surfaces, especially surfaces of patterned wafers (or substrates). The cleaning materials, apparatus, and methods discussed have advantages in cleaning patterned substrates with fine features without substantially damaging the features. The cleaning material includes polymers of one or more polymeric compounds. The cleaning materials can be used in a wide range of viscosity and pH to clean different types of surfaces. The cleaning materials are in liquid phase, and deform around device features to capture the contaminants on the substrate. The polymers entrap the contaminants preventing their return to the substrate surface. The cleaning apparatus is designed to dispense and rinse cleaning materials with a range of viscosities.
    Type: Application
    Filed: July 15, 2009
    Publication date: January 21, 2010
    Applicant: LAM RESEARCH CORPORATION
    Inventors: David S. L. Mui, Ji Zhu, Arjun Mendiratta
  • Publication number: 20090151752
    Abstract: The embodiments of the present invention provide methods for cleaning patterned substrates with fine features. The methods for cleaning patterned substrate have advantages in cleaning patterned substrates with fine features without substantially damaging the features by using the cleaning materials described. The cleaning materials are fluid, either in liquid phase, or in liquid/gas phase, and deform around device features; therefore, the cleaning materials do not substantially damage the device features or reduce damage all together. The cleaning materials containing polymers of a polymeric compound with large molecular weight capture the contaminants on the substrate. In addition, the cleaning materials entrap the contaminants and do not return the contaminants to the substrate surface. The polymers of one or more polymeric compounds with large molecular weight form long polymer chains, which can also be cross-linked to form a network (or polymeric network).
    Type: Application
    Filed: June 2, 2008
    Publication date: June 18, 2009
    Inventors: David S.L. Mui, Satish Srinivasan, Grant Peng, Ji Zhu, Shih-Chung Kon, Dragan Podlesnik, Arjun Mendiratta
  • Publication number: 20090156452
    Abstract: The embodiments of the present invention provide improved materials for cleaning patterned substrates with fine features. The cleaning materials have advantages in cleaning patterned substrates with fine features without substantially damaging the features. The cleaning materials are fluid, either in liquid phase, or in liquid/gas phase, and deform around device features; therefore, the cleaning materials do not substantially damage the device features or reduce damage all together. The cleaning materials containing polymers of a polymeric compound with large molecular weight capture the contaminants on the substrate. In addition, the cleaning materials entrap the contaminants and do not return the contaminants to the substrate surface. The polymers of one or more polymeric compounds with large molecular weight form long polymer chains, which can also be cross-linked to form a network (or polymeric network).
    Type: Application
    Filed: June 2, 2008
    Publication date: June 18, 2009
    Inventors: David S.L. Mui, Satish Srinivasan, Grant Peng, Ji Zhu, Shih-Chung Kon, Dragan Podlesnik, Arjun Mendiratta
  • Publication number: 20090151757
    Abstract: The embodiments of the present invention provide apparatus for cleaning patterned substrates with fine features with cleaning materials. The apparatus using the cleaning materials has advantages in cleaning patterned substrates with fine features without substantially damaging the features. The cleaning materials are fluid, either in liquid phase, or in liquid/gas phase, and deform around device features; therefore, the cleaning materials do not substantially damage the device features or reduce damage all together. The cleaning materials containing polymers of a polymeric compound with large molecular weight capture the contaminants on the substrate. In addition, the cleaning materials entrap the contaminants and do not return the contaminants to the substrate surface. The polymers of one or more polymeric compounds with large molecular weight form long polymer chains, which can also be cross-linked to form a network (or polymeric network).
    Type: Application
    Filed: June 2, 2008
    Publication date: June 18, 2009
    Inventors: David S. L. Mui, Satish Srinivasan, Grant Peng, Ji Zhu, Shih-Chung Kon, Dragan Podlesnik, Arjun Mendiratta
  • Patent number: 7498106
    Abstract: A method for controlling etch processes during fabrication of semiconductor devices comprises tests and measurements performed on non-product and product substrates to define an N-parameter CD control graph that is used to calculate a process time for trimming a patterned mask to a pre-determined width. An apparatus for performing such a method.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: March 3, 2009
    Assignee: Applied Materials, Inc.
    Inventors: David S L Mui, Wei Liu, Hiroki Sasano
  • Patent number: 7482178
    Abstract: A method and apparatus for monitoring the stability of a substrate processing chamber and for adjusting the process recipe. Thickness and CD measurement data are collected before wafer processing and after wafer processing by an integrated or an in-situ metrology tool to monitor process chamber stability and to adjust the process recipe. The real time chamber stability monitoring enabled by the integrated metrology tool reduces the risk and cost of wafer mis-processing. The real time process recipe adjustment allows tightening of the process recipe. Process development cycle can also be reduced by the method and apparatus.
    Type: Grant
    Filed: August 6, 2003
    Date of Patent: January 27, 2009
    Assignee: Applied Materials, Inc.
    Inventors: David S. L. Mui, Wei Liu, Hiroki Sasano
  • Patent number: 6960416
    Abstract: A method for controlling etch processes during fabrication of semiconductor devices comprises tests and measurements performed on non-product and product substrates to define an N-parameter CD control graph that is used to calculate a process time for trimming a patterned mask to a pre-determined width. An apparatus for performing such a method.
    Type: Grant
    Filed: May 1, 2003
    Date of Patent: November 1, 2005
    Assignee: Applied Materials, Inc.
    Inventors: David S L Mui, Wei Liu, Hiroki Sasano
  • Patent number: 6924088
    Abstract: A method and apparatus for processing a semiconductor wafer is provided for reducing CD microloading variation. OCD metrology is used to inspect a wafer to determine pre-etch CD microloading, by measuring the CD of dense and isolated photoresist lines. Other parameters can also be measured or otherwise determined, such as sidewall profile, photoresist layer thickness, underlying layer thickness, photoresist pattern density, open area, etc. The inspection results are fed forward to the etcher to determine process parameters, such as resist trim time and/or etch conditions, thereby achieving the desired post-etch CD microloading. In certain embodiments, the CD and profile measurements, trim, etch processing and post-etch cleaning are performed at a single module in a controlled environment. All of the transfer and processing steps performed by the module are performed in a clean environment, thereby increasing yield by avoiding exposing the wafer to the atmosphere and possible contamination between steps.
    Type: Grant
    Filed: June 18, 2003
    Date of Patent: August 2, 2005
    Assignee: Applied Materials, Inc.
    Inventors: David S. L. Mui, Wei Liu, Shashank C. Deshmukh, Hiroki Sasano
  • Patent number: 6924191
    Abstract: A method for fabricating features on a substrate having reduced dimensions. The features are formed by defining a first mask on regions of the substrate. The first mask is defined using lithographic techniques. A second mask is then conformably formed on one or more sidewalls of the first mask. The features are formed on the substrate by removing the first mask and then etching the substrate using the second mask as an etch mask.
    Type: Grant
    Filed: June 16, 2003
    Date of Patent: August 2, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Wei Liu, Thorsten B. Lill, David S. L. Mui, Christopher Dennis Bencher
  • Patent number: 6858361
    Abstract: A method and apparatus for processing a semiconductor wafer is provided for reducing dimensional variation by feeding forward information relating to photoresist mask CD and profile to adjust the next process the inspected wafer will undergo (e.g., a photoresist trim process). After the processing step, dimensions of a structure formed by the process, such as the CD of a gate formed by the process, are measured, and this information is fed back to the process tool to adjust the process for the next wafer to further reduce dimensional variation. By taking into account photoresist CD and profile variation when choosing a resist trim recipe, post-etch CD is decoupled from pre-etch CD and profile. With automatic compensation for pre-etch CD, a very tight distribution of post-etch CD is achieved. In certain embodiments, the CD and profile measurements, trim, etch processing and post-etch cleaning are performed at a single module in a controlled environment.
    Type: Grant
    Filed: September 9, 2002
    Date of Patent: February 22, 2005
    Inventors: David S. L. Mui, Hiroki Sasano, Wei Liu
  • Patent number: 6849151
    Abstract: A substrate is placed in a process zone and an energized process gas is maintained in the process zone to process the substrate. A light beam is reflectively diffracted from a pattern of features of the substrate being processed, the reflected beam is monitored, and a signal is generated in relation to the monitored beam. During processing, a width of the features of the substrate can change. The generated signal is evaluated to detect the occurrence of a change in the width of the features.
    Type: Grant
    Filed: August 7, 2002
    Date of Patent: February 1, 2005
    Inventors: Michael S. Barnes, John P. Holland, David S. L. Mui, Wei Liu
  • Publication number: 20040072446
    Abstract: A method of fabricating an ultra shallow junction of a field effect transistor is provided. The method includes the steps of etching a substrate near a gate structure to define a source region and a drain region of the transistor, forming a spacer/protective film having poor step coverage to protect frontal surfaces of the source and drain regions, laterally etching sidewalls of the regions beneath a gate dielectric to define a channel region, and removing the protective film.
    Type: Application
    Filed: July 1, 2003
    Publication date: April 15, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Wei Liu, David S. L. Mui, Lance A. Scudder, Paul B. Comita, Arkadii V. Samoilov, Babak Adibi