Patents by Inventor David Scott Ebsen

David Scott Ebsen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160124846
    Abstract: The disclosed technology provides for a solid state device that adaptively determines, responsive to receipt of a write command, whether or not to partition one or more individual logical blocks of data between multiple pages of a flash storage device. According to one implementation, the partitioning (e.g., spanning) determination is based on read frequency characteristics and the internal error correction code rate of the data.
    Type: Application
    Filed: October 29, 2014
    Publication date: May 5, 2016
    Inventors: Peng Li, David Scott Ebsen
  • Publication number: 20160098431
    Abstract: A data object is received from a host and stored on a storage compute device. A first mathematical operation is performed on the data object via the storage compute device. An update from the host is received and stored on the storage compute device. The update data is stored separately from the data object and includes a portion of the data object that has subsequently changed. A second mathematical operation is performed on a changed version of the data object using the update data.
    Type: Application
    Filed: October 6, 2014
    Publication date: April 7, 2016
    Inventors: David Scott Ebsen, Ryan James Goss, Jeffrey L. Whaley, Dana Simonson
  • Patent number: 9299402
    Abstract: A system and associated method of using may generally have at least a mobile data storage device with a controller directing data to first and second tiers of memory. The first tier of memory can have at least boot data pre-fetched from the second tier of memory with the boot data including at least metadata and personalized user data.
    Type: Grant
    Filed: February 8, 2013
    Date of Patent: March 29, 2016
    Assignee: Seagate Technology LLC
    Inventors: David Scott Ebsen, Ara Patapoutian, Michael Joseph Steiner, Kevin Arthur Gomez
  • Publication number: 20160085291
    Abstract: Computations are performed on data objects via two or more data storage sections. The data storage sections facilitate persistently storing the data objects in parallel read/write operations. The data objects are used in computations within a storage compute device. At least one of the storage sections is deactivated during the computations to reduce power usage of the storage compute device.
    Type: Application
    Filed: September 24, 2014
    Publication date: March 24, 2016
    Inventors: David Scott Ebsen, Ryan James Goss, Jeffrey L. Whaley, Dana Simonson
  • Publication number: 20160078045
    Abstract: Methods and apparatuses facilitate receiving a command via a host interface of a storage compute device to perform a computation on one or more data objects. The computations producing intermediate objects that are stored in data storage section of the storage compute device. A determination is made to compress and decompress the intermediate objects as they are moved between the data storage section and a compute section based on wear of a storage medium being reduced in response to the compression and decompression. The intermediate objects are compressed and decompressed as they are moved between the data storage section and the compute section in response to the determination.
    Type: Application
    Filed: September 15, 2014
    Publication date: March 17, 2016
    Inventors: David Scott Ebsen, Ryan James Goss, Jeffrey L. Whaley, Dana Simonson
  • Publication number: 20160077885
    Abstract: A storage compute device includes a data storage section that facilitates persistently storing host data as data objects. The storage compute device also includes two or more compute sections that perform computations on the data objects. A controller monitors resource collisions affecting a first of the compute sections.
    Type: Application
    Filed: September 15, 2014
    Publication date: March 17, 2016
    Inventors: David Scott Ebsen, Ryan James Goss, Jeffrey L. Whaley, Dana Simonson
  • Publication number: 20160077978
    Abstract: A definition is received of at least one data object and a compute object from a host at a storage compute device. A first key is associated with the at least one data object and a second key is associated with the compute object. A command is received from the host to perform a computation that links the first and second keys. The computation is defined by the compute object and acts on the data object. The computation is performed via the storage compute device using the compute object and the data object in response to the command.
    Type: Application
    Filed: September 15, 2014
    Publication date: March 17, 2016
    Inventors: David Scott Ebsen, Ryan James Goss, Jeffrey L. Whaley, Dana Simonson
  • Patent number: 9135993
    Abstract: A data storage device may generally be constructed and operated with at least one variable resistance memory cell having a first logic state threshold that is replaced with a second logic state threshold by a controller. The first and second logic states respectively corresponding to a predicted resistance shift that is based upon an operating temperature profile.
    Type: Grant
    Filed: February 7, 2013
    Date of Patent: September 15, 2015
    Inventors: David Scott Ebsen, Antoine Khoueir, Jon D. Trantham
  • Patent number: 9105360
    Abstract: An incremental signal is defined that includes at least one of a duration and a peak voltage that is less than a respective minimum programming time or minimum programming voltage step of a resistive memory element. A characterization procedure is repeatedly performed that at least involves: applying a signal to the memory element, the signal being incremented by the incremental signal during each subsequent application; measuring a first resistance of the memory element in response to the signal; and c) measuring a second resistance of the memory element after a time period has elapsed from the measurement of the first resistance with no programming signal applied. In response to the first and second resistance measurements of the characterization procedure, a characterization parameter of the memory element is formed.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: August 11, 2015
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Ryan James Goss, Mark Allen Gaertner, Antoine Khoueir, David Scott Ebsen, Jon D. Trantham
  • Patent number: 9076530
    Abstract: Method and apparatus for managing data in a memory. In accordance with some embodiments, a non-volatile (NV) buffer is adapted to store input write data having a selected logical address. A write circuit is adapted to transfer a copy of the input write data to an NV main memory while retaining the stored input write data in the NV buffer. A verify circuit is adapted to perform a verify operation at the conclusion of a predetermined elapsed time interval to verify successful transfer of the copy of the input write data to the NV main memory. The input write data are retained in the NV buffer until successful transfer is verified.
    Type: Grant
    Filed: February 7, 2013
    Date of Patent: July 7, 2015
    Assignee: Seagate Technology LLC
    Inventors: Kevin Arthur Gomez, Ryan James Goss, Antoine Khoueir, David Scott Ebsen, Jon D. Trantham
  • Patent number: 9058870
    Abstract: Parameters indicative of resistance variance of the memory elements are tracked. The resistance variance affects values of data stored in the resistance-based memory elements. A hash function is performed for each memory element. The hash function returns a reference to one of a plurality of counter elements. A value of each counter element is modified in response to the tracked parameter data of the associated memory element. Read operations affecting the memory elements are adjusted based on the values for the associated counter elements.
    Type: Grant
    Filed: February 8, 2013
    Date of Patent: June 16, 2015
    Assignee: Seagate Technology LLC
    Inventors: David Scott Ebsen, Antoine Khoueir, Mark Allen Gaertner
  • Patent number: 8918595
    Abstract: A memory controller receives memory access requests from a host terminal, the memory access requests from the host terminal including one or both of host read requests and host write requests. The memory controller generates memory access requests. Priorities are assigned to the memory access requests. The memory access requests are segregated to memory unit queues of at least one set of memory unit queues, the set of memory unit queues associated with a memory unit. Each memory access request is sent to the memory unit according to a priority and an assigned memory unit queue of the memory access request.
    Type: Grant
    Filed: April 28, 2011
    Date of Patent: December 23, 2014
    Assignee: Seagate Technology LLC
    Inventor: David Scott Ebsen
  • Publication number: 20140281280
    Abstract: An apparatus includes a controller capable of being coupled to a host interface and a memory device. The memory device includes two or more non-hierarchical, non-volatile memory units having different minimum addressable data unit sizes. The controller is configured to at least perform determining a workload indicator of a data object being stored in the memory device via the host interface. The controller selects one of the memory units in response to the workload indicator of the data object corresponding to the minimum addressable data unit size of the selected memory unit corresponding to the workload indicator. The data object is stored in the selected memory unit in response thereto.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Ryan James Goss, Jon D. Trantham, Antoine Khoueir, David Scott Ebsen, Mark Allen Gaertner, Kevin Gomez
  • Publication number: 20140258646
    Abstract: An incremental signal is defined that includes at least one of a duration and a peak voltage that is less than a respective minimum programming time or minimum programming voltage step of a resistive memory element. A characterization procedure is repeatedly performed that at least involves: applying a signal to the memory element, the signal being incremented by the incremental signal during each subsequent application; measuring a first resistance of the memory element in response to the signal; and c) measuring a second resistance of the memory element after a time period has elapsed from the measurement of the first resistance with no programming signal applied. In response to the first and second resistance measurements of the characterization procedure, a characterization parameter of the memory element is formed.
    Type: Application
    Filed: March 7, 2013
    Publication date: September 11, 2014
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Ryan James Goss, Mark Allen Gaertner, Antoine Khoueir, David Scott Ebsen, Jon D. Trantham
  • Publication number: 20140244892
    Abstract: Quality of service indicators are provided from a host via a host interface. The quality of service indicators relate to data stored in a non-volatile data storage via the host. Workload indicators related to the quality of service indicators are measured, and a weighting is assigned to the host in response to a correlation between the quality of service indicators and the measured workload indicators. The weighting is applied to the quality of service indicators when responding to data access requests from the host.
    Type: Application
    Filed: February 26, 2013
    Publication date: August 28, 2014
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Ryan James Goss, Michael Joseph Steiner, Mark Allen Gaertner, David Scott Ebsen
  • Publication number: 20140241071
    Abstract: Method and apparatus for managing data in a memory. In accordance with some embodiments, a recovery data set representing a current state of a storage device is stored in a rewritable non-volatile memory responsive to detection of a potentially imminent deactivation of the device. The recovery data set is swapped with a boot data set in said memory responsive to subsequent deactivation of the device. The boot data set is subsequently used to transition the device from a deactivated mode to an operationally ready mode during device reinitialization. The boot data set is thereafter swapped with the recovery data set to return the device to the current state.
    Type: Application
    Filed: February 26, 2013
    Publication date: August 28, 2014
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Ryan James Goss, David Scott Ebsen, Antoine Khoueir
  • Publication number: 20140244896
    Abstract: Method and apparatus for managing data in a cloud computing environment. In accordance with some embodiments, data updates are received to a multi-tier memory structure across a cloud network and stored as working data in an upper rewritable non-volatile memory tier of the memory structure. The working data are periodically logged to a lower non-volatile memory tier in the memory structure while a current version of the working data remain in the upper memory tier. The upper and lower memory tiers each are formed of rewritable memory cells having different constructions and storage attributes.
    Type: Application
    Filed: February 26, 2013
    Publication date: August 28, 2014
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Ryan James Goss, David Scott Ebsen, Mark Allen Gaertner, Michael Joseph Steiner, Antoine Khoueir
  • Publication number: 20140244897
    Abstract: Method and apparatus for managing data in a memory. In accordance with some embodiments, metadata updates are stored in a first tier of a a multi-tier non-volatile memory structure responsive to access operations associated with data objects in the memory structure. The stored metadata updates are logged in a second, lower tier of the memory structure. The stored metadata updates are further migrated to a different location within the first tier responsive to an accumulated count of said access operations.
    Type: Application
    Filed: February 26, 2013
    Publication date: August 28, 2014
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Ryan James Goss, David Scott Ebsen, Mark Allen Gaertner
  • Publication number: 20140229665
    Abstract: A system and associated method of using may generally have at least a mobile data storage device with a controller directing data to first and second tiers of memory. The first tier of memory can have at least boot data pre-fetched from the second tier of memory with the boot data including at least metadata and personalized user data.
    Type: Application
    Filed: February 8, 2013
    Publication date: August 14, 2014
    Applicant: Seagate Technology LLC
    Inventors: David Scott Ebsen, Ara Patapoutian, Michael Joseph Steiner, Kevin Arthur Gomez
  • Publication number: 20140229654
    Abstract: Method and apparatus for managing data in a memory. In accordance with some embodiments, a first tier of a multi-tier memory structure is arranged into a plurality of garbage collection units (GCUs). Each GCU is formed from a plurality of non-volatile memory cells, and is managed as a unit. A plurality of data sets is stored in a selected GCU. A garbage collection operation is performed upon the selected GCU by identifying at least one of the plurality of data sets as a valid data set, migrating the valid data set to a non-volatile second tier of the multi-tier memory structure, and invalidating a programmed state of each of the plurality of non-volatile memory cells to prepare the selected GCU for storage of new data. In some embodiments, the invalidating operation involves setting all of the memory cells in the selected GCU to a known storage state.
    Type: Application
    Filed: February 8, 2013
    Publication date: August 14, 2014
    Applicant: SEAGATE TECHNOLOGY LLC
    Inventors: Ryan James Goss, David Scott Ebsen, Mark Allen Gaertner