Abstract: In one implementation, a circuit includes: a comparator; a shift register chain coupled to the comparator; and one or more converters coupled to respective shift registers of the shift register chain, wherein the one or more converters are configured to convert a source of current from a first voltage to a second voltage, and wherein the circuit is configured to selectively transmit an output signal to the one or more converters. In one implementation, the circuit is configured to selectively control modulation for the one or more converters.

Abstract: According to one implementation of the present disclosure, a circuit structure is configured to store charge in a charge-based storage element, where the charge-based storage element is disposed at least partially in a shallow-trench-isolation (STI) region of the circuit. According to one implementation of the present disclosure, a method includes: providing a circuit structure disposed on a substrate and a shallow-trench-isolation (STI) region of a circuit; forming an opening of the substrate and the STI region by removing a portion of the substrate and STI region; placing a first liner material in the opening and on remaining portions of the substrate and the STI region; and depositing a first metal layer in the opening on the first liner material.

Abstract: According to one implementation of the present disclosure, a cache memory includes: a plurality of cache-lines, wherein each row of cache-lines comprises: tag bits of a tag-random access memory (tag-RAM); data bits of a data-random access memory (data-RAM), and a single set of retention bits corresponding to the tag-RAM. According to one implementation of the present disclosure, a method includes: sampling a single set of retention bits of a cache-line of a cache memory, where the cache-line comprises the single set of retention bits, tag-RAM and data-RAM, and where at least the single set of retention bits comprise eDRAM bitcells; and performing a refresh cycle of at least the data-RAM corresponding to the tag-RAM based on the sampled single set of retention bits.

Abstract: Various implementations described herein are related to a device having a multi-device stack structure for use in multi-layered circuit architectures. The multi-device stack structure may have P-type transistors and N-type transistors that are arranged vertically in a multi-transistor stack configuration. In some implementations, the device may have a multi-device stack structure for use in multi-bit memory and/or logic architecture that is formed with complementary field effect transistor (CFET) technology.

Abstract: In one implementation, a circuit includes: a comparator; a shift register chain coupled to the comparator; and one or more converters coupled to respective shift registers of the shift register chain, wherein the one or more converters are configured to convert a source of current from a first voltage to a second voltage, and wherein the circuit is configured to selectively transmit an output signal to the one or more converters. In one implementation, the circuit is configured to selectively control modulation for the one or more converters.

Abstract: Various implementations described herein relate to a method for manufacturing, or causing to be manufactured, multiple devices packaged within a single semiconductor die. The multiple devices may have first devices that are arranged in a first multi-transistor stack with a first P-N configuration. The multiple devices may have second devices that are arranged in a second multi-transistor stack with a second P-N configuration that is different than the first P-N configuration.

Abstract: According to one implementation of the present disclosure, a method includes providing one or more tuning parameters of a transistor device at a first temperature of a range of temperatures below a temperature threshold; and adjusting the one or more tuning parameters until one or more second parameters of the transistor device corresponds to substantially the same value at the first temperature as a second temperature above the temperature threshold.

Abstract: Various implementations described herein relate to a method for manufacturing, or causing to be manufactured, multiple devices packaged within a single semiconductor die. The multiple devices may have first devices that are arranged in a first multi-transistor stack with a first P-N configuration. The multiple devices may have second devices that are arranged in a second multi-transistor stack with a second P-N configuration that is different than the first P-N configuration.

Abstract: Various implementations described herein relate to a device with a multi-transistor logic structure for use in memory architecture. In some applications, the multi-transistor logic structure may have a pair of P-type transistors that are arranged in a P-over-P multi-transistor stack. In other applications, the multi-transistor logic structure may have a pair of N-type transistors that are arranged in an N-over-N multi-transistor stack.

Abstract: Various implementations described herein are related to a device having multiple transistors in a single stack arranged as a cross-coupled bitcell latch. Also, the multiple transistors may be disposed in a multi-transistor stack configuration that is formed within a single monolithic semiconductor die. In some implementations, the multiple transistors may be arranged as a bitcell for single-port memory applications.

Abstract: Various implementations described herein relate to a method for manufacturing, or causing to be manufactured, multiple devices packaged within a single semiconductor die. The multiple devices may have first devices that are arranged in a first multi-transistor stack with a first P-N configuration. The multiple devices may have second devices that are arranged in a second multi-transistor stack with a second P-N configuration that is different than the first P-N configuration.

Abstract: An electric motor is disclosed having a detachable stator tooth. In some implementations, coil windings of the electric motor may be coupled to one or more drivers independently of other coil windings. A method of repairing and manufacturing an electric motor having a detachable stator tooth is also disclosed.

Abstract: An electric motor may comprise a rotor and a stator comprising rotor and stator teeth, respectively. A non-uniform angular spacing or grouping of rotor teeth may facilitate desired rotational speeds of the rotor.

Abstract: Apparatus and methods are provided for operating an electric motor, comprising selectively energising the coils of a stator having a plurality of stator teeth, each stator tooth having a said coil mounted thereon. The stator coils of a subset of the stator teeth are energised during a given time period to attract a corresponding rotor tooth into alignment with each of the stator teeth in the subset over the given time period. The stator coil of at least one stator tooth in the subset is energised during a portion of the given time period before the at least one stator tooth overlaps the corresponding rotor tooth.

Abstract: An electric motor may comprise a rotor and a stator comprising rotor and stator teeth, respectively. A non-uniform angular spacing or grouping of rotor teeth may facilitate desired rotational speeds of the rotor.

Abstract: An electrical motor comprising multiple inductive coils, and a method for using same, is disclosed. The inductive coils may be configured to conduct current bi-directionally. Terminals of the inductive coils may be coupled to a common node on a power bus coupled to a power supply. Current flowing in a first inductive coil from the power bus may be largely offset by current returned to the power bus from a second inductive coil.

Abstract: An electric motor is disclosed having a detachable stator tooth. In some implementations, coil windings of the electric motor may be coupled to one or more drivers independently of other coil windings. A method of repairing and manufacturing an electric motor having a detachable stator tooth is also disclosed.

Abstract: An electric motor may comprise a rotor and a stator comprising rotor and stator teeth, respectively. A non-uniform angular spacing or grouping of rotor teeth may facilitate desired rotational speeds of the rotor. In an embodiment, such non-uniform angular spacing may be such that for at least a subset of the rotor teeth comprising a first, second, and third rotor tooth, an angular spacing between the first and the second rotor teeth is at least twice an angular spacing between the second and the third rotor teeth.

Abstract: An electric motor is disclosed having a detachable stator tooth. In some implementations, coil windings of the electric motor may be coupled to one or more drivers independently of other coil windings. A method of repairing and manufacturing an electric motor having a detachable stator tooth is also disclosed.

Abstract: Apparatus and methods are provided for operating an electric motor, comprising selectively energising the coils of a stator having a plurality of stator teeth, each stator tooth having a said coil mounted thereon. The stator coils of a subset of the stator teeth are energised during a given time period to attract a corresponding rotor tooth into alignment with each of the stator teeth in the subset over the given time period. The stator coil of at least one stator tooth in the subset is energised during a portion of the given time period before the at least one stator tooth overlaps the corresponding rotor tooth.