Abstract: An output driver (100) for driving an external impedance load (160) comprising an output stage (110) and an impedance element (120). An input signal to the output stage (110) is controlled to provide an output signal that then drives the external impedance load (160).The output stage (110) comprises an input controller (112) that couples to a current generator (114) and a current replicator (116). A voltage reference source (150) determines a quiescent output current level of the current generator (114). The impedance element (120) comprises a current modulating resistor (230) that couples a two polarity voltage supply (130) to the output stage (110).Operations of the output driver (100) depends on the external load impedance (160). For a high external impedance load, the output driver (100) functions as a simple voltage follower.

Abstract: In order to sense the temperature of an integrated circuit chip, a semiconductor junction device (D1) integrated on the chip is used to generate a first signal (V.sub.1) having a known variation with temperature. A second signal (V.sub.2) is generated by passing a PTAT current (I.sub.2) through a resistor (R1) so that the second signal (V.sub.2) has a known variation with temperature which is opposite in sign to that of the first signal (V.sub.1). The two signals are compared (42) to generate an output signal (OT) which is dependent on whether the temperature of the chip is below or above a predetermined threshold temperature. The current (I.sub.1) through the junction device (D1) is also PTAT, which provides a more accurate definition of the threshold temperature in terms of integrated circuit parameters.

Abstract: An amplifier circuit wherein the output signal of an npn long-tailed transistor pair amplifier stage (1) is referenced to a first power supply point (5). In order to transfer this signal to the input of a second npn stage without using pnp transistors and without noise on the first supply point becoming superimposed on the signal, an intermediate stage (2) is provided. The intermediate stage comprises a current mirror (10) to the input and output of which are coupled the respective collectors of the pair transistors (3,4) via respective emitter followers (13,15) and respective resistors (14,16).

Abstract: A differential amplifier includes first and second matched field-effect transistors (FETs) (21,22) having their source electrodes connected together and to a current source (2), and their drain electrodes connected respectively to an input and an output of a current mirror circuit (3). The FETs (21,22) are depletion-mode FETs, and the current source comprises parallel-connected third and fourth depletion-mode FETs (25,26) matched to the first and second FETs (21,22). The current source (2) and current mirror (3) act to constrain the first and second FETs (21,22), to operate over a predetermined operating curve, for which they are optimally matched to one another. The differential amplifier may be constructed as an integrated circuit, and may form part of a circuit for sensing current in a power semiconductor device.

Abstract: A speed control system for an a.c. electric motor (1) comprises a microcomputer (6) having an interrupt signal input (INT/TO) to which is coupled the outputs of a detector (10) for detecting zero-crossings of the a.c. supply voltage and a tachogenerator (11) driven by the motor. The microcomputer supplies firing pulses to a triac (2), connected in series with the motor, in response to an overflow of a clocked counter (CT). This counter is suitably preloaded at each zero-crossing. The counter is read each time a tachogenerator pulse occurs and the time which this reading indicates has elapsed since the immediately preceding zero-crossing is stored. A record is also kept in a register (ZCSLTA) of how many zero-crossings occur between each tachogenerator pulse and the next and from this, and the stored times relating to the relevant pulses, the period of the tachogenerator pulses and hence the actual speed of the motor is calculated.

Abstract: A motor speed control circuit for use in a washing machine includes a timer which in normal operation accelerates the motor from a wash speed to a distribution speed before a fast acceleration to the spin dry speed. The control circuit includes speed measurement means for maintaining the motor at spin speed in the event of a power interruption during a spin cycle provided the drum speed remains above a given critical speed when the power returns. If not, a redistribution cycle takes place before the motor is accelerated to its spin speed.

Abstract: A circuit for processing the a.c. output of a tachogenerator whose frequency is proportional to the speed of a rotor of the tachogenerator, said circuit including voltage level detection means responsive to said a.c. output, key pulse producing means responsive to at least one output of the detection means to produce a key pulse whose duration is inversely proportional to the rotational speed, first gating means responsive to an output of the detection means and an output of the key pulse producing means to produce a reset pulse after a predetermined period in the interval between each key pulse, and a voltage generator responsive to each reset pulse to provide a predetermined output level and responsive to each key pulse to ramp that output level at a predetermined rate for the duration of that key pulse, whereby the output level of the voltage generator during each said predetermined period is a predetermined function of the rotational speed.