Patents by Inventor Deukhyoun Heo

Deukhyoun Heo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10187070
    Abstract: Electronic devices, local oscillator circuits, and methods for operating local oscillators are disclosed herein. In one embodiment, a local oscillator circuit includes a first transistor and a second transistor individually having a base, a collector, and an emitter and a transformer having a first transformer inductor magnetically coupled to a second transformer inductor. The first transformer inductor couples the collector of the first transistor to the base of the second transistor. The second transformer inductor couples the collector of the second transistor to the base of the first transistor.
    Type: Grant
    Filed: November 20, 2014
    Date of Patent: January 22, 2019
    Assignee: Washington State University
    Inventors: Suman P Sah, Deukhyoun Heo
  • Patent number: 10103913
    Abstract: In some embodiments, improved routing strategies for small-world network-on-chip (SWNoC) systems are provided. In some embodiments, an ALASH routing strategy or an MROOTS strategy are used in order to improve latency, temperature, and energy use within a network-on-chip system. In some embodiments, millimeter-wave wireless transceivers are used to implement the long-distance links within the small-world network, to create a millimeter-wave small-world network-on-chip (mSWNoC) system. In some embodiments, non-coherent on-off keying (OOK) wireless transceivers are used to implement the wireless links.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: October 16, 2018
    Assignee: Washington State University
    Inventors: Partha Pande, Deukhyoun Heo
  • Patent number: 9813088
    Abstract: Techniques to improve efficiencies of power amplifiers in wireless communication devices are described herein. In one embodiment, an envelope tracking supply modulator includes a pre-amplifier having an input coupled to an envelope signal and another input coupled to a threshold voltage signal, a de-multiplexer coupled to an output of the pre-amplifier, a pulse frequency modulator having an input coupled to an output of the de-multiplexer, and a pulse width modulator having an input coupled to the output of the de-multiplexer. The de-multiplexer is configured to allow the pulse frequency modulator to modulate a switching frequency to generate a switched signal according to a slew rate of the envelope signal or allow the pulse width modulator to provide the switched signal as a current source with a constant frequency, based on a comparison result between the envelope signal and the threshold voltage signal at the pre-amplifier.
    Type: Grant
    Filed: July 30, 2016
    Date of Patent: November 7, 2017
    Assignee: Washington State University
    Inventors: Deukhyoun Heo, Zhiyuan Zhou, Nghia Tang
  • Publication number: 20170170834
    Abstract: Electronic devices, local oscillator circuits, and methods for operating local oscillators are disclosed herein. In one embodiment, a local oscillator circuit includes a first transistor and a second transistor individually having a base, a collector, and an emitter and a transformer having a first transformer inductor magnetically coupled to a second transformer inductor. The first transformer inductor couples the collector of the first transistor to the base of the second transistor. The second transformer inductor couples the collector of the second transistor to the base of the first transistor.
    Type: Application
    Filed: November 20, 2014
    Publication date: June 15, 2017
    Inventors: Suman P Sah, Deukhyoun Heo
  • Patent number: 9589719
    Abstract: Technologies are generally described for switchable patterned metal shield inductance structures. In some examples, an inductance structure on a substrate may include an inductor and a metal shield, where the metal shield separates and shields the inductor from the substrate. The configuration of the metal shield and the inductor may facilitate reduction in the overall inductance of the inductance structure. In particular, the metal shield may be configured to develop one or more eddy currents in response to an inductor-generated magnetic field. The eddy currents may then result in a magnetic field opposing the inductor-generated magnetic field, which may result in a reduction in the overall magnetic field and the overall inductance of the inductance structure. The metal shield may be switchable between multiple modes, where each mode may be effective to reduce the overall inductance by a different amount.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: March 7, 2017
    Assignee: WASHINGTON STATE UNIVERSITY
    Inventors: Deukhyoun Heo, Pawan Agarwal
  • Publication number: 20170047917
    Abstract: In some examples, a circuit is described. The circuit may be included in a digital phase-locked loop (PLL) and may include a first delay cell, a second delay cell, and a delay controller. The first delay cell may include a first inverter circuit that includes first and second transistors and may be configured to receive and to delay a first signal. The delay of the first inverter circuit may be based on first and second voltages respectively provided to the first and second transistors. The second delay cell may include a second inverter circuit that includes third and fourth transistors and may be configured to receive and to delay a second signal. The delay of the second inverter circuit may be based on third and fourth voltages respectively provided to the third and fourth transistors. The delay controller may be configured to provide the first, second, third, and fourth voltages.
    Type: Application
    Filed: April 16, 2014
    Publication date: February 16, 2017
    Applicant: WASHINGTON STATE UNIVERSITY
    Inventors: Deukhyoun HEO, Pawan AGARWAL
  • Publication number: 20170033811
    Abstract: Techniques to improve efficiencies of power amplifiers in wireless communication devices are described herein. In one embodiment, an envelope tracking supply modulator includes a pre-amplifier having an input coupled to an envelope signal and another input coupled to a threshold voltage signal, a de-multiplexer coupled to an output of the pre-amplifier, a pulse frequency modulator having an input coupled to an output of the de-multiplexer, and a pulse width modulator having an input coupled to the output of the de-multiplexer. The de-multiplexer is configured to allow the pulse frequency modulator to modulate a switching frequency to generate a switched signal according to a slew rate of the envelope signal or allow the pulse width modulator to provide the switched signal as a current source with a constant frequency, based on a comparison result between the envelope signal and the threshold voltage signal at the pre-amplifier.
    Type: Application
    Filed: July 30, 2016
    Publication date: February 2, 2017
    Inventors: Deukhyoun Heo, Zhiyuan Zhou, Nghia Tang
  • Publication number: 20160323127
    Abstract: In some embodiments, improved routing strategies for small-world network-on-chip (SWNoC) systems are provided. In some embodiments, an ALASH routing strategy or an MROOTS strategy are used in order to improve latency, temperature, and energy use within a network-on-chip system. In some embodiments, millimeter-wave wireless transceivers are used to implement the long-distance links within the small-world network, to create a millimeter-wave small-world network-on-chip (mSWNoC) system. In some embodiments, non-coherent on-off keying (OOK) wireless transceivers are used to implement the wireless links.
    Type: Application
    Filed: March 25, 2016
    Publication date: November 3, 2016
    Applicant: Washington State University
    Inventors: Partha Pande, Deukhyoun Heo
  • Publication number: 20150279551
    Abstract: Technologies are generally described for switchable patterned metal shield inductance structures. In some examples, an inductance structure on a substrate may include an inductor and a metal shield, where the metal shield separates and shields the inductor from the substrate. The configuration of the metal shield and the inductor may facilitate reduction in the overall inductance of the inductance structure. In particular, the metal shield may be configured to develop one or more eddy currents in response to an inductor-generated magnetic field. The eddy currents may then result in a magnetic field opposing the inductor-generated magnetic field, which may result in a reduction in the overall magnetic field and the overall inductance of the inductance structure. The metal shield may be switchable between multiple modes, where each mode may be effective to reduce the overall inductance by a different amount.
    Type: Application
    Filed: March 30, 2015
    Publication date: October 1, 2015
    Inventors: Deukhyoun Heo, Pawan Agarwal
  • Patent number: 9071251
    Abstract: In some examples, a circuit is described. The circuit may include a voltage-controlled oscillator that may be configured to generate an output signal. The circuit may also include a control signal generation unit that may be configured to generate a control signal based on the output signal. The control signal generation unit may also be configured to provide the control signal to the voltage-controlled oscillator. The voltage-controlled oscillator and the control signal generation unit may be part of a phase-locked loop (PLL) included in the circuit. The circuit may also include a feed-forward network. The feed-forward network may be configured to provide a portion of the control signal to the voltage-controlled oscillator. The voltage-controlled oscillator may generate the output signal based on the control signal from the control signal generation unit and the portion of the control signal from the feed-forward network.
    Type: Grant
    Filed: April 22, 2013
    Date of Patent: June 30, 2015
    Assignee: WASHINGTON STATE UNIVERSITY
    Inventors: Deukhyoun Heo, Pawan Agarwal
  • Publication number: 20140312942
    Abstract: In some examples, a circuit is described. The circuit may include a voltage-controlled oscillator that may be configured to generate an output signal. The circuit may also include a control signal generation unit that may be configured to generate a control signal based on the output signal. The control signal generation unit may also be configured to provide the control signal to the voltage-controlled oscillator. The voltage-controlled oscillator and the control signal generation unit may be part of a phase-locked loop (PLL) included in the circuit. The circuit may also include a feed-forward network. The feed-forward network may be configured to provide a portion of the control signal to the voltage-controlled oscillator. The voltage-controlled oscillator may generate the output signal based on the control signal from the control signal generation unit and the portion of the control signal from the feed-forward network.
    Type: Application
    Filed: April 22, 2013
    Publication date: October 23, 2014
    Applicant: WASHINGTON STATE UNIVERSITY
    Inventors: Deukhyoun Heo, Pawan Agarwal