Patents by Inventor Deven Raj

Deven Raj has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240006158
    Abstract: A method for reducing a wet etch rate of flowable chemical vapor deposition (FCVD) oxide layers in a semiconductor wafer, the method including performing a plasma doping operation on the semiconductor wafer using a primary dopant gas and a diluent gas adapted to reduce a wet etch rate of the FCVD oxide layer, wherein the dopant gas and the diluent gas are supplied by a gas source of a plasma doping system, wherein the diluent gas is provided in an amount of 0.01%-5% by volume of the total amount of gas supplied by the gas source 36 during the plasma doping operation, and wherein the primary dopant gas is He and the diluent gas is selected from a group including of CH4, CO, CO2, and CF2.
    Type: Application
    Filed: June 30, 2022
    Publication date: January 4, 2024
    Applicant: Applied Materials, Inc.
    Inventors: Vikram M. Bhosle, Timothy J. Miller, Jun Seok Lee, Deven Raj Mittal
  • Patent number: 11756796
    Abstract: A method may include providing a substrate having, on a first surface of the substrate, a low dielectric constant layer characterized by a layer thickness. The method may include heating the substrate to a substrate temperature in a range of 200° C. to 550° C.; and directing an ion implant treatment to the low dielectric constant layer, while the substrate temperature is in the range of 200° C. to 550° C. As such, the ion implant treatment may include implanting a low weight ion species, at an ion energy generating an implant depth equal to 40% to 175% of the layer thickness.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: September 12, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Rajesh Prasad, Martin Seamons, Shan Tang, Qi Gao, Deven Raj Mittal, Kyuha Shim
  • Patent number: 11545368
    Abstract: A method of processing and passivating an implanted workpiece is disclosed, wherein, after passivation, the fugitive emissions of the workpiece are reduced to acceptably low levels. This may be especially beneficial when phosphorus, arsine, germane or another toxic species is the dopant being implanted into the workpiece. In one embodiment, a sputtering process is performed after the implantation process. This sputtering process is used to sputter the dopant at the surface of the workpiece, effectively lowering the dopant concentration at the top surface of the workpiece. In another embodiment, a chemical etching process is performed to lower the dopant concentration at the top surface. After this sputtering or chemical etching process, a traditional passivation process can be performed.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: January 3, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Cuiyang Wang, Timothy J. Miller, Jun Seok Lee, Il-Woong Koo, Deven Raj Mittal, Peter G. Ryan, Jr.
  • Publication number: 20220367205
    Abstract: A method may include providing a substrate having, on a first surface of the substrate, a low dielectric constant layer characterized by a layer thickness. The method may include heating the substrate to a substrate temperature in a range of 200° C. to 550° C.; and directing an ion implant treatment to the low dielectric constant layer, while the substrate temperature is in the range of 200° C. to 550° C. As such, the ion implant treatment may include implanting a low weight ion species, at an ion energy generating an implant depth equal to 40% to 175% of the layer thickness.
    Type: Application
    Filed: May 12, 2021
    Publication date: November 17, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Rajesh Prasad, Martin Seamons, Shan Tang, Qi Gao, Deven Raj Mittal, Kyuha Shim
  • Patent number: 11501972
    Abstract: An apparatus and method of processing a workpiece is disclosed, where a sacrificial capping layer is created on a top surface of a workpiece. That workpiece is then exposed to an ion implantation process, where select species are used to passivate the workpiece. While the implant process is ongoing, radicals and excited species etch the sacrificial capping layer. This reduces the amount of etching that the workpiece experiences. In certain embodiments, the thickness of the sacrificial capping layer is selected based on the total time used for the implant process and the etch rate. The total time used for the implant process may be a function of desired dose, bias voltage, plasma power and other parameters. In some embodiments, the sacrificial capping layer is applied prior to the implant process. In other embodiments, material is added to the sacrificial capping layer during the implant process.
    Type: Grant
    Filed: July 22, 2020
    Date of Patent: November 15, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Vikram M. Bhosle, Nicholas P. T. Bateman, Timothy J. Miller, Jun Seok Lee, Deven Raj Mittal
  • Publication number: 20220028693
    Abstract: An apparatus and method of processing a workpiece is disclosed, where a sacrificial capping layer is created on a top surface of a workpiece. That workpiece is then exposed to an ion implantation process, where select species are used to passivate the workpiece. While the implant process is ongoing, radicals and excited species etch the sacrificial capping layer. This reduces the amount of etching that the workpiece experiences. In certain embodiments, the thickness of the sacrificial capping layer is selected based on the total time used for the implant process and the etch rate. The total time used for the implant process may be a function of desired dose, bias voltage, plasma power and other parameters. In some embodiments, the sacrificial capping layer is applied prior to the implant process. In other embodiments, material is added to the sacrificial capping layer during the implant process.
    Type: Application
    Filed: July 22, 2020
    Publication date: January 27, 2022
    Inventors: Vikram M. Bhosle, Nicholas P.T. Bateman, Timothy J. Miller, Jun Seok Lee, Deven Raj Mittal
  • Publication number: 20210384041
    Abstract: A method of processing and passivating an implanted workpiece is disclosed, wherein, after passivation, the fugitive emissions of the workpiece are reduced to acceptably low levels. This may be especially beneficial when phosphorus, arsine, germane or another toxic species is the dopant being implanted into the workpiece. In one embodiment, a sputtering process is performed after the implantation process. This sputtering process is used to sputter the dopant at the surface of the workpiece, effectively lowering the dopant concentration at the top surface of the workpiece. In another embodiment, a chemical etching process is performed to lower the dopant concentration at the top surface. After this sputtering or chemical etching process, a traditional passivation process can be performed.
    Type: Application
    Filed: August 19, 2021
    Publication date: December 9, 2021
    Inventors: Cuiyang Wang, Timothy J. Miller, Jun Seok Lee, Il-Woong Koo, Deven Raj Mittal, Peter G. Ryan, JR.
  • Patent number: 11127601
    Abstract: A method of processing and passivating an implanted workpiece is disclosed, wherein, after passivation, the fugitive emissions of the workpiece are reduced to acceptably low levels. This may be especially beneficial when phosphorus, arsine, germane or another toxic species is the dopant being implanted into the workpiece. In one embodiment, a sputtering process is performed after the implantation process. This sputtering process is used to sputter the dopant at the surface of the workpiece, effectively lowering the dopant concentration at the top surface of the workpiece. In another embodiment, a chemical etching process is performed to lower the dopant concentration at the top surface. After this sputtering or chemical etching process, a traditional passivation process can be performed.
    Type: Grant
    Filed: May 21, 2019
    Date of Patent: September 21, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Cuiyang Wang, Timothy J. Miller, Jun Seok Lee, Il-Woong Koo, Deven Raj Mittal, Peter G. Ryan, Jr.
  • Publication number: 20200373170
    Abstract: A method of processing and passivating an implanted workpiece is disclosed, wherein, after passivation, the fugitive emissions of the workpiece are reduced to acceptably low levels. This may be especially beneficial when phosphorus, arsine, germane or another toxic species is the dopant being implanted into the workpiece. In one embodiment, a sputtering process is performed after the implantation process. This sputtering process is used to sputter the dopant at the surface of the workpiece, effectively lowering the dopant concentration at the top surface of the workpiece. In another embodiment, a chemical etching process is performed to lower the dopant concentration at the top surface. After this sputtering or chemical etching process, a traditional passivation process can be performed.
    Type: Application
    Filed: May 21, 2019
    Publication date: November 26, 2020
    Inventors: Cuiyang Wang, Timothy J. Miller, Jun Seok Lee, Il-Woong Koo, Deven Raj Mittal, Peter G. Ryan, Jr.
  • Patent number: 9437432
    Abstract: A method of conformally doping a device on a semiconductor workpiece is disclosed. An oxide layer is applied to all surfaces of the device. Further, the thickness of the oxide layer on each surface is proportional to the energy that ions impact that particular surface. For example, ions strike the horizontal surfaces at nearly a normal angle and penetrate more deeply into the workpiece than ions striking the vertical surfaces. After creating an oxide layer that has a variable thickness, a subsequent dopant implant is performed. While ions strike the horizontal surfaces with more energy, these ions pass through a thicker oxide layer to penetrate the workpiece. In contrast, ions strike the vertical surfaces with less energy, but traverse a much thinner oxide layer to penetrate the workpiece. The result is a conformally doped device.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: September 6, 2016
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Helen L. Maynard, Deven Raj Mittal, Jun Seok Lee
  • Publication number: 20120328771
    Abstract: A plasma processing apparatus and method are disclosed which improve the repeatability of various plasma processes. The actual implanted dose is a function of implant conditions, as well as various other parameters. This method used knowledge of current implant conditions, as well as information about historical data to improve repeatability. In one embodiment, information about plasma composition and dose per pulse is used to control one or more operating parameters in the plasma chamber. In another embodiment, this information is combined with historical data to control one or more operating parameters in the plasma chamber.
    Type: Application
    Filed: June 24, 2011
    Publication date: December 27, 2012
    Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.
    Inventors: George Papasouliotis, Deven Raj, Harold Persing
  • Publication number: 20080160212
    Abstract: A method and apparatuses for providing improved electrical contact to a semiconductor wafer during plasma processing applications are disclosed. In one embodiment, an apparatus includes a wafer platen for supporting the wafer; and a plurality of electrical contact elements, each of the plurality of electrical contact elements are configured to provide a path for supplying a bias voltage from a bias power supply to the wafer on the wafer platen. The plurality of electrical contact elements are also geometrically arranged such that at least one electrical contact element contacts an inner surface region (e.g., region between a center of wafer and a distance approximately half of the radius of the wafer) and at least one electrical contact element contacts an outer annular surface region (e.g., region between an outer edge of wafer and a distance approximately half of the radius of the wafer).
    Type: Application
    Filed: December 27, 2006
    Publication date: July 3, 2008
    Inventors: Bon-Woong Koo, Steven R. Walther, Christopher J. Leavitt, Justin Tocco, Sung-Hwan Hyun, Timothy J. Miller, Jay T. Scheuer, Atul Gupta, Vikram Singh, Deven Raj