Patents by Inventor Dmytro Apalkov

Dmytro Apalkov has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11925124
    Abstract: A magnetic structure, a magnetic device incorporating the magnetic structure and a method for providing the magnetic structure are described. The magnetic structure includes a magnetic layer, a templating structure and a resistive insertion layer. The magnetic layer includes a Heusler compound and has a perpendicular magnetic anisotropy energy exceeding an out-of-plane demagnetization energy. The templating structure has a crystal structure configured to template at least one of the Heusler compound and the resistive insertion layer. The magnetic layer is on the templating structure. The resistive insertion layer is configured to reduce magnetic damping for the Heusler compound and allow for templating of the Heusler compound.
    Type: Grant
    Filed: March 30, 2021
    Date of Patent: March 5, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jaewoo Jeong, Panagiotis Charilaos Filippou, Yari Ferrante, Chirag Garg, Mahesh Samant, Ikhtiar, Dmytro Apalkov
  • Publication number: 20240023458
    Abstract: A spin-orbit torque magnetic random-access memory (SOT-MRAM) device includes a substrate, a spin orbit torque line above the substrate, a composite-metal-oxide seed layer above the spin orbit torque line, and a magnetic tunnel junction above the composite-metal-oxide seed layer. The magnetic tunnel junction includes a free layer above the composite-metal-oxide seed layer, a main tunneling barrier layer above the free layer, and a pinned layer above the main tunneling barrier layer.
    Type: Application
    Filed: August 12, 2022
    Publication date: January 18, 2024
    Inventors: Dmytro Apalkov, Jaewoo Jeong, Ikhtiar
  • Patent number: 11776726
    Abstract: A magnetic device is described. The magnetic device includes a magnetic junction, a spin-orbit interaction (SO) line and a dipole-coupled layer. The magnetic junction includes a free layer. The SO line is adjacent to the free layer, carries a current in-plane and exerts a SO torque on the free layer due to the current passing through the SO line. The free layer being switchable between stable magnetic states using the SO torque. The SO line is between the free layer and the dipole-coupled layer. The dipole-coupled layer is magnetically coupled to the free layer. At least one of the free layer and the dipole-coupled layer has a damping of greater than 0.02.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: October 3, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dmytro Apalkov, Jaewoo Jeong, Ikhtiar, Roman Chepulskyy
  • Publication number: 20230276714
    Abstract: A magnetic junction includes a free layer including iron (Fe), the free layer has a first planar surface and a first side surface crossing the first planar surface; a first cap layer on the first planar surface of the free layer; and a protection layer on the first cap layer, wherein the protection layer is 8 angstroms (Å) or less in thickness. The protection layer may include one or more elements selected from the group consisting of Ta, Rh, Nb, C, Os, Ir, W, Re, Si, Ru, Ti, and Pt.
    Type: Application
    Filed: March 30, 2022
    Publication date: August 31, 2023
    Inventors: Roman Chepulskyy, Dmytro Apalkov
  • Publication number: 20230180627
    Abstract: A magnetoresistive tunnel-junction (MTJ) memory element includes a magnetic reference layer (RL), a magnetic free layer (FL), a tunneling barrier layer, which extends between the magnetic RL and the magnetic FL, and a diffusion-blocking layer (DBL), which extends on the magnetic FL. The includes at least one material selected from a group consisting of bismuth (Bi), antimony (Sb), osmium (Os), rhenium (Re), tin (Sn), rhodium (Rh), indium (In), and cadmium (Cd). An oxide capping layer is also provided on the DBL. The oxide layer may include at least one of strontium (Sr), scandium (Sc), beryllium (Be), calcium (Ca), yttrium (Y), zirconium (Zr), and hafnium (Hf).
    Type: Application
    Filed: February 18, 2022
    Publication date: June 8, 2023
    Inventors: Roman Chepulskyy, Dmytro Apalkov
  • Publication number: 20220223783
    Abstract: A magnetic structure, a magnetic device incorporating the magnetic structure and a method for providing the magnetic structure are described. The magnetic structure includes a magnetic layer, a templating structure and a resistive insertion layer. The magnetic layer includes a Heusler compound and has a perpendicular magnetic anisotropy energy exceeding an out-of-plane demagnetization energy. The templating structure has a crystal structure configured to template at least one of the Heusler compound and the resistive insertion layer. The magnetic layer is on the templating structure. The resistive insertion layer is configured to reduce magnetic damping for the Heusler compound and allow for templating of the Heusler compound.
    Type: Application
    Filed: March 30, 2021
    Publication date: July 14, 2022
    Inventors: Jaewoo Jeong, Panagiotis Charilaos Filippou, Yari Ferrante, Chirag Garg, Mahesh Samant, Ikhtiar, Dmytro Apalkov
  • Patent number: 11348627
    Abstract: A system including a racetrack memory layer is described. The racetrack memory layer includes a plurality of bit locations and a plurality of domain wall traps. The bit locations are interleaved with the domain wall traps. Each of the bit locations has a first domain wall speed. Each of the domain wall traps has a second domain wall speed. The first domain wall speed is greater than the second domain wall speed. The first domain wall speed and the second domain wall speed are due to at least one of a Dzyaloshinskii-Moriya interaction variation in the racetrack memory layer, a synthetic antiferromagnetic effect variation in the racetrack memory layer, and a separation distance for the plurality of domain wall traps corresponding to an intrinsic travel distance. The separation distance is less than one hundred nanometers.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: May 31, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dmytro Apalkov, Sungchul Lee, Roman Chepulskyy
  • Publication number: 20220068338
    Abstract: A system including a racetrack memory layer is described. The racetrack memory layer includes a plurality of bit locations and a plurality of domain wall traps. The bit locations are interleaved with the domain wall traps. Each of the bit locations has a first domain wall speed. Each of the domain wall traps has a second domain wall speed. The first domain wall speed is greater than the second domain wall speed. The first domain wall speed and the second domain wall speed are due to at least one of a Dzyaloshinskii-Moriya interaction variation in the racetrack memory layer, a synthetic antiferromagnetic effect variation in the racetrack memory layer, and a separation distance for the plurality of domain wall traps corresponding to an intrinsic travel distance. The separation distance is less than one hundred nanometers.
    Type: Application
    Filed: December 18, 2020
    Publication date: March 3, 2022
    Inventors: Dmytro Apalkov, Sungchul Lee, Roman Chepulskyy
  • Publication number: 20220068538
    Abstract: A magnetic device is described. The magnetic device includes a magnetic junction, a spin-orbit interaction (SO) line and a dipole-coupled layer. The magnetic junction includes a free layer. The SO line is adjacent to the free layer, carries a current in-plane and exerts a SO torque on the free layer due to the current passing through the SO line. The free layer being switchable between stable magnetic states using the SO torque. The SO line is between the free layer and the dipole-coupled layer. The dipole-coupled layer is magnetically coupled to the free layer. At least one of the free layer and the dipole-coupled layer has a damping of greater than 0.02.
    Type: Application
    Filed: December 18, 2020
    Publication date: March 3, 2022
    Inventors: Dmytro Apalkov, Jaewoo Jeong, Ikhtiar, Roman Chepulskyy
  • Patent number: 10885961
    Abstract: A memory system includes a memory track including a plurality of magnetic domains having alternating magnetic polarities and positioned along a path, and a plurality of domain walls separating adjacent ones of the plurality of magnetic domains, each one of the domain walls being configured to store data.
    Type: Grant
    Filed: August 13, 2019
    Date of Patent: January 5, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dmytro Apalkov, Sebastian Schafer
  • Publication number: 20200294565
    Abstract: A memory system includes a memory track including a plurality of magnetic domains having alternating magnetic polarities and positioned along a path, and a plurality of domain walls separating adjacent ones of the plurality of magnetic domains, each one of the domain walls being configured to store data.
    Type: Application
    Filed: August 13, 2019
    Publication date: September 17, 2020
    Inventors: Dmytro Apalkov, Sebastian Schafer
  • Patent number: 10644226
    Abstract: A magnetic junction, a memory using the magnetic junction and method for providing the magnetic junction are described. The magnetic junction includes first and second reference layers, a main barrier layer, a free layer, an engineered secondary barrier layer and a second reference layer. The free layer is switchable between stable magnetic states when a write current is passed through the magnetic junction. The main barrier layer is between the first reference layer and the free layer. The secondary barrier layer is between the free layer and the second reference layer. The engineered secondary barrier layer has a resistance and a plurality of regions having a reduced resistance less than the resistance. The free and reference layers each has a perpendicular magnetic anisotropy energy and an out-of-plane demagnetization energy less than the perpendicular magnetic anisotropy energy.
    Type: Grant
    Filed: June 26, 2019
    Date of Patent: May 5, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Zheng Duan, Dmytro Apalkov, Vladimir Nikitin
  • Patent number: 10585630
    Abstract: A memory device and method for providing the memory device are described. The memory device includes word lines, a first plurality of bit lines, a second plurality of bit lines and selectorless memory cells. Each selectorless memory cell is coupled with a word line, a first bit line of the first plurality of bit lines and a second bit line of the second plurality of bit lines. The selectorless memory cell includes first and second magnetic junctions. The first and second magnetic junctions are each programmable using a spin-orbit interaction torque. The word line is coupled between the first and second magnetic junctions. The first and second bit lines are coupled with the first and second magnetic junctions, respectively. The selectorless memory cell is selected for a write operation based on voltages in the word line, the first bit line and the second bit line.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: March 10, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Titash Rakshit, Borna J. Obradovic, Ryan M. Hatcher, Vladimir Nikitin, Dmytro Apalkov
  • Patent number: 10573363
    Abstract: A method of reading information stored in a magnetic memory. In a magnetic memory comprising a magnetic tunnel junction including a first reference layer and a free layer, and a spin orbit active (SO) line adjacent to the first reference layer of the magnetic tunnel junction, first and second currents are passed through the SO line so as to achieve two different directions of a magnetic moment of the first reference layer. Two electrical characteristics of the magnetic tunnel junction are determined, the two electrical characteristics corresponding to the two different directions of the magnetic moment of the first reference layer. These two electrical characteristics are then compared to determine the value of the stored information.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: February 25, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Alexey Vasilyevich Khvalkovskiy, Vladimir Nikitin, Dmytro Apalkov
  • Publication number: 20190319182
    Abstract: A magnetic junction, a memory using the magnetic junction and method for providing the magnetic junction are described. The magnetic junction includes first and second reference layers, a main barrier layer, a free layer, an engineered secondary barrier layer and a second reference layer. The free layer is switchable between stable magnetic states when a write current is passed through the magnetic junction. The main barrier layer is between the first reference layer and the free layer. The secondary barrier layer is between the free layer and the second reference layer. The engineered secondary barrier layer has a resistance and a plurality of regions having a reduced resistance less than the resistance. The free and reference layers each has a perpendicular magnetic anisotropy energy and an out-of-plane demagnetization energy less than the perpendicular magnetic anisotropy energy.
    Type: Application
    Filed: June 26, 2019
    Publication date: October 17, 2019
    Inventors: Zheng Duan, Dmytro Apalkov, Vladimir Nikitin
  • Patent number: 10439133
    Abstract: A magnetic junction and method for providing the magnetic junction are described. The magnetic junction includes a reference layer, a nonmagnetic spacer layer and a hybrid free layer. The hybrid free layer is switchable between stable magnetic states using a current passed through the magnetic junction. The nonmagnetic spacer layer is between the free layer and the reference layer. The hybrid free layer includes a soft magnetic layer, a hard magnetic layer and an oxide coupling layer between the hard magnetic layer and the soft magnetic layer. The soft magnetic layer has a soft layer magnetic thermal stability coefficient of not more than thirty. The hard magnetic layer has a hard layer magnetic thermal stability coefficient of at least twice the soft layer magnetic thermal stability coefficient.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: October 8, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dmytro Apalkov, Xueti Tang, Vladimir Nikitin, Shuxia Wang, Gen Feng
  • Patent number: 10411184
    Abstract: A magnetic device and method for programming the magnetic device are described. The magnetic device includes a plurality of magnetic junctions and at least one spin-orbit interaction (SO) active layer having a plurality of sides. The SO active layer(s) carry a current in direction(s) substantially perpendicular to the plurality of sides. Each of the magnetic junction(s) is adjacent to the sides and substantially surrounds a portion of the SO active layer. Each magnetic junction includes a free layer, a reference layer and a nonmagnetic spacer layer between the pinned and free layers. The SO active layer(s) exert a SO torque on the free layer due to the current passing through the SO active layer(s). The free layer is switchable between stable magnetic states. The free layer may be written using the current and, in some aspects, another current driven through the magnetic junction.
    Type: Grant
    Filed: May 1, 2018
    Date of Patent: September 10, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Vladimir Nikitin, Dmytro Apalkov
  • Publication number: 20190273202
    Abstract: A magnetic device and method for programming the magnetic device are described. The magnetic device includes a plurality of magnetic junctions and at least one spin-orbit interaction (SO) active layer having a plurality of sides. The SO active layer(s) carry a current in direction(s) substantially perpendicular to the plurality of sides. Each of the magnetic junction(s) is adjacent to the sides and substantially surrounds a portion of the SO active layer. Each magnetic junction includes a free layer, a reference layer and a nonmagnetic spacer layer between the pinned and free layers. The SO active layer(s) exert a SO torque on the free layer due to the current passing through the SO active layer(s). The free layer is switchable between stable magnetic states. The free layer may be written using the current and, in some aspects, another current driven through the magnetic junction.
    Type: Application
    Filed: May 1, 2018
    Publication date: September 5, 2019
    Inventors: Vladimir Nikitin, Dmytro Apalkov
  • Publication number: 20190273201
    Abstract: A magnetic junction, a memory using the magnetic junction and method for providing the magnetic junction are described. The magnetic junction includes first and second reference layers, a main barrier layer having a first thickness, a free layer, an engineered secondary barrier layer and a second reference layer. The free layer is switchable between stable magnetic states when a write current is passed through the magnetic junction. The main barrier layer is between the first reference layer and the free layer. The secondary barrier layer is between the free layer and the second reference layer. The engineered secondary barrier layer has a resistance, a second thickness less than the first thickness and a plurality of regions having a reduced resistance less than the resistance. The free and reference layers each has a perpendicular magnetic anisotropy energy and an out-of-plane demagnetization energy less than the perpendicular magnetic anisotropy energy.
    Type: Application
    Filed: May 1, 2018
    Publication date: September 5, 2019
    Inventors: Zheng Duan, Dmytro Apalkov, Vladimir Nikitin
  • Patent number: RE49797
    Abstract: A magnetic device and method for programming the magnetic device are described. The magnetic device includes a plurality of magnetic junctions and at least one spin-orbit interaction (SO) active layer having a plurality of sides and an axis. The SO active layer(s) carry a current in direction(s) substantially perpendicular to the plurality of sides along the axis. Each of the magnetic junction(s) is adjacent to the sides and substantially surrounds a portion of the SO active layer. Each magnetic junction includes a free layer, a reference layer and a nonmagnetic spacer layer between the pinned and free layers. The SO active layer(s) exert a SO torque on the free layer due to the current passing through the SO active layer(s). The free layer is switchable between stable magnetic states. The free layer may be written using the current and, in some aspects, another current driven through the magnetic junction.
    Type: Grant
    Filed: May 5, 2021
    Date of Patent: January 9, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Vladimir Nikitin, Dmytro Apalkov