Patents by Inventor Dominic Hugo Symes
Dominic Hugo Symes has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11824977Abstract: A data processing system including storage. The data processing system also includes at least one processor to generate output data using at least a portion of a first neural network layer and generate a key associated with at least the portion of the first neural network layer. The at least one processor is further operable to obtain the key from the storage and obtain a version of the output data for input into a second neural network layer. Using the key, the at least one processor is further operable to determine whether the version of the output data differs from the output data.Type: GrantFiled: July 28, 2020Date of Patent: November 21, 2023Assignee: Arm LimitedInventors: Sharjeel Saeed, Daren Croxford, Dominic Hugo Symes
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Publication number: 20230186045Abstract: A sequence of operations to process an initial input data array for the sequence of operations to generate a final output data array of the sequence of operations on a processor operable to execute neural network processing, the sequence are performed for respective blocks of the initial input data array on a block-by-block basis, and when performing an operation in the sequence whose output data is input data for another operation in the sequence, the output data is used as input data for another operation of the sequence is stored in local storage of the processor that is performing the neural network processing, and provided as input data for the another operation in the sequence from the local storage, but for the final operation in the sequence, the final output data array is stored in a main memory of the data processing system.Type: ApplicationFiled: October 5, 2022Publication date: June 15, 2023Inventors: Dominic Hugo SYMES, Robert NORBERG, Tomas Fredrik EDSÖ, Rajanarayana Priyanka MARIGI, Douglas William TROHA
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Patent number: 11645807Abstract: When performing anisotropic filtering when sampling a texture to provide an output sampled texture value for use when rendering an output in a graphics processing system, a number of positions for which to sample the texture along an anisotropy direction along which samples will be taken in the texture is determined by determining the square root of the coefficient F for an ellipse having the form Ax2+Bxy+Cy2=F corresponding to the projection of the sampling point for which the texture is being sampled onto the surface to which the texture is to be applied, and using the determined square root of the ellipse coefficient F to determine the number of positions for which samples should be taken along the anisotropy direction in the texture.Type: GrantFiled: January 5, 2022Date of Patent: May 9, 2023Assignee: Arm LimitedInventors: Edvard Fielding, Dominic Hugo Symes
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Patent number: 11620503Abstract: A method for performing neural network processing, and a corresponding data processing system. The data processing system is configured to define one or more tiles for use when reading a portion of an input feature map from memory or writing a portion of an output feature map to memory. The data processing system is also configured to provide information which allows positions falling within the defined one or more tiles to be mapped to memory locations to allow a processor to read data for an input feature map from memory or to write data for a portion of an output feature map to memory.Type: GrantFiled: March 18, 2020Date of Patent: April 4, 2023Assignee: Arm LimitedInventors: Dominic Hugo Symes, Rune Holm
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Patent number: 11616937Abstract: When a producer processing unit, such as a video decoder, of a media processing system is producing a data output for use by a consumer processing unit, such as a display processor, the producer processing unit also generates metadata for the data output that it is producing and provides that metadata for use by the consumer processing unit. The consumer processing unit then uses the metadata provided by the producer processing unit when processing the data output to which the metadata relates.Type: GrantFiled: May 13, 2019Date of Patent: March 28, 2023Assignee: Arm LimitedInventors: Damian Piotr Modrzyk, Viacheslav Chesnokov, Sven Ola Johannes Hugosson, Alex Kornienko, Guney Kayim, Ertunc Erdil, Dominic Hugo Symes, Brian Paul Starkey, Michal Karol Bogusz
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Publication number: 20230080578Abstract: A dot product array comprises dot product circuits each to process a respective pair of first and second input vectors to generate a respective dot product result. In a real number mode, each dot product result and vector element represents a respective real number. In a hypercomplex number mode, an input vector manipulation is applied to at least one of the first/second input vectors to be supplied to each dot product circuit, to cause the dot product array to generate hypercomplex dot product results each indicating a sum of hypercomplex products of corresponding pairs of hypercomplex numbers. In the hypercomplex number mode, respective subsets of elements of the first/second input vectors represent respective hypercomplex numbers, for which respective components are represented by different elements of the subset, and each hypercomplex dot product result comprises components represented by the dot product results generated by a corresponding group of at least two dot product circuits.Type: ApplicationFiled: September 14, 2021Publication date: March 16, 2023Inventors: Dominic Hugo SYMES, Fredrik Peter STOLT
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Patent number: 11561795Abstract: Herein described is a method of operating an accumulation process in a data processing apparatus. The accumulation process comprises a plurality of accumulations which output a respective plurality of accumulated values, each based on a stored value and a computed value generated by a data processing operation. The method comprises storing a first accumulated value, the first accumulated value being one of said plurality of accumulated values, into a first storage device comprising a plurality of single-bit storage elements; determining that a predetermined trigger has been satisfied with respect to the accumulation process; and in response to the determining, storing at least a portion of a second accumulated value, the second accumulated value being one of said plurality of accumulated values, into a second storage device.Type: GrantFiled: March 30, 2020Date of Patent: January 24, 2023Assignee: Arm LimitedInventors: Jens Olson, John Wakefield Brothers, III, Jared Corey Smolens, Chi-wen Cheng, Daren Croxford, Sharjeel Saeed, Dominic Hugo Symes
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Publication number: 20220215613Abstract: When performing anisotropic filtering when sampling a texture to provide an output sampled texture value for use when rendering an output in a graphics processing system, a number of positions for which to sample the texture along an anisotropy direction along which samples will be taken in the texture is determined by determining the square root of the coefficient F for an ellipse having the form Ax2+Bxy+Cy2=F corresponding to the projection of the sampling point for which the texture is being sampled onto the surface to which the texture is to be applied, and using the determined square root of the ellipse coefficient F to determine the number of positions for which samples should be taken along the anisotropy direction in the texture.Type: ApplicationFiled: January 5, 2022Publication date: July 7, 2022Inventors: Edvard FIELDING, Dominic Hugo SYMES
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Publication number: 20220038270Abstract: A data processing system including storage. The data processing system also includes at least one processor to generate output data using at least a portion of a first neural network layer and generate a key associated with at least the portion of the first neural network layer. The at least one processor is further operable to obtain the key from the storage and obtain a version of the output data for input into a second neural network layer. Using the key, the at least one processor is further operable to determine whether the version of the output data differs from the output data.Type: ApplicationFiled: July 28, 2020Publication date: February 3, 2022Inventors: Sharjeel SAEED, Daren CROXFORD, Dominic Hugo SYMES
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Publication number: 20220014767Abstract: Disclosed herein is a method of encoding an array of data elements comprising transforming the array from the spatial to the frequency domain, representing the frequency domain coefficients as a plurality of bit plane arrays, and encoding the set of frequency domain coefficients as a data packet having a fixed size by encoding the bit plane arrays in a bit plane sequence working from the bit plane array representing the most significant bit downwards until the data packet is full. Each bit plane array is encoded by recursively subdividing the bit plane array into respective sections and subsections down to the individual coefficients and including in the data packet, so long as there is available space, data indicating the locations of any (sub)sections in that bit plane array that for the first time in the bit plane sequence contain one or more coefficient(s) having a non-zero bit value.Type: ApplicationFiled: December 3, 2019Publication date: January 13, 2022Inventors: Dominic Hugo SYMES, Sven Ola Johannes HUGOSSON
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Patent number: 11205077Abstract: A method is described for operating on a frame of a video to generate a feature map of a neural network. The method determines if a block of the frame is an inter block or an intra block, and performs an inter block process in the event that the block is an inter block and/or an intra block process in the event that the block is an intra block. The inter block process determines a measure of differences between the block of the frame and a reference block of a reference frame of the video, and performs either a first process or a second process based on the measure to generate a segment of the feature map. The intra block process determines a measure of flatness of the block of the frame, and performs either a third process or a fourth process based on the measure to generate a segment of the feature map.Type: GrantFiled: May 29, 2020Date of Patent: December 21, 2021Assignee: Arm LimitedInventors: Jayavarapu Srinivasa Rao, Daren Croxford, Dominic Hugo Symes
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Publication number: 20210374422Abstract: A method is described for operating on a frame of a video to generate a feature map of a neural network. The method determines if a block of the frame is an inter block or an intra block, and performs an inter block process in the event that the block is an inter block and/or an intra block process in the event that the block is an intra block. The inter block process determines a measure of differences between the block of the frame and a reference block of a reference frame of the video, and performs either a first process or a second process based on the measure to generate a segment of the feature map. The intra block process determines a measure of flatness of the block of the frame, and performs either a third process or a fourth process based on the measure to generate a segment of the feature map.Type: ApplicationFiled: May 29, 2020Publication date: December 2, 2021Inventors: Jayavarapu Srinivasa RAO, Daren CROXFORD, Dominic Hugo SYMES
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Patent number: 11175854Abstract: A producer processing unit of a data processing system that is producing a stream of data for use by one or more consumer processing units of the data processing system maintains a record that is accessible to the consumer processing units of a position in the data stream for which it has written data to memory. The consumer processing units then control their reading of the data stream from the memory in accordance with the write position record maintained by the producer processing unit.Type: GrantFiled: December 19, 2018Date of Patent: November 16, 2021Assignee: Arm LimitedInventors: Erik Persson, Stefan Johannes Frid, Philip Gregory Hall, Dominic Hugo Symes, Sven Ola Johannes Hugosson, Robert Norberg
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Publication number: 20210334643Abstract: A processing unit is described that receives an instruction to perform a first operation on a first layer of a neural network, block dependency data, and an instruction to perform a second operation on a second layer of the neural network. The processing unit performs the first operation, which includes dividing the first layer into a plurality of input blocks, and operating on the input blocks to generate a plurality of output blocks. The processing unit then performs the second operation after the first operation has generated a set number of output blocks defined by the block dependency data.Type: ApplicationFiled: April 27, 2020Publication date: October 28, 2021Inventors: Dominic Hugo SYMES, John Wakefield BROTHERS, III, Fredrik Peter STOLT
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Publication number: 20210303307Abstract: Herein described is a method of operating an accumulation process in a data processing apparatus. The accumulation process comprises a plurality of accumulations which output a respective plurality of accumulated values, each based on a stored value and a computed value generated by a data processing operation. The method comprises storing a first accumulated value, the first accumulated value being one of said plurality of accumulated values, into a first storage device comprising a plurality of single-bit storage elements; determining that a predetermined trigger has been satisfied with respect to the accumulation process; and in response to the determining, storing at least a portion of a second accumulated value, the second accumulated value being one of said plurality of accumulated values, into a second storage device.Type: ApplicationFiled: March 30, 2020Publication date: September 30, 2021Inventors: Jens OLSON, John Wakefield BROTHERS, III, Jared Corey SMOLENS, Chi-wen CHENG, Daren CROXFORD, Sharjeel SAEED, Dominic Hugo SYMES
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Publication number: 20210295138Abstract: A method for performing neural network processing, and a corresponding data processing system. The data processing system is configured to define one or more tiles for use when reading a portion of an input feature map from memory or writing a portion of an output feature map to memory. The data processing system is also configured to provide information which allows positions falling within the defined one or more tiles to be mapped to memory locations to allow a processor to read data for an input feature map from memory or to write data for a portion of an output feature map to memory.Type: ApplicationFiled: March 18, 2020Publication date: September 23, 2021Applicant: Arm LimitedInventors: Dominic Hugo Symes, Rune Holm
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Patent number: 10931964Abstract: An apparatus for encoding frames of a sequence of source frames of video image data to be encoded. The apparatus includes encoding circuitry configured to encode the source frames using reference frames. The apparatus also includes monitoring circuitry configured to, when the encoding circuitry is encoding a source frame using one or more reference frames, monitor the memory bandwidth being used when using the one or more reference frames when encoding the source frame. The apparatus further includes encoding circuitry that is operable to, in response to the monitored memory bandwidth being greater than a threshold, to control the encoding circuitry to encode a subsequent part of the source frame using a modified video encoding process to restrict the memory bandwidth usage when using one or more reference frames when encoding a subsequent part of a source frame.Type: GrantFiled: March 7, 2018Date of Patent: February 23, 2021Assignee: Arm LimitedInventors: Dominic Hugo Symes, Sven Ola Johannes Hugosson, Tomas Fredrik Edso
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Patent number: 10896536Abstract: A method of operating a data processing system is disclosed for a data processing system that comprises a display and a display controller operable to provide to the display data in respect of output surfaces to be displayed. The method comprises, when an output surface is to be displayed, the display controller providing to the display data in respect of the output surface in the form of image data and image modification data, and the display using the image data and the image modification data when producing an output surface for display.Type: GrantFiled: March 16, 2018Date of Patent: January 19, 2021Assignee: Arm LimitedInventors: Daren Croxford, Sharjeel Saeed, Jayavarapu Srinivasa Rao, Ozgur Ozkurt, Dominic Hugo Symes
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Patent number: 10771792Abstract: When encoding an array of data elements, or a stream of such arrays, using an encoder comprising encoding circuitry operable to encode the array(s) of data elements as a plurality of independent segments, wherein each independent segment can be decoded independently; a header is generated for output with an encoded data stream including the plurality of independent segments wherein the header contains information indicative of the location of each of the plurality of independent segments within the encoded data stream. When an encoded data stream associated with such a header is to be decoded, a decoder may thus read the header to identify the location of the independent segment within the data stream and then read and decode the identified segments from the identified location(s) in the data stream.Type: GrantFiled: February 4, 2019Date of Patent: September 8, 2020Assignee: Arm LimitedInventors: Sven Ola Johannes Hugosson, Tomas Fredrik Edso, Dominic Hugo Symes
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Patent number: 10652563Abstract: A video decoder configured to decode an encoded video bitstream comprises a first parsing unit and a second parsing unit, each configured to independently parse the encoded video bitstream to derive parsing state information therefrom on which subsequent parsing of the encoded video bitstream at least partially depends and to identify macroblock information for decoding. The encoded video bitstream comprises frame header information defining a sequence of frames and each frame is composed of macroblocks represented by macroblock information. A control unit of the video encoder allocates each frame of macroblock information to one of the two parsing units to parse. The two parsing units are both configured to parse frame header information to thereby each derive parsing state information for the encoded video bitstream, and the two parsing unit are each configured to parse macroblock information allocated to them, skipping macroblock information allocated to the other parsing unit.Type: GrantFiled: November 26, 2018Date of Patent: May 12, 2020Assignee: ARM LimitedInventors: Ola Hugosson, Dominic Hugo Symes