Abstract: A method is disclosed for determining a user's identity and creating a virtual session using the HTTP protocol without modifying the protocol or changing its stateless nature.

Abstract: A method is disclosed for determining a user's identity and creating a virtual session using the HTTP protocol without modifying the protocol or changing its stateless nature.

Abstract: A method is disclosed for determining a user's identity and creating a virtual session using the HTTP protocol without modifying the protocol or changing its stateless nature.

Abstract: Unwanted information, such as commercials, is typically transmitted from a transmission station many times each day. The repetitive nature of such unwanted information is used by the present apparatus/method to distinguish unwanted information from normal programming.

Abstract: In a data processing system, a method and apparatus which enable an erroneous microinstruction word to be rewritten before it is executed. After the microinstruction word is written from memory into a control register, a parity network coupled to the control register determines whether a correct microinstruction is being executed. Upon a parity error being detected, the clock pulses to the data paths coupled to the control register are inhibited. The original microinstruction word is then fetched from secondary storage and rewritten into the microinstruction memory with the aid of a separate register providing the address to the microinstruction memory. Upon rewriting the microinstruction memory, the signal inhibiting the clock pulses is removed thereby allowing a new microinstruction to be executed. An additional feature includes apparatus for determining whether an error has previously occurred for the same microinstruction word, in which case a critical fault occurs and remedial maintenance is necessary.

Abstract: Method and apparatus for parity checking of data, particularly in relation to data used and/or generated by an arithmetic logic unit of a data processing system. Parity is generated for all operations but examined only in connection with those operations which results in valid parity. For these operations which do not directly result in valid parity, parity is ignored. A "parity valid" bit is associated with those operations which generate valid parity and a parity error is indicated only when the parity valid bit occurs at the same time as a parity error.