Abstract: A scanning display signal generating system for a plurality of planes includes a first look up table addressed by a first set of the planes, and a second look up table addressed by a second set of planes. A logic unit receives the outputs of the tables and provides a display signal which is a selected logical combination of the outputs. A function control unit provides a control signal to the logic unit to select the desired logical combination. A large number of planes are thus displayed using small LUT memory components, providing display values in real time to the scanner. The output of one look up table may be provided as a control signal to the logic unit. In one embodiment the first look up table is addressed by text planes, and an output therefrom provides the control signal for suppressing the output of the second look up table.

Abstract: A digital logic bus termination module that is to be plugged into a TTL logic backplane bus and in which the module includes a TTL logic circuit chip package having multiple terminals including a reference terminal, input terminal and output terminal. The TTL logic circuit chip package comprises an input diode, preferably a Schottky diode connected to the input terminal thereof and forming a bus termination clamping means. The bus line is connected to the input terminal of the chip package while the bus reference line is coupled to the reference or ground terminal for the circuit chip package. The TTL logic circuit chip package has the output terminal thereof unconnected so that only the diode is in operative association with the bus. One or more resistors may also be used in parallel with the clamping diodes for impedance matching purposes.